1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _LINUX_IOMMU_COMMON_H
3 #define _LINUX_IOMMU_COMMON_H
4 
5 #include <linux/spinlock_types.h>
6 #include <linux/device.h>
7 #include <asm/page.h>
8 
9 #define IOMMU_POOL_HASHBITS     4
10 #define IOMMU_NR_POOLS          (1 << IOMMU_POOL_HASHBITS)
11 #define IOMMU_ERROR_CODE	(~(unsigned long) 0)
12 
13 struct iommu_pool {
14 	unsigned long	start;
15 	unsigned long	end;
16 	unsigned long	hint;
17 	spinlock_t	lock;
18 };
19 
20 struct iommu_map_table {
21 	unsigned long		table_map_base;
22 	unsigned long		table_shift;
23 	unsigned long		nr_pools;
24 	void			(*lazy_flush)(struct iommu_map_table *);
25 	unsigned long		poolsize;
26 	struct iommu_pool	pools[IOMMU_NR_POOLS];
27 	u32			flags;
28 #define	IOMMU_HAS_LARGE_POOL	0x00000001
29 #define	IOMMU_NO_SPAN_BOUND	0x00000002
30 #define	IOMMU_NEED_FLUSH	0x00000004
31 	struct iommu_pool	large_pool;
32 	unsigned long		*map;
33 };
34 
35 extern void iommu_tbl_pool_init(struct iommu_map_table *iommu,
36 				unsigned long num_entries,
37 				u32 table_shift,
38 				void (*lazy_flush)(struct iommu_map_table *),
39 				bool large_pool, u32 npools,
40 				bool skip_span_boundary_check);
41 
42 extern unsigned long iommu_tbl_range_alloc(struct device *dev,
43 					   struct iommu_map_table *iommu,
44 					   unsigned long npages,
45 					   unsigned long *handle,
46 					   unsigned long mask,
47 					   unsigned int align_order);
48 
49 extern void iommu_tbl_range_free(struct iommu_map_table *iommu,
50 				 u64 dma_addr, unsigned long npages,
51 				 unsigned long entry);
52 
53 #endif
54