xref: /openbmc/linux/drivers/tty/serial/8250/8250_mid.c (revision bec5b814)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs
4  *
5  * Copyright (C) 2015 Intel Corporation
6  * Author: Heikki Krogerus <heikki.krogerus@linux.intel.com>
7  */
8 
9 #include <linux/bitops.h>
10 #include <linux/module.h>
11 #include <linux/pci.h>
12 #include <linux/rational.h>
13 
14 #include <linux/dma/hsu.h>
15 #include <linux/8250_pci.h>
16 
17 #include "8250.h"
18 
19 #define PCI_DEVICE_ID_INTEL_PNW_UART1	0x081b
20 #define PCI_DEVICE_ID_INTEL_PNW_UART2	0x081c
21 #define PCI_DEVICE_ID_INTEL_PNW_UART3	0x081d
22 #define PCI_DEVICE_ID_INTEL_TNG_UART	0x1191
23 #define PCI_DEVICE_ID_INTEL_CDF_UART	0x18d8
24 #define PCI_DEVICE_ID_INTEL_DNV_UART	0x19d8
25 
26 /* Intel MID Specific registers */
27 #define INTEL_MID_UART_FISR		0x08
28 #define INTEL_MID_UART_PS		0x30
29 #define INTEL_MID_UART_MUL		0x34
30 #define INTEL_MID_UART_DIV		0x38
31 
32 struct mid8250;
33 
34 struct mid8250_board {
35 	unsigned int flags;
36 	unsigned long freq;
37 	unsigned int base_baud;
38 	int (*setup)(struct mid8250 *, struct uart_port *p);
39 	void (*exit)(struct mid8250 *);
40 };
41 
42 struct mid8250 {
43 	int line;
44 	int dma_index;
45 	struct pci_dev *dma_dev;
46 	struct uart_8250_dma dma;
47 	struct mid8250_board *board;
48 	struct hsu_dma_chip dma_chip;
49 };
50 
51 /*****************************************************************************/
52 
pnw_setup(struct mid8250 * mid,struct uart_port * p)53 static int pnw_setup(struct mid8250 *mid, struct uart_port *p)
54 {
55 	struct pci_dev *pdev = to_pci_dev(p->dev);
56 
57 	switch (pdev->device) {
58 	case PCI_DEVICE_ID_INTEL_PNW_UART1:
59 		mid->dma_index = 0;
60 		break;
61 	case PCI_DEVICE_ID_INTEL_PNW_UART2:
62 		mid->dma_index = 1;
63 		break;
64 	case PCI_DEVICE_ID_INTEL_PNW_UART3:
65 		mid->dma_index = 2;
66 		break;
67 	default:
68 		return -EINVAL;
69 	}
70 
71 	mid->dma_dev = pci_get_slot(pdev->bus,
72 				    PCI_DEVFN(PCI_SLOT(pdev->devfn), 3));
73 	return 0;
74 }
75 
pnw_exit(struct mid8250 * mid)76 static void pnw_exit(struct mid8250 *mid)
77 {
78 	pci_dev_put(mid->dma_dev);
79 }
80 
tng_handle_irq(struct uart_port * p)81 static int tng_handle_irq(struct uart_port *p)
82 {
83 	struct mid8250 *mid = p->private_data;
84 	struct uart_8250_port *up = up_to_u8250p(p);
85 	struct hsu_dma_chip *chip;
86 	u32 status;
87 	int ret = 0;
88 	int err;
89 
90 	chip = pci_get_drvdata(mid->dma_dev);
91 
92 	/* Rx DMA */
93 	err = hsu_dma_get_status(chip, mid->dma_index * 2 + 1, &status);
94 	if (err > 0) {
95 		serial8250_rx_dma_flush(up);
96 		ret |= 1;
97 	} else if (err == 0)
98 		ret |= hsu_dma_do_irq(chip, mid->dma_index * 2 + 1, status);
99 
100 	/* Tx DMA */
101 	err = hsu_dma_get_status(chip, mid->dma_index * 2, &status);
102 	if (err > 0)
103 		ret |= 1;
104 	else if (err == 0)
105 		ret |= hsu_dma_do_irq(chip, mid->dma_index * 2, status);
106 
107 	/* UART */
108 	ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
109 	return IRQ_RETVAL(ret);
110 }
111 
tng_setup(struct mid8250 * mid,struct uart_port * p)112 static int tng_setup(struct mid8250 *mid, struct uart_port *p)
113 {
114 	struct pci_dev *pdev = to_pci_dev(p->dev);
115 	int index = PCI_FUNC(pdev->devfn);
116 
117 	/*
118 	 * Device 0000:00:04.0 is not a real HSU port. It provides a global
119 	 * register set for all HSU ports, although it has the same PCI ID.
120 	 * Skip it here.
121 	 */
122 	if (index-- == 0)
123 		return -ENODEV;
124 
125 	mid->dma_index = index;
126 	mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0));
127 
128 	p->handle_irq = tng_handle_irq;
129 	return 0;
130 }
131 
tng_exit(struct mid8250 * mid)132 static void tng_exit(struct mid8250 *mid)
133 {
134 	pci_dev_put(mid->dma_dev);
135 }
136 
dnv_handle_irq(struct uart_port * p)137 static int dnv_handle_irq(struct uart_port *p)
138 {
139 	struct mid8250 *mid = p->private_data;
140 	struct uart_8250_port *up = up_to_u8250p(p);
141 	unsigned int fisr = serial_port_in(p, INTEL_MID_UART_FISR);
142 	u32 status;
143 	int ret = 0;
144 	int err;
145 
146 	if (fisr & BIT(2)) {
147 		err = hsu_dma_get_status(&mid->dma_chip, 1, &status);
148 		if (err > 0) {
149 			serial8250_rx_dma_flush(up);
150 			ret |= 1;
151 		} else if (err == 0)
152 			ret |= hsu_dma_do_irq(&mid->dma_chip, 1, status);
153 	}
154 	if (fisr & BIT(1)) {
155 		err = hsu_dma_get_status(&mid->dma_chip, 0, &status);
156 		if (err > 0)
157 			ret |= 1;
158 		else if (err == 0)
159 			ret |= hsu_dma_do_irq(&mid->dma_chip, 0, status);
160 	}
161 	if (fisr & BIT(0))
162 		ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
163 	return IRQ_RETVAL(ret);
164 }
165 
166 #define DNV_DMA_CHAN_OFFSET 0x80
167 
dnv_setup(struct mid8250 * mid,struct uart_port * p)168 static int dnv_setup(struct mid8250 *mid, struct uart_port *p)
169 {
170 	struct hsu_dma_chip *chip = &mid->dma_chip;
171 	struct pci_dev *pdev = to_pci_dev(p->dev);
172 	unsigned int bar = FL_GET_BASE(mid->board->flags);
173 	int ret;
174 
175 	pci_set_master(pdev);
176 
177 	ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
178 	if (ret < 0)
179 		return ret;
180 
181 	p->irq = pci_irq_vector(pdev, 0);
182 
183 	chip->dev = &pdev->dev;
184 	chip->irq = pci_irq_vector(pdev, 0);
185 	chip->regs = p->membase;
186 	chip->length = pci_resource_len(pdev, bar);
187 	chip->offset = DNV_DMA_CHAN_OFFSET;
188 
189 	/* Falling back to PIO mode if DMA probing fails */
190 	ret = hsu_dma_probe(chip);
191 	if (ret)
192 		return 0;
193 
194 	mid->dma_dev = pdev;
195 
196 	p->handle_irq = dnv_handle_irq;
197 	return 0;
198 }
199 
dnv_exit(struct mid8250 * mid)200 static void dnv_exit(struct mid8250 *mid)
201 {
202 	if (!mid->dma_dev)
203 		return;
204 	hsu_dma_remove(&mid->dma_chip);
205 }
206 
207 /*****************************************************************************/
208 
mid8250_set_termios(struct uart_port * p,struct ktermios * termios,const struct ktermios * old)209 static void mid8250_set_termios(struct uart_port *p, struct ktermios *termios,
210 				const struct ktermios *old)
211 {
212 	unsigned int baud = tty_termios_baud_rate(termios);
213 	struct mid8250 *mid = p->private_data;
214 	unsigned short ps = 16;
215 	unsigned long fuart = baud * ps;
216 	unsigned long w = BIT(24) - 1;
217 	unsigned long mul, div;
218 
219 	/* Gracefully handle the B0 case: fall back to B9600 */
220 	fuart = fuart ? fuart : 9600 * 16;
221 
222 	if (mid->board->freq < fuart) {
223 		/* Find prescaler value that satisfies Fuart < Fref */
224 		if (mid->board->freq > baud)
225 			ps = mid->board->freq / baud;	/* baud rate too high */
226 		else
227 			ps = 1;				/* PLL case */
228 		fuart = baud * ps;
229 	} else {
230 		/* Get Fuart closer to Fref */
231 		fuart *= rounddown_pow_of_two(mid->board->freq / fuart);
232 	}
233 
234 	rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div);
235 	p->uartclk = fuart * 16 / ps;		/* core uses ps = 16 always */
236 
237 	writel(ps, p->membase + INTEL_MID_UART_PS);		/* set PS */
238 	writel(mul, p->membase + INTEL_MID_UART_MUL);		/* set MUL */
239 	writel(div, p->membase + INTEL_MID_UART_DIV);
240 
241 	serial8250_do_set_termios(p, termios, old);
242 }
243 
mid8250_dma_filter(struct dma_chan * chan,void * param)244 static bool mid8250_dma_filter(struct dma_chan *chan, void *param)
245 {
246 	struct hsu_dma_slave *s = param;
247 
248 	if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id)
249 		return false;
250 
251 	chan->private = s;
252 	return true;
253 }
254 
mid8250_dma_setup(struct mid8250 * mid,struct uart_8250_port * port)255 static int mid8250_dma_setup(struct mid8250 *mid, struct uart_8250_port *port)
256 {
257 	struct uart_8250_dma *dma = &mid->dma;
258 	struct device *dev = port->port.dev;
259 	struct hsu_dma_slave *rx_param;
260 	struct hsu_dma_slave *tx_param;
261 
262 	if (!mid->dma_dev)
263 		return 0;
264 
265 	rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
266 	if (!rx_param)
267 		return -ENOMEM;
268 
269 	tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
270 	if (!tx_param)
271 		return -ENOMEM;
272 
273 	rx_param->chan_id = mid->dma_index * 2 + 1;
274 	tx_param->chan_id = mid->dma_index * 2;
275 
276 	dma->rxconf.src_maxburst = 64;
277 	dma->txconf.dst_maxburst = 64;
278 
279 	rx_param->dma_dev = &mid->dma_dev->dev;
280 	tx_param->dma_dev = &mid->dma_dev->dev;
281 
282 	dma->fn = mid8250_dma_filter;
283 	dma->rx_param = rx_param;
284 	dma->tx_param = tx_param;
285 
286 	port->dma = dma;
287 	return 0;
288 }
289 
mid8250_probe(struct pci_dev * pdev,const struct pci_device_id * id)290 static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
291 {
292 	struct uart_8250_port uart;
293 	struct mid8250 *mid;
294 	unsigned int bar;
295 	int ret;
296 
297 	ret = pcim_enable_device(pdev);
298 	if (ret)
299 		return ret;
300 
301 	mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL);
302 	if (!mid)
303 		return -ENOMEM;
304 
305 	mid->board = (struct mid8250_board *)id->driver_data;
306 	bar = FL_GET_BASE(mid->board->flags);
307 
308 	memset(&uart, 0, sizeof(struct uart_8250_port));
309 
310 	uart.port.dev = &pdev->dev;
311 	uart.port.irq = pdev->irq;
312 	uart.port.private_data = mid;
313 	uart.port.type = PORT_16750;
314 	uart.port.iotype = UPIO_MEM;
315 	uart.port.uartclk = mid->board->base_baud * 16;
316 	uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
317 	uart.port.set_termios = mid8250_set_termios;
318 
319 	uart.port.mapbase = pci_resource_start(pdev, bar);
320 	uart.port.membase = pcim_iomap(pdev, bar, 0);
321 	if (!uart.port.membase)
322 		return -ENOMEM;
323 
324 	ret = mid->board->setup(mid, &uart.port);
325 	if (ret)
326 		return ret;
327 
328 	ret = mid8250_dma_setup(mid, &uart);
329 	if (ret)
330 		goto err;
331 
332 	ret = serial8250_register_8250_port(&uart);
333 	if (ret < 0)
334 		goto err;
335 
336 	mid->line = ret;
337 
338 	pci_set_drvdata(pdev, mid);
339 	return 0;
340 
341 err:
342 	mid->board->exit(mid);
343 	return ret;
344 }
345 
mid8250_remove(struct pci_dev * pdev)346 static void mid8250_remove(struct pci_dev *pdev)
347 {
348 	struct mid8250 *mid = pci_get_drvdata(pdev);
349 
350 	serial8250_unregister_port(mid->line);
351 
352 	mid->board->exit(mid);
353 }
354 
355 static const struct mid8250_board pnw_board = {
356 	.flags = FL_BASE0,
357 	.freq = 50000000,
358 	.base_baud = 115200,
359 	.setup = pnw_setup,
360 	.exit = pnw_exit,
361 };
362 
363 static const struct mid8250_board tng_board = {
364 	.flags = FL_BASE0,
365 	.freq = 38400000,
366 	.base_baud = 1843200,
367 	.setup = tng_setup,
368 	.exit = tng_exit,
369 };
370 
371 static const struct mid8250_board dnv_board = {
372 	.flags = FL_BASE1,
373 	.freq = 133333333,
374 	.base_baud = 115200,
375 	.setup = dnv_setup,
376 	.exit = dnv_exit,
377 };
378 
379 static const struct pci_device_id pci_ids[] = {
380 	{ PCI_DEVICE_DATA(INTEL, PNW_UART1, &pnw_board) },
381 	{ PCI_DEVICE_DATA(INTEL, PNW_UART2, &pnw_board) },
382 	{ PCI_DEVICE_DATA(INTEL, PNW_UART3, &pnw_board) },
383 	{ PCI_DEVICE_DATA(INTEL, TNG_UART, &tng_board) },
384 	{ PCI_DEVICE_DATA(INTEL, CDF_UART, &dnv_board) },
385 	{ PCI_DEVICE_DATA(INTEL, DNV_UART, &dnv_board) },
386 	{ }
387 };
388 MODULE_DEVICE_TABLE(pci, pci_ids);
389 
390 static struct pci_driver mid8250_pci_driver = {
391 	.name           = "8250_mid",
392 	.id_table       = pci_ids,
393 	.probe          = mid8250_probe,
394 	.remove         = mid8250_remove,
395 };
396 
397 module_pci_driver(mid8250_pci_driver);
398 
399 MODULE_AUTHOR("Intel Corporation");
400 MODULE_LICENSE("GPL v2");
401 MODULE_DESCRIPTION("Intel MID UART driver");
402