1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Texas Instruments ICSSG Ethernet driver
3 *
4 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/
5 *
6 */
7
8 #ifndef __NET_TI_ICSSG_PRUETH_H
9 #define __NET_TI_ICSSG_PRUETH_H
10
11 #include <linux/etherdevice.h>
12 #include <linux/genalloc.h>
13 #include <linux/if_vlan.h>
14 #include <linux/interrupt.h>
15 #include <linux/kernel.h>
16 #include <linux/mfd/syscon.h>
17 #include <linux/module.h>
18 #include <linux/mutex.h>
19 #include <linux/net_tstamp.h>
20 #include <linux/of.h>
21 #include <linux/of_irq.h>
22 #include <linux/of_mdio.h>
23 #include <linux/of_net.h>
24 #include <linux/of_platform.h>
25 #include <linux/phy.h>
26 #include <linux/remoteproc/pruss.h>
27 #include <linux/pruss_driver.h>
28 #include <linux/ptp_clock_kernel.h>
29 #include <linux/remoteproc.h>
30
31 #include <linux/dma-mapping.h>
32 #include <linux/dma/ti-cppi5.h>
33 #include <linux/dma/k3-udma-glue.h>
34
35 #include <net/devlink.h>
36
37 #include "icssg_config.h"
38 #include "icss_iep.h"
39 #include "icssg_switch_map.h"
40
41 #define PRUETH_MAX_MTU (2000 - ETH_HLEN - ETH_FCS_LEN)
42 #define PRUETH_MIN_PKT_SIZE (VLAN_ETH_ZLEN)
43 #define PRUETH_MAX_PKT_SIZE (PRUETH_MAX_MTU + ETH_HLEN + ETH_FCS_LEN)
44
45 #define ICSS_SLICE0 0
46 #define ICSS_SLICE1 1
47
48 #define ICSS_FW_PRU 0
49 #define ICSS_FW_RTU 1
50
51 #define ICSSG_MAX_RFLOWS 8 /* per slice */
52
53 /* Number of ICSSG related stats */
54 #define ICSSG_NUM_STATS 60
55 #define ICSSG_NUM_STANDARD_STATS 31
56 #define ICSSG_NUM_ETHTOOL_STATS (ICSSG_NUM_STATS - ICSSG_NUM_STANDARD_STATS)
57
58 /* Firmware status codes */
59 #define ICSS_HS_FW_READY 0x55555555
60 #define ICSS_HS_FW_DEAD 0xDEAD0000 /* lower 16 bits contain error code */
61
62 /* Firmware command codes */
63 #define ICSS_HS_CMD_BUSY 0x40000000
64 #define ICSS_HS_CMD_DONE 0x80000000
65 #define ICSS_HS_CMD_CANCEL 0x10000000
66
67 /* Firmware commands */
68 #define ICSS_CMD_SPAD 0x20
69 #define ICSS_CMD_RXTX 0x10
70 #define ICSS_CMD_ADD_FDB 0x1
71 #define ICSS_CMD_DEL_FDB 0x2
72 #define ICSS_CMD_SET_RUN 0x4
73 #define ICSS_CMD_GET_FDB_SLOT 0x5
74 #define ICSS_CMD_ENABLE_VLAN 0x5
75 #define ICSS_CMD_DISABLE_VLAN 0x6
76 #define ICSS_CMD_ADD_FILTER 0x7
77 #define ICSS_CMD_ADD_MAC 0x8
78
79 /* In switch mode there are 3 real ports i.e. 3 mac addrs.
80 * however Linux sees only the host side port. The other 2 ports
81 * are the switch ports.
82 * In emac mode there are 2 real ports i.e. 2 mac addrs.
83 * Linux sees both the ports.
84 */
85 enum prueth_port {
86 PRUETH_PORT_HOST = 0, /* host side port */
87 PRUETH_PORT_MII0, /* physical port RG/SG MII 0 */
88 PRUETH_PORT_MII1, /* physical port RG/SG MII 1 */
89 PRUETH_PORT_INVALID, /* Invalid prueth port */
90 };
91
92 enum prueth_mac {
93 PRUETH_MAC0 = 0,
94 PRUETH_MAC1,
95 PRUETH_NUM_MACS,
96 PRUETH_MAC_INVALID,
97 };
98
99 struct prueth_tx_chn {
100 struct device *dma_dev;
101 struct napi_struct napi_tx;
102 struct k3_cppi_desc_pool *desc_pool;
103 struct k3_udma_glue_tx_channel *tx_chn;
104 struct prueth_emac *emac;
105 u32 id;
106 u32 descs_num;
107 unsigned int irq;
108 char name[32];
109 };
110
111 struct prueth_rx_chn {
112 struct device *dev;
113 struct device *dma_dev;
114 struct k3_cppi_desc_pool *desc_pool;
115 struct k3_udma_glue_rx_channel *rx_chn;
116 u32 descs_num;
117 unsigned int irq[ICSSG_MAX_RFLOWS]; /* separate irq per flow */
118 char name[32];
119 };
120
121 /* There are 4 Tx DMA channels, but the highest priority is CH3 (thread 3)
122 * and lower three are lower priority channels or threads.
123 */
124 #define PRUETH_MAX_TX_QUEUES 4
125
126 #define PRUETH_MAX_TX_TS_REQUESTS 50 /* Max simultaneous TX_TS requests */
127
128 /* data for each emac port */
129 struct prueth_emac {
130 bool fw_running;
131 struct prueth *prueth;
132 struct net_device *ndev;
133 u8 mac_addr[6];
134 struct napi_struct napi_rx;
135 u32 msg_enable;
136
137 int link;
138 int speed;
139 int duplex;
140
141 const char *phy_id;
142 struct device_node *phy_node;
143 phy_interface_t phy_if;
144 enum prueth_port port_id;
145 struct icss_iep *iep;
146 unsigned int rx_ts_enabled : 1;
147 unsigned int tx_ts_enabled : 1;
148
149 /* DMA related */
150 struct prueth_tx_chn tx_chns[PRUETH_MAX_TX_QUEUES];
151 struct completion tdown_complete;
152 atomic_t tdown_cnt;
153 struct prueth_rx_chn rx_chns;
154 int rx_flow_id_base;
155 int tx_ch_num;
156
157 spinlock_t lock; /* serialize access */
158
159 /* TX HW Timestamping */
160 /* TX TS cookie will be index to the tx_ts_skb array */
161 struct sk_buff *tx_ts_skb[PRUETH_MAX_TX_TS_REQUESTS];
162 atomic_t tx_ts_pending;
163 int tx_ts_irq;
164
165 u8 cmd_seq;
166 /* shutdown related */
167 u32 cmd_data[4];
168 struct completion cmd_complete;
169 /* Mutex to serialize access to firmware command interface */
170 struct mutex cmd_lock;
171 struct work_struct rx_mode_work;
172 struct workqueue_struct *cmd_wq;
173
174 struct pruss_mem_region dram;
175
176 struct delayed_work stats_work;
177 u64 stats[ICSSG_NUM_STATS];
178 };
179
180 /**
181 * struct prueth_pdata - PRUeth platform data
182 * @fdqring_mode: Free desc queue mode
183 * @quirk_10m_link_issue: 10M link detect errata
184 */
185 struct prueth_pdata {
186 enum k3_ring_mode fdqring_mode;
187 u32 quirk_10m_link_issue:1;
188 };
189
190 /**
191 * struct prueth - PRUeth structure
192 * @dev: device
193 * @pruss: pruss handle
194 * @pru: rproc instances of PRUs
195 * @rtu: rproc instances of RTUs
196 * @txpru: rproc instances of TX_PRUs
197 * @shram: PRUSS shared RAM region
198 * @sram_pool: MSMC RAM pool for buffers
199 * @msmcram: MSMC RAM region
200 * @eth_node: DT node for the port
201 * @emac: private EMAC data structure
202 * @registered_netdevs: list of registered netdevs
203 * @miig_rt: regmap to mii_g_rt block
204 * @mii_rt: regmap to mii_rt block
205 * @pru_id: ID for each of the PRUs
206 * @pdev: pointer to ICSSG platform device
207 * @pdata: pointer to platform data for ICSSG driver
208 * @icssg_hwcmdseq: seq counter or HWQ messages
209 * @emacs_initialized: num of EMACs/ext ports that are up/running
210 * @iep0: pointer to IEP0 device
211 * @iep1: pointer to IEP1 device
212 */
213 struct prueth {
214 struct device *dev;
215 struct pruss *pruss;
216 struct rproc *pru[PRUSS_NUM_PRUS];
217 struct rproc *rtu[PRUSS_NUM_PRUS];
218 struct rproc *txpru[PRUSS_NUM_PRUS];
219 struct pruss_mem_region shram;
220 struct gen_pool *sram_pool;
221 struct pruss_mem_region msmcram;
222
223 struct device_node *eth_node[PRUETH_NUM_MACS];
224 struct prueth_emac *emac[PRUETH_NUM_MACS];
225 struct net_device *registered_netdevs[PRUETH_NUM_MACS];
226 struct regmap *miig_rt;
227 struct regmap *mii_rt;
228
229 enum pruss_pru_id pru_id[PRUSS_NUM_PRUS];
230 struct platform_device *pdev;
231 struct prueth_pdata pdata;
232 u8 icssg_hwcmdseq;
233 int emacs_initialized;
234 struct icss_iep *iep0;
235 struct icss_iep *iep1;
236 };
237
238 struct emac_tx_ts_response {
239 u32 reserved[2];
240 u32 cookie;
241 u32 lo_ts;
242 u32 hi_ts;
243 };
244
245 /* get PRUSS SLICE number from prueth_emac */
prueth_emac_slice(struct prueth_emac * emac)246 static inline int prueth_emac_slice(struct prueth_emac *emac)
247 {
248 switch (emac->port_id) {
249 case PRUETH_PORT_MII0:
250 return ICSS_SLICE0;
251 case PRUETH_PORT_MII1:
252 return ICSS_SLICE1;
253 default:
254 return -EINVAL;
255 }
256 }
257
258 extern const struct ethtool_ops icssg_ethtool_ops;
259
icssg_read_time(const void __iomem * addr)260 static inline u64 icssg_read_time(const void __iomem *addr)
261 {
262 u32 low, high;
263
264 do {
265 high = readl(addr + 4);
266 low = readl(addr);
267 } while (high != readl(addr + 4));
268
269 return low + ((u64)high << 32);
270 }
271
272 /* Classifier helpers */
273 void icssg_class_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac);
274 void icssg_class_set_host_mac_addr(struct regmap *miig_rt, const u8 *mac);
275 void icssg_class_disable(struct regmap *miig_rt, int slice);
276 void icssg_class_default(struct regmap *miig_rt, int slice, bool allmulti);
277 void icssg_ft1_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac_addr);
278
279 /* config helpers */
280 void icssg_config_ipg(struct prueth_emac *emac);
281 int icssg_config(struct prueth *prueth, struct prueth_emac *emac,
282 int slice);
283 int emac_set_port_state(struct prueth_emac *emac,
284 enum icssg_port_state_cmd state);
285 void icssg_config_set_speed(struct prueth_emac *emac);
286
287 /* Buffer queue helpers */
288 int icssg_queue_pop(struct prueth *prueth, u8 queue);
289 void icssg_queue_push(struct prueth *prueth, int queue, u16 addr);
290 u32 icssg_queue_level(struct prueth *prueth, int queue);
291
292 #define prueth_napi_to_tx_chn(pnapi) \
293 container_of(pnapi, struct prueth_tx_chn, napi_tx)
294
295 void emac_stats_work_handler(struct work_struct *work);
296 void emac_update_hardware_stats(struct prueth_emac *emac);
297 int emac_get_stat_by_name(struct prueth_emac *emac, char *stat_name);
298 #endif /* __NET_TI_ICSSG_PRUETH_H */
299