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Searched defs:ICCR0 (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/hw/arm/
H A Dpxa2xx.c1859 #define ICCR0 0x00 /* FICP Control register 0 */ macro
/openbmc/u-boot/arch/sh/include/asm/
H A Dcpu_sh7722.h350 #define ICCR0 0xA4470004 macro
/openbmc/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h881 #define ICCR0 0x40800000 /* ICP Control Register 0 */ macro