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Searched defs:HD (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dvector_internals.h143 #define OPIVV1(NAME, TD, T2, TX2, HD, HS2, OP) \ argument
182 #define OPIVV2(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ argument
210 #define OPIVX2(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \ argument
H A Dvector_helper.c1360 #define GEN_VEXT_SHIFT_VX(NAME, TD, TS2, HD, HS2, OP, MASK) \ argument
1911 #define OPIVV3(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ argument
1957 #define OPIVX3(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \ argument
2162 #define OPIVV2_RM(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ argument
2290 #define OPIVX2_RM(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \ argument
3082 #define OPFVV2(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ in RVVCALL() argument
3128 #define OPFVF2(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \ argument
3363 #define OPFVV3(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ in RVVCALL() argument
3395 #define OPFVF3(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \ in RVVCALL() argument
3717 #define OPFVV1(NAME, TD, T2, TX2, HD, HS2, OP) \ in RVVCALL() argument
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/openbmc/qemu/target/arm/tcg/
H A Dvec_helper.c834 #define DO_DOT_IDX(NAME, TYPED, TYPEN, TYPEM, HD) \ in DO_DOT() argument
H A Dsve_helper.c3062 #define DO_UNPK(NAME, TYPED, TYPES, HD, HS) \ argument