1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
2 /*
3  * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
4  * Copyright (C) 2022 StarFive Technology Co., Ltd.
5  */
6 
7 #ifndef __JH7110_PINFUNC_H__
8 #define __JH7110_PINFUNC_H__
9 
10 /*
11  * mux bits:
12  *  | 31 - 24 | 23 - 16 | 15 - 10 |  9 - 8   |  7 - 0  |
13  *  |  din    |  dout   |  doen   | function | gpio nr |
14  *
15  * dout:     output signal
16  * doen:     output enable signal
17  * din:      optional input signal, 0xff = none
18  * function: function selector
19  * gpio nr:  gpio number, 0 - 63
20  */
21 #define GPIOMUX(n, dout, doen, din) ( \
22 		(((din)  & 0xff) << 24) | \
23 		(((dout) & 0xff) << 16) | \
24 		(((doen) & 0x3f) << 10) | \
25 		((n) & 0x3f))
26 
27 #define PINMUX(n, func) ((1 << 10) | (((func) & 0x3) << 8) | ((n) & 0xff))
28 
29 /* sys_iomux dout */
30 #define GPOUT_LOW				0
31 #define GPOUT_HIGH				1
32 #define GPOUT_SYS_WAVE511_UART_TX		2
33 #define GPOUT_SYS_CAN0_STBY			3
34 #define GPOUT_SYS_CAN0_TST_NEXT_BIT		4
35 #define GPOUT_SYS_CAN0_TST_SAMPLE_POINT		5
36 #define GPOUT_SYS_CAN0_TXD			6
37 #define GPOUT_SYS_USB_DRIVE_VBUS		7
38 #define GPOUT_SYS_QSPI_CS1			8
39 #define GPOUT_SYS_SPDIF				9
40 #define GPOUT_SYS_HDMI_CEC_SDA			10
41 #define GPOUT_SYS_HDMI_DDC_SCL			11
42 #define GPOUT_SYS_HDMI_DDC_SDA			12
43 #define GPOUT_SYS_WATCHDOG			13
44 #define GPOUT_SYS_I2C0_CLK			14
45 #define GPOUT_SYS_I2C0_DATA			15
46 #define GPOUT_SYS_SDIO0_BACK_END_POWER		16
47 #define GPOUT_SYS_SDIO0_CARD_POWER_EN		17
48 #define GPOUT_SYS_SDIO0_CCMD_OD_PULLUP_EN	18
49 #define GPOUT_SYS_SDIO0_RST			19
50 #define GPOUT_SYS_UART0_TX			20
51 #define GPOUT_SYS_HIFI4_JTAG_TDO		21
52 #define GPOUT_SYS_JTAG_TDO			22
53 #define GPOUT_SYS_PDM_MCLK			23
54 #define GPOUT_SYS_PWM_CHANNEL0			24
55 #define GPOUT_SYS_PWM_CHANNEL1			25
56 #define GPOUT_SYS_PWM_CHANNEL2			26
57 #define GPOUT_SYS_PWM_CHANNEL3			27
58 #define GPOUT_SYS_PWMDAC_LEFT			28
59 #define GPOUT_SYS_PWMDAC_RIGHT			29
60 #define GPOUT_SYS_SPI0_CLK			30
61 #define GPOUT_SYS_SPI0_FSS			31
62 #define GPOUT_SYS_SPI0_TXD			32
63 #define GPOUT_SYS_GMAC_PHYCLK			33
64 #define GPOUT_SYS_I2SRX_BCLK			34
65 #define GPOUT_SYS_I2SRX_LRCK			35
66 #define GPOUT_SYS_I2STX0_BCLK			36
67 #define GPOUT_SYS_I2STX0_LRCK			37
68 #define GPOUT_SYS_MCLK				38
69 #define GPOUT_SYS_TDM_CLK			39
70 #define GPOUT_SYS_TDM_SYNC			40
71 #define GPOUT_SYS_TDM_TXD			41
72 #define GPOUT_SYS_TRACE_DATA0			42
73 #define GPOUT_SYS_TRACE_DATA1			43
74 #define GPOUT_SYS_TRACE_DATA2			44
75 #define GPOUT_SYS_TRACE_DATA3			45
76 #define GPOUT_SYS_TRACE_REF			46
77 #define GPOUT_SYS_CAN1_STBY			47
78 #define GPOUT_SYS_CAN1_TST_NEXT_BIT		48
79 #define GPOUT_SYS_CAN1_TST_SAMPLE_POINT		49
80 #define GPOUT_SYS_CAN1_TXD			50
81 #define GPOUT_SYS_I2C1_CLK			51
82 #define GPOUT_SYS_I2C1_DATA			52
83 #define GPOUT_SYS_SDIO1_BACK_END_POWER		53
84 #define GPOUT_SYS_SDIO1_CARD_POWER_EN		54
85 #define GPOUT_SYS_SDIO1_CLK			55
86 #define GPOUT_SYS_SDIO1_CMD_OD_PULLUP_EN	56
87 #define GPOUT_SYS_SDIO1_CMD			57
88 #define GPOUT_SYS_SDIO1_DATA0			58
89 #define GPOUT_SYS_SDIO1_DATA1			59
90 #define GPOUT_SYS_SDIO1_DATA2			60
91 #define GPOUT_SYS_SDIO1_DATA3			61
92 #define GPOUT_SYS_SDIO1_DATA4			63
93 #define GPOUT_SYS_SDIO1_DATA5			63
94 #define GPOUT_SYS_SDIO1_DATA6			64
95 #define GPOUT_SYS_SDIO1_DATA7			65
96 #define GPOUT_SYS_SDIO1_RST			66
97 #define GPOUT_SYS_UART1_RTS			67
98 #define GPOUT_SYS_UART1_TX			68
99 #define GPOUT_SYS_I2STX1_SDO0			69
100 #define GPOUT_SYS_I2STX1_SDO1			70
101 #define GPOUT_SYS_I2STX1_SDO2			71
102 #define GPOUT_SYS_I2STX1_SDO3			72
103 #define GPOUT_SYS_SPI1_CLK			73
104 #define GPOUT_SYS_SPI1_FSS			74
105 #define GPOUT_SYS_SPI1_TXD			75
106 #define GPOUT_SYS_I2C2_CLK			76
107 #define GPOUT_SYS_I2C2_DATA			77
108 #define GPOUT_SYS_UART2_RTS			78
109 #define GPOUT_SYS_UART2_TX			79
110 #define GPOUT_SYS_SPI2_CLK			80
111 #define GPOUT_SYS_SPI2_FSS			81
112 #define GPOUT_SYS_SPI2_TXD			82
113 #define GPOUT_SYS_I2C3_CLK			83
114 #define GPOUT_SYS_I2C3_DATA			84
115 #define GPOUT_SYS_UART3_TX			85
116 #define GPOUT_SYS_SPI3_CLK			86
117 #define GPOUT_SYS_SPI3_FSS			87
118 #define GPOUT_SYS_SPI3_TXD			88
119 #define GPOUT_SYS_I2C4_CLK			89
120 #define GPOUT_SYS_I2C4_DATA			90
121 #define GPOUT_SYS_UART4_RTS			91
122 #define GPOUT_SYS_UART4_TX			92
123 #define GPOUT_SYS_SPI4_CLK			93
124 #define GPOUT_SYS_SPI4_FSS			94
125 #define GPOUT_SYS_SPI4_TXD			95
126 #define GPOUT_SYS_I2C5_CLK			96
127 #define GPOUT_SYS_I2C5_DATA			97
128 #define GPOUT_SYS_UART5_RTS			98
129 #define GPOUT_SYS_UART5_TX			99
130 #define GPOUT_SYS_SPI5_CLK			100
131 #define GPOUT_SYS_SPI5_FSS			101
132 #define GPOUT_SYS_SPI5_TXD			102
133 #define GPOUT_SYS_I2C6_CLK			103
134 #define GPOUT_SYS_I2C6_DATA			104
135 #define GPOUT_SYS_SPI6_CLK			105
136 #define GPOUT_SYS_SPI6_FSS			106
137 #define GPOUT_SYS_SPI6_TXD			107
138 
139 /* aon_iomux dout */
140 #define GPOUT_AON_CLK_32K_OUT			2
141 #define GPOUT_AON_PTC0_PWM4			3
142 #define GPOUT_AON_PTC0_PWM5			4
143 #define GPOUT_AON_PTC0_PWM6			5
144 #define GPOUT_AON_PTC0_PWM7			6
145 #define GPOUT_AON_CLK_GCLK0			7
146 #define GPOUT_AON_CLK_GCLK1			8
147 #define GPOUT_AON_CLK_GCLK2			9
148 
149 /* sys_iomux doen */
150 #define GPOEN_ENABLE				0
151 #define GPOEN_DISABLE				1
152 #define GPOEN_SYS_HDMI_CEC_SDA			2
153 #define GPOEN_SYS_HDMI_DDC_SCL			3
154 #define GPOEN_SYS_HDMI_DDC_SDA			4
155 #define GPOEN_SYS_I2C0_CLK			5
156 #define GPOEN_SYS_I2C0_DATA			6
157 #define GPOEN_SYS_HIFI4_JTAG_TDO		7
158 #define GPOEN_SYS_JTAG_TDO			8
159 #define GPOEN_SYS_PWM0_CHANNEL0			9
160 #define GPOEN_SYS_PWM0_CHANNEL1			10
161 #define GPOEN_SYS_PWM0_CHANNEL2			11
162 #define GPOEN_SYS_PWM0_CHANNEL3			12
163 #define GPOEN_SYS_SPI0_NSSPCTL			13
164 #define GPOEN_SYS_SPI0_NSSP			14
165 #define GPOEN_SYS_TDM_SYNC			15
166 #define GPOEN_SYS_TDM_TXD			16
167 #define GPOEN_SYS_I2C1_CLK			17
168 #define GPOEN_SYS_I2C1_DATA			18
169 #define GPOEN_SYS_SDIO1_CMD			19
170 #define GPOEN_SYS_SDIO1_DATA0			20
171 #define GPOEN_SYS_SDIO1_DATA1			21
172 #define GPOEN_SYS_SDIO1_DATA2			22
173 #define GPOEN_SYS_SDIO1_DATA3			23
174 #define GPOEN_SYS_SDIO1_DATA4			24
175 #define GPOEN_SYS_SDIO1_DATA5			25
176 #define GPOEN_SYS_SDIO1_DATA6			26
177 #define GPOEN_SYS_SDIO1_DATA7			27
178 #define GPOEN_SYS_SPI1_NSSPCTL			28
179 #define GPOEN_SYS_SPI1_NSSP			29
180 #define GPOEN_SYS_I2C2_CLK			30
181 #define GPOEN_SYS_I2C2_DATA			31
182 #define GPOEN_SYS_SPI2_NSSPCTL			32
183 #define GPOEN_SYS_SPI2_NSSP			33
184 #define GPOEN_SYS_I2C3_CLK			34
185 #define GPOEN_SYS_I2C3_DATA			35
186 #define GPOEN_SYS_SPI3_NSSPCTL			36
187 #define GPOEN_SYS_SPI3_NSSP			37
188 #define GPOEN_SYS_I2C4_CLK			38
189 #define GPOEN_SYS_I2C4_DATA			39
190 #define GPOEN_SYS_SPI4_NSSPCTL			40
191 #define GPOEN_SYS_SPI4_NSSP			41
192 #define GPOEN_SYS_I2C5_CLK			42
193 #define GPOEN_SYS_I2C5_DATA			43
194 #define GPOEN_SYS_SPI5_NSSPCTL			44
195 #define GPOEN_SYS_SPI5_NSSP			45
196 #define GPOEN_SYS_I2C6_CLK			46
197 #define GPOEN_SYS_I2C6_DATA			47
198 #define GPOEN_SYS_SPI6_NSSPCTL			48
199 #define GPOEN_SYS_SPI6_NSSP			49
200 
201 /* aon_iomux doen */
202 #define GPOEN_AON_PTC0_OE_N_4			2
203 #define GPOEN_AON_PTC0_OE_N_5			3
204 #define GPOEN_AON_PTC0_OE_N_6			4
205 #define GPOEN_AON_PTC0_OE_N_7			5
206 
207 /* sys_iomux gin */
208 #define GPI_NONE				255
209 
210 #define GPI_SYS_WAVE511_UART_RX			0
211 #define GPI_SYS_CAN0_RXD			1
212 #define GPI_SYS_USB_OVERCURRENT			2
213 #define GPI_SYS_SPDIF				3
214 #define GPI_SYS_JTAG_RST			4
215 #define GPI_SYS_HDMI_CEC_SDA			5
216 #define GPI_SYS_HDMI_DDC_SCL			6
217 #define GPI_SYS_HDMI_DDC_SDA			7
218 #define GPI_SYS_HDMI_HPD			8
219 #define GPI_SYS_I2C0_CLK			9
220 #define GPI_SYS_I2C0_DATA			10
221 #define GPI_SYS_SDIO0_CD			11
222 #define GPI_SYS_SDIO0_INT			12
223 #define GPI_SYS_SDIO0_WP			13
224 #define GPI_SYS_UART0_RX			14
225 #define GPI_SYS_HIFI4_JTAG_TCK			15
226 #define GPI_SYS_HIFI4_JTAG_TDI			16
227 #define GPI_SYS_HIFI4_JTAG_TMS			17
228 #define GPI_SYS_HIFI4_JTAG_RST			18
229 #define GPI_SYS_JTAG_TDI			19
230 #define GPI_SYS_JTAG_TMS			20
231 #define GPI_SYS_PDM_DMIC0			21
232 #define GPI_SYS_PDM_DMIC1			22
233 #define GPI_SYS_I2SRX_SDIN0			23
234 #define GPI_SYS_I2SRX_SDIN1			24
235 #define GPI_SYS_I2SRX_SDIN2			25
236 #define GPI_SYS_SPI0_CLK			26
237 #define GPI_SYS_SPI0_FSS			27
238 #define GPI_SYS_SPI0_RXD			28
239 #define GPI_SYS_JTAG_TCK			29
240 #define GPI_SYS_MCLK_EXT			30
241 #define GPI_SYS_I2SRX_BCLK			31
242 #define GPI_SYS_I2SRX_LRCK			32
243 #define GPI_SYS_I2STX0_BCLK			33
244 #define GPI_SYS_I2STX0_LRCK			34
245 #define GPI_SYS_TDM_CLK				35
246 #define GPI_SYS_TDM_RXD				36
247 #define GPI_SYS_TDM_SYNC			37
248 #define GPI_SYS_CAN1_RXD			38
249 #define GPI_SYS_I2C1_CLK			39
250 #define GPI_SYS_I2C1_DATA			40
251 #define GPI_SYS_SDIO1_CD			41
252 #define GPI_SYS_SDIO1_INT			42
253 #define GPI_SYS_SDIO1_WP			43
254 #define GPI_SYS_SDIO1_CMD			44
255 #define GPI_SYS_SDIO1_DATA0			45
256 #define GPI_SYS_SDIO1_DATA1			46
257 #define GPI_SYS_SDIO1_DATA2			47
258 #define GPI_SYS_SDIO1_DATA3			48
259 #define GPI_SYS_SDIO1_DATA4			49
260 #define GPI_SYS_SDIO1_DATA5			50
261 #define GPI_SYS_SDIO1_DATA6			51
262 #define GPI_SYS_SDIO1_DATA7			52
263 #define GPI_SYS_SDIO1_STRB			53
264 #define GPI_SYS_UART1_CTS			54
265 #define GPI_SYS_UART1_RX			55
266 #define GPI_SYS_SPI1_CLK			56
267 #define GPI_SYS_SPI1_FSS			57
268 #define GPI_SYS_SPI1_RXD			58
269 #define GPI_SYS_I2C2_CLK			59
270 #define GPI_SYS_I2C2_DATA			60
271 #define GPI_SYS_UART2_CTS			61
272 #define GPI_SYS_UART2_RX			62
273 #define GPI_SYS_SPI2_CLK			63
274 #define GPI_SYS_SPI2_FSS			64
275 #define GPI_SYS_SPI2_RXD			65
276 #define GPI_SYS_I2C3_CLK			66
277 #define GPI_SYS_I2C3_DATA			67
278 #define GPI_SYS_UART3_RX			68
279 #define GPI_SYS_SPI3_CLK			69
280 #define GPI_SYS_SPI3_FSS			70
281 #define GPI_SYS_SPI3_RXD			71
282 #define GPI_SYS_I2C4_CLK			72
283 #define GPI_SYS_I2C4_DATA			73
284 #define GPI_SYS_UART4_CTS			74
285 #define GPI_SYS_UART4_RX			75
286 #define GPI_SYS_SPI4_CLK			76
287 #define GPI_SYS_SPI4_FSS			77
288 #define GPI_SYS_SPI4_RXD			78
289 #define GPI_SYS_I2C5_CLK			79
290 #define GPI_SYS_I2C5_DATA			80
291 #define GPI_SYS_UART5_CTS			81
292 #define GPI_SYS_UART5_RX			82
293 #define GPI_SYS_SPI5_CLK			83
294 #define GPI_SYS_SPI5_FSS			84
295 #define GPI_SYS_SPI5_RXD			85
296 #define GPI_SYS_I2C6_CLK			86
297 #define GPI_SYS_I2C6_DATA			87
298 #define GPI_SYS_SPI6_CLK			88
299 #define GPI_SYS_SPI6_FSS			89
300 #define GPI_SYS_SPI6_RXD			90
301 
302 /* aon_iomux gin */
303 #define GPI_AON_PMU_GPIO_WAKEUP_0		0
304 #define GPI_AON_PMU_GPIO_WAKEUP_1		1
305 #define GPI_AON_PMU_GPIO_WAKEUP_2		2
306 #define GPI_AON_PMU_GPIO_WAKEUP_3		3
307 
308 #endif
309