1 /* SPDX-License-Identifier: MIT */
2 #ifndef __NVIF_CLASS_H__
3 #define __NVIF_CLASS_H__
4 
5 /* these class numbers are made up by us, and not nvidia-assigned */
6 #define NVIF_CLASS_CLIENT                            /* if0000.h */ -0x00000000
7 
8 #define NVIF_CLASS_CONTROL                           /* if0001.h */ -0x00000001
9 
10 #define NVIF_CLASS_PERFMON                           /* if0002.h */ -0x00000002
11 #define NVIF_CLASS_PERFDOM                           /* if0003.h */ -0x00000003
12 
13 #define NVIF_CLASS_SW_NV04                           /* if0004.h */ -0x00000004
14 #define NVIF_CLASS_SW_NV10                           /* if0005.h */ -0x00000005
15 #define NVIF_CLASS_SW_NV50                           /* if0005.h */ -0x00000006
16 #define NVIF_CLASS_SW_GF100                          /* if0005.h */ -0x00000007
17 
18 #define NVIF_CLASS_MMU                               /* if0008.h */  0x80000008
19 #define NVIF_CLASS_MMU_NV04                          /* if0008.h */  0x80000009
20 #define NVIF_CLASS_MMU_NV50                          /* if0008.h */  0x80005009
21 #define NVIF_CLASS_MMU_GF100                         /* if0008.h */  0x80009009
22 
23 #define NVIF_CLASS_MEM                               /* if000a.h */  0x8000000a
24 #define NVIF_CLASS_MEM_NV04                          /* if000b.h */  0x8000000b
25 #define NVIF_CLASS_MEM_NV50                          /* if500b.h */  0x8000500b
26 #define NVIF_CLASS_MEM_GF100                         /* if900b.h */  0x8000900b
27 
28 #define NVIF_CLASS_VMM                               /* if000c.h */  0x8000000c
29 #define NVIF_CLASS_VMM_NV04                          /* if000d.h */  0x8000000d
30 #define NVIF_CLASS_VMM_NV50                          /* if500d.h */  0x8000500d
31 #define NVIF_CLASS_VMM_GF100                         /* if900d.h */  0x8000900d
32 #define NVIF_CLASS_VMM_GM200                         /* ifb00d.h */  0x8000b00d
33 #define NVIF_CLASS_VMM_GP100                         /* ifc00d.h */  0x8000c00d
34 
35 #define NVIF_CLASS_EVENT                             /* if000e.h */  0x8000000e
36 
37 #define NVIF_CLASS_DISP                              /* if0010.h */  0x80000010
38 #define NVIF_CLASS_CONN                              /* if0011.h */  0x80000011
39 #define NVIF_CLASS_OUTP                              /* if0012.h */  0x80000012
40 #define NVIF_CLASS_HEAD                              /* if0013.h */  0x80000013
41 #define NVIF_CLASS_DISP_CHAN                         /* if0014.h */  0x80000014
42 
43 #define NVIF_CLASS_CHAN                              /* if0020.h */  0x80000020
44 #define NVIF_CLASS_CGRP                              /* if0021.h */  0x80000021
45 
46 /* the below match nvidia-assigned (either in hw, or sw) class numbers */
47 #define NV_NULL_CLASS                                                0x00000030
48 
49 #define NV_DEVICE                                     /* cl0080.h */ 0x00000080
50 
51 #define NV_DMA_FROM_MEMORY                            /* cl0002.h */ 0x00000002
52 #define NV_DMA_TO_MEMORY                              /* cl0002.h */ 0x00000003
53 #define NV_DMA_IN_MEMORY                              /* cl0002.h */ 0x0000003d
54 
55 #define NV50_TWOD                                                    0x0000502d
56 #define FERMI_TWOD_A                                                 0x0000902d
57 
58 #define NV50_MEMORY_TO_MEMORY_FORMAT                                 0x00005039
59 #define FERMI_MEMORY_TO_MEMORY_FORMAT_A                              0x00009039
60 
61 #define KEPLER_INLINE_TO_MEMORY_A                                    0x0000a040
62 #define KEPLER_INLINE_TO_MEMORY_B                                    0x0000a140
63 
64 #define NV04_DISP                                     /* cl0046.h */ 0x00000046
65 
66 #define VOLTA_USERMODE_A                                             0x0000c361
67 #define TURING_USERMODE_A                                            0x0000c461
68 #define AMPERE_USERMODE_A                                            0x0000c561
69 
70 #define MAXWELL_FAULT_BUFFER_A                        /* clb069.h */ 0x0000b069
71 #define VOLTA_FAULT_BUFFER_A                          /* clb069.h */ 0x0000c369
72 
73 #define NV03_CHANNEL_DMA                              /* if0020.h */ 0x0000006b
74 #define NV10_CHANNEL_DMA                              /* if0020.h */ 0x0000006e
75 #define NV17_CHANNEL_DMA                              /* if0020.h */ 0x0000176e
76 #define NV40_CHANNEL_DMA                              /* if0020.h */ 0x0000406e
77 
78 #define KEPLER_CHANNEL_GROUP_A                        /* if0021.h */ 0x0000a06c
79 
80 #define NV50_CHANNEL_GPFIFO                           /* if0020.h */ 0x0000506f
81 #define G82_CHANNEL_GPFIFO                            /* if0020.h */ 0x0000826f
82 #define FERMI_CHANNEL_GPFIFO                          /* if0020.h */ 0x0000906f
83 #define KEPLER_CHANNEL_GPFIFO_A                       /* if0020.h */ 0x0000a06f
84 #define KEPLER_CHANNEL_GPFIFO_B                       /* if0020.h */ 0x0000a16f
85 #define MAXWELL_CHANNEL_GPFIFO_A                      /* if0020.h */ 0x0000b06f
86 #define PASCAL_CHANNEL_GPFIFO_A                       /* if0020.h */ 0x0000c06f
87 #define VOLTA_CHANNEL_GPFIFO_A                        /* if0020.h */ 0x0000c36f
88 #define TURING_CHANNEL_GPFIFO_A                       /* if0020.h */ 0x0000c46f
89 #define AMPERE_CHANNEL_GPFIFO_A                       /* if0020.h */ 0x0000c56f
90 #define AMPERE_CHANNEL_GPFIFO_B                       /* if0020.h */ 0x0000c76f
91 
92 #define NV50_DISP                                     /* if0010.h */ 0x00005070
93 #define G82_DISP                                      /* if0010.h */ 0x00008270
94 #define GT200_DISP                                    /* if0010.h */ 0x00008370
95 #define GT214_DISP                                    /* if0010.h */ 0x00008570
96 #define GT206_DISP                                    /* if0010.h */ 0x00008870
97 #define GF110_DISP                                    /* if0010.h */ 0x00009070
98 #define GK104_DISP                                    /* if0010.h */ 0x00009170
99 #define GK110_DISP                                    /* if0010.h */ 0x00009270
100 #define GM107_DISP                                    /* if0010.h */ 0x00009470
101 #define GM200_DISP                                    /* if0010.h */ 0x00009570
102 #define GP100_DISP                                    /* if0010.h */ 0x00009770
103 #define GP102_DISP                                    /* if0010.h */ 0x00009870
104 #define GV100_DISP                                    /* if0010.h */ 0x0000c370
105 #define TU102_DISP                                    /* if0010.h */ 0x0000c570
106 #define GA102_DISP                                    /* if0010.h */ 0x0000c670
107 
108 #define GV100_DISP_CAPS                                              0x0000c373
109 
110 #define NV31_MPEG                                                    0x00003174
111 #define G82_MPEG                                                     0x00008274
112 
113 #define NV74_VP2                                                     0x00007476
114 
115 #define NV50_DISP_CURSOR                              /* if0014.h */ 0x0000507a
116 #define G82_DISP_CURSOR                               /* if0014.h */ 0x0000827a
117 #define GT214_DISP_CURSOR                             /* if0014.h */ 0x0000857a
118 #define GF110_DISP_CURSOR                             /* if0014.h */ 0x0000907a
119 #define GK104_DISP_CURSOR                             /* if0014.h */ 0x0000917a
120 #define GV100_DISP_CURSOR                             /* if0014.h */ 0x0000c37a
121 #define TU102_DISP_CURSOR                             /* if0014.h */ 0x0000c57a
122 #define GA102_DISP_CURSOR                             /* if0014.h */ 0x0000c67a
123 
124 #define NV50_DISP_OVERLAY                             /* if0014.h */ 0x0000507b
125 #define G82_DISP_OVERLAY                              /* if0014.h */ 0x0000827b
126 #define GT214_DISP_OVERLAY                            /* if0014.h */ 0x0000857b
127 #define GF110_DISP_OVERLAY                            /* if0014.h */ 0x0000907b
128 #define GK104_DISP_OVERLAY                            /* if0014.h */ 0x0000917b
129 
130 #define GV100_DISP_WINDOW_IMM_CHANNEL_DMA             /* if0014.h */ 0x0000c37b
131 #define TU102_DISP_WINDOW_IMM_CHANNEL_DMA             /* if0014.h */ 0x0000c57b
132 #define GA102_DISP_WINDOW_IMM_CHANNEL_DMA             /* if0014.h */ 0x0000c67b
133 
134 #define NV50_DISP_BASE_CHANNEL_DMA                    /* if0014.h */ 0x0000507c
135 #define G82_DISP_BASE_CHANNEL_DMA                     /* if0014.h */ 0x0000827c
136 #define GT200_DISP_BASE_CHANNEL_DMA                   /* if0014.h */ 0x0000837c
137 #define GT214_DISP_BASE_CHANNEL_DMA                   /* if0014.h */ 0x0000857c
138 #define GF110_DISP_BASE_CHANNEL_DMA                   /* if0014.h */ 0x0000907c
139 #define GK104_DISP_BASE_CHANNEL_DMA                   /* if0014.h */ 0x0000917c
140 #define GK110_DISP_BASE_CHANNEL_DMA                   /* if0014.h */ 0x0000927c
141 
142 #define NV50_DISP_CORE_CHANNEL_DMA                    /* if0014.h */ 0x0000507d
143 #define G82_DISP_CORE_CHANNEL_DMA                     /* if0014.h */ 0x0000827d
144 #define GT200_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000837d
145 #define GT214_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000857d
146 #define GT206_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000887d
147 #define GF110_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000907d
148 #define GK104_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000917d
149 #define GK110_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000927d
150 #define GM107_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000947d
151 #define GM200_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000957d
152 #define GP100_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000977d
153 #define GP102_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000987d
154 #define GV100_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000c37d
155 #define TU102_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000c57d
156 #define GA102_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000c67d
157 
158 #define NV50_DISP_OVERLAY_CHANNEL_DMA                 /* if0014.h */ 0x0000507e
159 #define G82_DISP_OVERLAY_CHANNEL_DMA                  /* if0014.h */ 0x0000827e
160 #define GT200_DISP_OVERLAY_CHANNEL_DMA                /* if0014.h */ 0x0000837e
161 #define GT214_DISP_OVERLAY_CHANNEL_DMA                /* if0014.h */ 0x0000857e
162 #define GF110_DISP_OVERLAY_CONTROL_DMA                /* if0014.h */ 0x0000907e
163 #define GK104_DISP_OVERLAY_CONTROL_DMA                /* if0014.h */ 0x0000917e
164 
165 #define GV100_DISP_WINDOW_CHANNEL_DMA                 /* if0014.h */ 0x0000c37e
166 #define TU102_DISP_WINDOW_CHANNEL_DMA                 /* if0014.h */ 0x0000c57e
167 #define GA102_DISP_WINDOW_CHANNEL_DMA                 /* if0014.h */ 0x0000c67e
168 
169 #define NV50_TESLA                                                   0x00005097
170 #define G82_TESLA                                                    0x00008297
171 #define GT200_TESLA                                                  0x00008397
172 #define GT214_TESLA                                                  0x00008597
173 #define GT21A_TESLA                                                  0x00008697
174 
175 #define FERMI_A                                       /* cl9097.h */ 0x00009097
176 #define FERMI_B                                       /* cl9097.h */ 0x00009197
177 #define FERMI_C                                       /* cl9097.h */ 0x00009297
178 
179 #define KEPLER_A                                      /* cl9097.h */ 0x0000a097
180 #define KEPLER_B                                      /* cl9097.h */ 0x0000a197
181 #define KEPLER_C                                      /* cl9097.h */ 0x0000a297
182 
183 #define MAXWELL_A                                     /* cl9097.h */ 0x0000b097
184 #define MAXWELL_B                                     /* cl9097.h */ 0x0000b197
185 
186 #define PASCAL_A                                      /* cl9097.h */ 0x0000c097
187 #define PASCAL_B                                      /* cl9097.h */ 0x0000c197
188 
189 #define VOLTA_A                                       /* cl9097.h */ 0x0000c397
190 
191 #define TURING_A                                      /* cl9097.h */ 0x0000c597
192 
193 #define AMPERE_B                                      /* cl9097.h */ 0x0000c797
194 
195 #define NV74_BSP                                                     0x000074b0
196 
197 #define GT212_MSVLD                                                  0x000085b1
198 #define IGT21A_MSVLD                                                 0x000086b1
199 #define G98_MSVLD                                                    0x000088b1
200 #define GF100_MSVLD                                                  0x000090b1
201 #define GK104_MSVLD                                                  0x000095b1
202 
203 #define GT212_MSPDEC                                                 0x000085b2
204 #define G98_MSPDEC                                                   0x000088b2
205 #define GF100_MSPDEC                                                 0x000090b2
206 #define GK104_MSPDEC                                                 0x000095b2
207 
208 #define GT212_MSPPP                                                  0x000085b3
209 #define G98_MSPPP                                                    0x000088b3
210 #define GF100_MSPPP                                                  0x000090b3
211 
212 #define G98_SEC                                                      0x000088b4
213 
214 #define GT212_DMA                                                    0x000085b5
215 #define FERMI_DMA                                                    0x000090b5
216 #define KEPLER_DMA_COPY_A                                            0x0000a0b5
217 #define MAXWELL_DMA_COPY_A                                           0x0000b0b5
218 #define PASCAL_DMA_COPY_A                                            0x0000c0b5
219 #define PASCAL_DMA_COPY_B                                            0x0000c1b5
220 #define VOLTA_DMA_COPY_A                                             0x0000c3b5
221 #define TURING_DMA_COPY_A                                            0x0000c5b5
222 #define AMPERE_DMA_COPY_A                                            0x0000c6b5
223 #define AMPERE_DMA_COPY_B                                            0x0000c7b5
224 
225 #define FERMI_DECOMPRESS                                             0x000090b8
226 
227 #define NV50_COMPUTE                                                 0x000050c0
228 #define GT214_COMPUTE                                                0x000085c0
229 #define FERMI_COMPUTE_A                                              0x000090c0
230 #define FERMI_COMPUTE_B                                              0x000091c0
231 #define KEPLER_COMPUTE_A                                             0x0000a0c0
232 #define KEPLER_COMPUTE_B                                             0x0000a1c0
233 #define MAXWELL_COMPUTE_A                                            0x0000b0c0
234 #define MAXWELL_COMPUTE_B                                            0x0000b1c0
235 #define PASCAL_COMPUTE_A                                             0x0000c0c0
236 #define PASCAL_COMPUTE_B                                             0x0000c1c0
237 #define VOLTA_COMPUTE_A                                              0x0000c3c0
238 #define TURING_COMPUTE_A                                             0x0000c5c0
239 #define AMPERE_COMPUTE_B                                             0x0000c7c0
240 
241 #define NV74_CIPHER                                                  0x000074c1
242 #endif
243