1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2022 Richtek Technology Corp. 4 * 5 * Authors: Alina Yu <alina_yu@richtek.com> 6 * ChiYuan Huang <cy_huang@richtek.com> 7 */ 8 9 #include <linux/bits.h> 10 #include <linux/gpio/consumer.h> 11 #include <linux/i2c.h> 12 #include <linux/interrupt.h> 13 #include <linux/kstrtox.h> 14 #include <linux/linear_range.h> 15 #include <linux/mod_devicetable.h> 16 #include <linux/module.h> 17 #include <linux/mutex.h> 18 #include <linux/of.h> 19 #include <linux/power_supply.h> 20 #include <linux/regmap.h> 21 #include <linux/regulator/driver.h> 22 #include <linux/sysfs.h> 23 24 #define RT9471_REG_OTGCFG 0x00 25 #define RT9471_REG_TOP 0x01 26 #define RT9471_REG_FUNC 0x02 27 #define RT9471_REG_IBUS 0x03 28 #define RT9471_REG_VBUS 0x04 29 #define RT9471_REG_PRECHG 0x05 30 #define RT9471_REG_VCHG 0x07 31 #define RT9471_REG_ICHG 0x08 32 #define RT9471_REG_CHGTMR 0x09 33 #define RT9471_REG_EOC 0x0A 34 #define RT9471_REG_INFO 0x0B 35 #define RT9471_REG_JEITA 0x0C 36 #define RT9471_REG_PUMP_EXP 0x0D 37 #define RT9471_REG_DPDMDET 0x0E 38 #define RT9471_REG_ICSTAT 0x0F 39 #define RT9471_REG_STAT0 0x10 40 #define RT9471_REG_STAT1 0x11 41 #define RT9471_REG_STAT2 0x12 42 #define RT9471_REG_IRQ0 0x20 43 #define RT9471_REG_MASK0 0x30 44 45 #define RT9471_OTGCV_MASK GENMASK(7, 6) 46 #define RT9471_OTGCC_MASK BIT(0) 47 #define RT9471_OTGEN_MASK BIT(1) 48 #define RT9471_CHGFAULT_MASK GENMASK(4, 1) 49 50 #define RT9471_NUM_IRQ_REGS 4 51 #define RT9471_OTGCV_MINUV 4850000 52 #define RT9471_OTGCV_STEPUV 150000 53 #define RT9471_NUM_VOTG 4 54 #define RT9471_VCHG_MAXUV 4700000 55 #define RT9471_ICHG_MAXUA 3150000 56 57 /* Device ID */ 58 #define RT9470_DEVID 0x09 59 #define RT9470D_DEVID 0x0A 60 #define RT9471_DEVID 0x0D 61 #define RT9471D_DEVID 0x0E 62 63 /* IRQ number */ 64 #define RT9471_IRQ_BC12_DONE 0 65 #define RT9471_IRQ_DETACH 1 66 #define RT9471_IRQ_RECHG 2 67 #define RT9471_IRQ_CHG_DONE 3 68 #define RT9471_IRQ_BG_CHG 4 69 #define RT9471_IRQ_IE0C 5 70 #define RT9471_IRQ_CHG_RDY 6 71 #define RT9471_IRQ_VBUS_GD 7 72 #define RT9471_IRQ_CHG_BATOV 9 73 #define RT9471_IRQ_CHG_SYSOV 10 74 #define RT9471_IRQ_CHG_TOUT 11 75 #define RT9471_IRQ_CHG_BUSUV 12 76 #define RT9471_IRQ_CHG_THREG 13 77 #define RT9471_IRQ_CHG_AICR 14 78 #define RT9471_IRQ_CHG_MIVR 15 79 #define RT9471_IRQ_SYS_SHORT 16 80 #define RT9471_IRQ_SYS_MIN 17 81 #define RT9471_IRQ_AICC_DONE 18 82 #define RT9471_IRQ_PE_DONE 19 83 #define RT9471_IRQ_JEITA_COLD 20 84 #define RT9471_IRQ_JEITA_COOL 21 85 #define RT9471_IRQ_JEITA_WARM 22 86 #define RT9471_IRQ_JEITA_HOT 23 87 #define RT9471_IRQ_OTG_FAULT 24 88 #define RT9471_IRQ_OTG_LBP 25 89 #define RT9471_IRQ_OTG_CC 26 90 #define RT9471_IRQ_WDT 29 91 #define RT9471_IRQ_VAC_OV 30 92 #define RT9471_IRQ_OTP 31 93 94 enum rt9471_fields { 95 F_WDT = 0, 96 F_WDT_RST, 97 F_CHG_EN, 98 F_HZ, 99 F_BATFET_DIS, 100 F_AICR, 101 F_AICC_EN, 102 F_MIVR, 103 F_IPRE_CHG, 104 F_VPRE_CHG, 105 F_VBAT_REG, 106 F_ICHG_REG, 107 F_EOC_RST, 108 F_TE, 109 F_IEOC_CHG, 110 F_DEVICE_ID, 111 F_REG_RST, 112 F_BC12_EN, 113 F_IC_STAT, 114 F_PORT_STAT, 115 F_ST_CHG_DONE, 116 F_ST_CHG_RDY, 117 F_ST_VBUS_GD, 118 F_MAX_FIELDS 119 }; 120 121 enum rt9471_ranges { 122 RT9471_RANGE_AICR = 0, 123 RT9471_RANGE_MIVR, 124 RT9471_RANGE_IPRE, 125 RT9471_RANGE_VCHG, 126 RT9471_RANGE_ICHG, 127 RT9471_RANGE_IEOC, 128 RT9471_MAX_RANGES 129 }; 130 131 enum { 132 RT9471_PORTSTAT_APPLE_10W = 8, 133 RT9471_PORTSTAT_SAMSUNG_10W, 134 RT9471_PORTSTAT_APPLE_5W, 135 RT9471_PORTSTAT_APPLE_12W, 136 RT9471_PORTSTAT_NSTD, 137 RT9471_PORTSTAT_SDP, 138 RT9471_PORTSTAT_CDP, 139 RT9471_PORTSTAT_DCP, 140 }; 141 142 enum { 143 RT9471_ICSTAT_SLEEP = 0, 144 RT9471_ICSTAT_VBUSRDY, 145 RT9471_ICSTAT_TRICKLECHG, 146 RT9471_ICSTAT_PRECHG, 147 RT9471_ICSTAT_FASTCHG, 148 RT9471_ICSTAT_IEOC, 149 RT9471_ICSTAT_BGCHG, 150 RT9471_ICSTAT_CHGDONE, 151 RT9471_ICSTAT_CHGFAULT, 152 RT9471_ICSTAT_OTG = 15, 153 }; 154 155 struct rt9471_chip { 156 struct device *dev; 157 struct regmap *regmap; 158 struct regmap_field *rm_fields[F_MAX_FIELDS]; 159 struct regmap_irq_chip_data *irq_chip_data; 160 struct regulator_dev *otg_rdev; 161 struct power_supply *psy; 162 struct power_supply_desc psy_desc; 163 struct mutex var_lock; 164 enum power_supply_usb_type psy_usb_type; 165 int psy_usb_curr; 166 }; 167 168 static const struct reg_field rt9471_reg_fields[F_MAX_FIELDS] = { 169 [F_WDT] = REG_FIELD(RT9471_REG_TOP, 0, 1), 170 [F_WDT_RST] = REG_FIELD(RT9471_REG_TOP, 2, 2), 171 [F_CHG_EN] = REG_FIELD(RT9471_REG_FUNC, 0, 0), 172 [F_HZ] = REG_FIELD(RT9471_REG_FUNC, 5, 5), 173 [F_BATFET_DIS] = REG_FIELD(RT9471_REG_FUNC, 7, 7), 174 [F_AICR] = REG_FIELD(RT9471_REG_IBUS, 0, 5), 175 [F_AICC_EN] = REG_FIELD(RT9471_REG_IBUS, 7, 7), 176 [F_MIVR] = REG_FIELD(RT9471_REG_VBUS, 0, 3), 177 [F_IPRE_CHG] = REG_FIELD(RT9471_REG_PRECHG, 0, 3), 178 [F_VPRE_CHG] = REG_FIELD(RT9471_REG_PRECHG, 4, 6), 179 [F_VBAT_REG] = REG_FIELD(RT9471_REG_VCHG, 0, 6), 180 [F_ICHG_REG] = REG_FIELD(RT9471_REG_ICHG, 0, 5), 181 [F_EOC_RST] = REG_FIELD(RT9471_REG_EOC, 0, 0), 182 [F_TE] = REG_FIELD(RT9471_REG_EOC, 1, 1), 183 [F_IEOC_CHG] = REG_FIELD(RT9471_REG_EOC, 4, 7), 184 [F_DEVICE_ID] = REG_FIELD(RT9471_REG_INFO, 3, 6), 185 [F_REG_RST] = REG_FIELD(RT9471_REG_INFO, 7, 7), 186 [F_BC12_EN] = REG_FIELD(RT9471_REG_DPDMDET, 7, 7), 187 [F_IC_STAT] = REG_FIELD(RT9471_REG_ICSTAT, 0, 3), 188 [F_PORT_STAT] = REG_FIELD(RT9471_REG_ICSTAT, 4, 7), 189 [F_ST_CHG_DONE] = REG_FIELD(RT9471_REG_STAT0, 3, 3), 190 [F_ST_CHG_RDY] = REG_FIELD(RT9471_REG_STAT0, 6, 6), 191 [F_ST_VBUS_GD] = REG_FIELD(RT9471_REG_STAT0, 7, 7), 192 }; 193 194 static const struct linear_range rt9471_chg_ranges[RT9471_MAX_RANGES] = { 195 [RT9471_RANGE_AICR] = { .min = 50000, .min_sel = 1, .max_sel = 63, .step = 50000 }, 196 [RT9471_RANGE_MIVR] = { .min = 3900000, .min_sel = 0, .max_sel = 15, .step = 100000 }, 197 [RT9471_RANGE_IPRE] = { .min = 50000, .min_sel = 0, .max_sel = 15, .step = 50000 }, 198 [RT9471_RANGE_VCHG] = { .min = 3900000, .min_sel = 0, .max_sel = 80, .step = 10000 }, 199 [RT9471_RANGE_ICHG] = { .min = 0, .min_sel = 0, .max_sel = 63, .step = 50000 }, 200 [RT9471_RANGE_IEOC] = { .min = 50000, .min_sel = 0, .max_sel = 15, .step = 50000 }, 201 }; 202 rt9471_set_value_by_field_range(struct rt9471_chip * chip,enum rt9471_fields field,enum rt9471_ranges range,int val)203 static int rt9471_set_value_by_field_range(struct rt9471_chip *chip, 204 enum rt9471_fields field, 205 enum rt9471_ranges range, int val) 206 { 207 unsigned int sel; 208 209 if (val < 0) 210 return -EINVAL; 211 212 linear_range_get_selector_within(rt9471_chg_ranges + range, val, &sel); 213 214 return regmap_field_write(chip->rm_fields[field], sel); 215 } 216 217 rt9471_get_value_by_field_range(struct rt9471_chip * chip,enum rt9471_fields field,enum rt9471_ranges range,int * val)218 static int rt9471_get_value_by_field_range(struct rt9471_chip *chip, 219 enum rt9471_fields field, 220 enum rt9471_ranges range, int *val) 221 { 222 unsigned int sel, rvalue; 223 int ret; 224 225 ret = regmap_field_read(chip->rm_fields[field], &sel); 226 if (ret) 227 return ret; 228 229 ret = linear_range_get_value(rt9471_chg_ranges + range, sel, &rvalue); 230 if (ret) 231 return ret; 232 233 *val = rvalue; 234 return 0; 235 } 236 rt9471_set_ieoc(struct rt9471_chip * chip,int microamp)237 static int rt9471_set_ieoc(struct rt9471_chip *chip, int microamp) 238 { 239 int ret; 240 241 if (microamp == 0) 242 return regmap_field_write(chip->rm_fields[F_TE], 0); 243 244 ret = rt9471_set_value_by_field_range(chip, F_IEOC_CHG, RT9471_RANGE_IEOC, microamp); 245 if (ret) 246 return ret; 247 248 /* After applying the new IEOC value, enable charge termination */ 249 return regmap_field_write(chip->rm_fields[F_TE], 1); 250 } 251 rt9471_get_ieoc(struct rt9471_chip * chip,int * microamp)252 static int rt9471_get_ieoc(struct rt9471_chip *chip, int *microamp) 253 { 254 unsigned int chg_term_enable; 255 int ret; 256 257 ret = regmap_field_read(chip->rm_fields[F_TE], &chg_term_enable); 258 if (ret) 259 return ret; 260 261 if (!chg_term_enable) { 262 *microamp = 0; 263 return 0; 264 } 265 266 return rt9471_get_value_by_field_range(chip, F_IEOC_CHG, RT9471_RANGE_IEOC, microamp); 267 } 268 rt9471_get_status(struct rt9471_chip * chip,int * status)269 static int rt9471_get_status(struct rt9471_chip *chip, int *status) 270 { 271 unsigned int ic_stat; 272 int ret; 273 274 ret = regmap_field_read(chip->rm_fields[F_IC_STAT], &ic_stat); 275 if (ret) 276 return ret; 277 278 switch (ic_stat) { 279 case RT9471_ICSTAT_VBUSRDY: 280 case RT9471_ICSTAT_CHGFAULT: 281 *status = POWER_SUPPLY_STATUS_NOT_CHARGING; 282 break; 283 case RT9471_ICSTAT_TRICKLECHG ... RT9471_ICSTAT_BGCHG: 284 *status = POWER_SUPPLY_STATUS_CHARGING; 285 break; 286 case RT9471_ICSTAT_CHGDONE: 287 *status = POWER_SUPPLY_STATUS_FULL; 288 break; 289 case RT9471_ICSTAT_SLEEP: 290 case RT9471_ICSTAT_OTG: 291 *status = POWER_SUPPLY_STATUS_DISCHARGING; 292 break; 293 default: 294 *status = POWER_SUPPLY_STATUS_UNKNOWN; 295 break; 296 } 297 298 return 0; 299 } 300 rt9471_get_vbus_good(struct rt9471_chip * chip,int * stat)301 static int rt9471_get_vbus_good(struct rt9471_chip *chip, int *stat) 302 { 303 unsigned int vbus_gd; 304 int ret; 305 306 ret = regmap_field_read(chip->rm_fields[F_ST_VBUS_GD], &vbus_gd); 307 if (ret) 308 return ret; 309 310 *stat = vbus_gd; 311 return 0; 312 } 313 rt9471_get_usb_type(struct rt9471_chip * chip,int * usb_type)314 static int rt9471_get_usb_type(struct rt9471_chip *chip, int *usb_type) 315 { 316 mutex_lock(&chip->var_lock); 317 *usb_type = chip->psy_usb_type; 318 mutex_unlock(&chip->var_lock); 319 320 return 0; 321 } 322 rt9471_get_usb_type_current(struct rt9471_chip * chip,int * microamp)323 static int rt9471_get_usb_type_current(struct rt9471_chip *chip, 324 int *microamp) 325 { 326 mutex_lock(&chip->var_lock); 327 *microamp = chip->psy_usb_curr; 328 mutex_unlock(&chip->var_lock); 329 330 return 0; 331 } 332 333 static enum power_supply_property rt9471_charger_properties[] = { 334 POWER_SUPPLY_PROP_STATUS, 335 POWER_SUPPLY_PROP_ONLINE, 336 POWER_SUPPLY_PROP_CURRENT_MAX, 337 POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT, 338 POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX, 339 POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE, 340 POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX, 341 POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, 342 POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT, 343 POWER_SUPPLY_PROP_USB_TYPE, 344 POWER_SUPPLY_PROP_PRECHARGE_CURRENT, 345 POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT, 346 POWER_SUPPLY_PROP_MODEL_NAME, 347 POWER_SUPPLY_PROP_MANUFACTURER, 348 }; 349 350 static enum power_supply_usb_type rt9471_charger_usb_types[] = { 351 POWER_SUPPLY_USB_TYPE_UNKNOWN, 352 POWER_SUPPLY_USB_TYPE_SDP, 353 POWER_SUPPLY_USB_TYPE_DCP, 354 POWER_SUPPLY_USB_TYPE_CDP, 355 POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID, 356 }; 357 rt9471_charger_property_is_writeable(struct power_supply * psy,enum power_supply_property psp)358 static int rt9471_charger_property_is_writeable(struct power_supply *psy, 359 enum power_supply_property psp) 360 { 361 switch (psp) { 362 case POWER_SUPPLY_PROP_STATUS: 363 case POWER_SUPPLY_PROP_ONLINE: 364 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: 365 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE: 366 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: 367 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT: 368 case POWER_SUPPLY_PROP_PRECHARGE_CURRENT: 369 case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT: 370 return 1; 371 default: 372 return 0; 373 } 374 } 375 rt9471_charger_set_property(struct power_supply * psy,enum power_supply_property psp,const union power_supply_propval * val)376 static int rt9471_charger_set_property(struct power_supply *psy, 377 enum power_supply_property psp, 378 const union power_supply_propval *val) 379 { 380 struct rt9471_chip *chip = power_supply_get_drvdata(psy); 381 int value = val->intval; 382 383 switch (psp) { 384 case POWER_SUPPLY_PROP_STATUS: 385 return regmap_field_write(chip->rm_fields[F_CHG_EN], !!value); 386 case POWER_SUPPLY_PROP_ONLINE: 387 return regmap_field_write(chip->rm_fields[F_HZ], !value); 388 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: 389 return rt9471_set_value_by_field_range(chip, F_ICHG_REG, RT9471_RANGE_ICHG, value); 390 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE: 391 return rt9471_set_value_by_field_range(chip, F_VBAT_REG, RT9471_RANGE_VCHG, value); 392 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: 393 return rt9471_set_value_by_field_range(chip, F_AICR, RT9471_RANGE_AICR, value); 394 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT: 395 return rt9471_set_value_by_field_range(chip, F_MIVR, RT9471_RANGE_MIVR, value); 396 case POWER_SUPPLY_PROP_PRECHARGE_CURRENT: 397 return rt9471_set_value_by_field_range(chip, F_IPRE_CHG, RT9471_RANGE_IPRE, value); 398 case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT: 399 return rt9471_set_ieoc(chip, val->intval); 400 default: 401 return -EINVAL; 402 } 403 } 404 405 static const char * const rt9471_manufacturer = "Richtek Technology Corp."; 406 static const char * const rt9471_model = "RT9471"; 407 rt9471_charger_get_property(struct power_supply * psy,enum power_supply_property psp,union power_supply_propval * val)408 static int rt9471_charger_get_property(struct power_supply *psy, 409 enum power_supply_property psp, 410 union power_supply_propval *val) 411 { 412 struct rt9471_chip *chip = power_supply_get_drvdata(psy); 413 int *pvalue = &val->intval; 414 415 switch (psp) { 416 case POWER_SUPPLY_PROP_STATUS: 417 return rt9471_get_status(chip, pvalue); 418 case POWER_SUPPLY_PROP_ONLINE: 419 return rt9471_get_vbus_good(chip, pvalue); 420 case POWER_SUPPLY_PROP_CURRENT_MAX: 421 return rt9471_get_usb_type_current(chip, pvalue); 422 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: 423 return rt9471_get_value_by_field_range(chip, F_ICHG_REG, RT9471_RANGE_ICHG, pvalue); 424 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX: 425 *pvalue = RT9471_ICHG_MAXUA; 426 return 0; 427 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE: 428 return rt9471_get_value_by_field_range(chip, F_VBAT_REG, RT9471_RANGE_VCHG, pvalue); 429 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX: 430 val->intval = RT9471_VCHG_MAXUV; 431 return 0; 432 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: 433 return rt9471_get_value_by_field_range(chip, F_AICR, RT9471_RANGE_AICR, pvalue); 434 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT: 435 return rt9471_get_value_by_field_range(chip, F_MIVR, RT9471_RANGE_MIVR, pvalue); 436 case POWER_SUPPLY_PROP_USB_TYPE: 437 return rt9471_get_usb_type(chip, pvalue); 438 case POWER_SUPPLY_PROP_PRECHARGE_CURRENT: 439 return rt9471_get_value_by_field_range(chip, F_IPRE_CHG, RT9471_RANGE_IPRE, pvalue); 440 case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT: 441 return rt9471_get_ieoc(chip, pvalue); 442 case POWER_SUPPLY_PROP_MODEL_NAME: 443 val->strval = rt9471_model; 444 return 0; 445 case POWER_SUPPLY_PROP_MANUFACTURER: 446 val->strval = rt9471_manufacturer; 447 return 0; 448 default: 449 return -ENODATA; 450 } 451 } 452 rt9471_vbus_gd_handler(int irqno,void * devid)453 static irqreturn_t rt9471_vbus_gd_handler(int irqno, void *devid) 454 { 455 struct rt9471_chip *chip = devid; 456 457 power_supply_changed(chip->psy); 458 459 return IRQ_HANDLED; 460 } 461 rt9471_detach_handler(int irqno,void * devid)462 static irqreturn_t rt9471_detach_handler(int irqno, void *devid) 463 { 464 struct rt9471_chip *chip = devid; 465 unsigned int vbus_gd; 466 int ret; 467 468 ret = regmap_field_read(chip->rm_fields[F_ST_VBUS_GD], &vbus_gd); 469 if (ret) 470 return IRQ_NONE; 471 472 /* Only focus on really detached */ 473 if (vbus_gd) 474 return IRQ_HANDLED; 475 476 mutex_lock(&chip->var_lock); 477 chip->psy_usb_type = POWER_SUPPLY_USB_TYPE_UNKNOWN; 478 chip->psy_usb_curr = 0; 479 mutex_unlock(&chip->var_lock); 480 481 power_supply_changed(chip->psy); 482 483 return IRQ_HANDLED; 484 } 485 rt9471_bc12_done_handler(int irqno,void * devid)486 static irqreturn_t rt9471_bc12_done_handler(int irqno, void *devid) 487 { 488 struct rt9471_chip *chip = devid; 489 enum power_supply_usb_type usb_type; 490 unsigned int port_stat; 491 int usb_curr, ret; 492 493 ret = regmap_field_read(chip->rm_fields[F_PORT_STAT], &port_stat); 494 if (ret) 495 return IRQ_NONE; 496 497 switch (port_stat) { 498 case RT9471_PORTSTAT_APPLE_10W: 499 usb_type = POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID; 500 usb_curr = 2000000; 501 break; 502 case RT9471_PORTSTAT_APPLE_5W: 503 usb_type = POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID; 504 usb_curr = 1000000; 505 break; 506 case RT9471_PORTSTAT_APPLE_12W: 507 usb_type = POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID; 508 usb_curr = 2400000; 509 break; 510 case RT9471_PORTSTAT_SAMSUNG_10W: 511 usb_type = POWER_SUPPLY_USB_TYPE_DCP; 512 usb_curr = 2000000; 513 break; 514 case RT9471_PORTSTAT_DCP: 515 usb_type = POWER_SUPPLY_USB_TYPE_DCP; 516 usb_curr = 1500000; 517 break; 518 case RT9471_PORTSTAT_NSTD: 519 case RT9471_PORTSTAT_SDP: 520 usb_type = POWER_SUPPLY_USB_TYPE_SDP; 521 usb_curr = 500000; 522 break; 523 case RT9471_PORTSTAT_CDP: 524 usb_type = POWER_SUPPLY_USB_TYPE_CDP; 525 usb_curr = 1500000; 526 break; 527 default: 528 usb_type = POWER_SUPPLY_USB_TYPE_UNKNOWN; 529 usb_curr = 0; 530 break; 531 } 532 533 mutex_lock(&chip->var_lock); 534 chip->psy_usb_type = usb_type; 535 chip->psy_usb_curr = usb_curr; 536 mutex_unlock(&chip->var_lock); 537 538 power_supply_changed(chip->psy); 539 540 return IRQ_HANDLED; 541 } 542 rt9471_wdt_handler(int irqno,void * devid)543 static irqreturn_t rt9471_wdt_handler(int irqno, void *devid) 544 { 545 struct rt9471_chip *chip = devid; 546 int ret; 547 548 ret = regmap_field_write(chip->rm_fields[F_WDT_RST], 1); 549 550 return ret ? IRQ_NONE : IRQ_HANDLED; 551 } 552 rt9471_otg_fault_handler(int irqno,void * devid)553 static irqreturn_t rt9471_otg_fault_handler(int irqno, void *devid) 554 { 555 struct rt9471_chip *chip = devid; 556 557 regulator_notifier_call_chain(chip->otg_rdev, REGULATOR_EVENT_FAIL, NULL); 558 559 return IRQ_HANDLED; 560 } 561 562 #define RT9471_IRQ_DESC(_name, _hwirq) \ 563 { \ 564 .name = #_name, \ 565 .hwirq = _hwirq, \ 566 .handler = rt9471_##_name##_handler, \ 567 } 568 rt9471_register_interrupts(struct rt9471_chip * chip)569 static int rt9471_register_interrupts(struct rt9471_chip *chip) 570 { 571 struct device *dev = chip->dev; 572 static const struct { 573 char *name; 574 int hwirq; 575 irq_handler_t handler; 576 } chg_irqs[] = { 577 RT9471_IRQ_DESC(vbus_gd, RT9471_IRQ_VBUS_GD), 578 RT9471_IRQ_DESC(detach, RT9471_IRQ_DETACH), 579 RT9471_IRQ_DESC(bc12_done, RT9471_IRQ_BC12_DONE), 580 RT9471_IRQ_DESC(wdt, RT9471_IRQ_WDT), 581 RT9471_IRQ_DESC(otg_fault, RT9471_IRQ_OTG_FAULT), 582 }, *curr; 583 int i, virq, ret; 584 585 for (i = 0; i < ARRAY_SIZE(chg_irqs); i++) { 586 curr = chg_irqs + i; 587 588 virq = regmap_irq_get_virq(chip->irq_chip_data, curr->hwirq); 589 if (virq <= 0) 590 return virq; 591 592 ret = devm_request_threaded_irq(dev, virq, NULL, curr->handler, 593 IRQF_ONESHOT, curr->name, chip); 594 if (ret) 595 return dev_err_probe(dev, ret, "Failed to register IRQ (%s)\n", 596 curr->name); 597 } 598 599 return 0; 600 } 601 602 static const struct regulator_ops rt9471_otg_ops = { 603 .enable = regulator_enable_regmap, 604 .disable = regulator_disable_regmap, 605 .is_enabled = regulator_is_enabled_regmap, 606 .list_voltage = regulator_list_voltage_linear, 607 .get_voltage_sel = regulator_get_voltage_sel_regmap, 608 .set_voltage_sel = regulator_set_voltage_sel_regmap, 609 .set_current_limit = regulator_set_current_limit_regmap, 610 .get_current_limit = regulator_get_current_limit_regmap, 611 }; 612 613 static const unsigned int rt9471_otg_microamp[] = { 500000, 1200000, }; 614 615 static const struct regulator_desc rt9471_otg_rdesc = { 616 .of_match = of_match_ptr("usb-otg-vbus-regulator"), 617 .name = "rt9471-otg-vbus", 618 .owner = THIS_MODULE, 619 .type = REGULATOR_VOLTAGE, 620 .ops = &rt9471_otg_ops, 621 .min_uV = RT9471_OTGCV_MINUV, 622 .uV_step = RT9471_OTGCV_STEPUV, 623 .n_voltages = RT9471_NUM_VOTG, 624 .curr_table = rt9471_otg_microamp, 625 .n_current_limits = ARRAY_SIZE(rt9471_otg_microamp), 626 .enable_mask = RT9471_OTGEN_MASK, 627 .enable_reg = RT9471_REG_FUNC, 628 .vsel_reg = RT9471_REG_OTGCFG, 629 .vsel_mask = RT9471_OTGCV_MASK, 630 .csel_reg = RT9471_REG_OTGCFG, 631 .csel_mask = RT9471_OTGCC_MASK, 632 }; 633 rt9471_register_otg_regulator(struct rt9471_chip * chip)634 static int rt9471_register_otg_regulator(struct rt9471_chip *chip) 635 { 636 struct device *dev = chip->dev; 637 struct regulator_config cfg = { .dev = dev, .driver_data = chip }; 638 639 chip->otg_rdev = devm_regulator_register(dev, &rt9471_otg_rdesc, &cfg); 640 641 return PTR_ERR_OR_ZERO(chip->otg_rdev); 642 } 643 psy_device_to_chip(struct device * dev)644 static inline struct rt9471_chip *psy_device_to_chip(struct device *dev) 645 { 646 return power_supply_get_drvdata(to_power_supply(dev)); 647 } 648 sysoff_enable_show(struct device * dev,struct device_attribute * attr,char * buf)649 static ssize_t sysoff_enable_show(struct device *dev, 650 struct device_attribute *attr, char *buf) 651 { 652 struct rt9471_chip *chip = psy_device_to_chip(dev); 653 unsigned int sysoff_enable; 654 int ret; 655 656 ret = regmap_field_read(chip->rm_fields[F_BATFET_DIS], &sysoff_enable); 657 if (ret) 658 return ret; 659 660 return sysfs_emit(buf, "%d\n", sysoff_enable); 661 } 662 sysoff_enable_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)663 static ssize_t sysoff_enable_store(struct device *dev, 664 struct device_attribute *attr, 665 const char *buf, size_t count) 666 { 667 struct rt9471_chip *chip = psy_device_to_chip(dev); 668 unsigned int tmp; 669 int ret; 670 671 ret = kstrtouint(buf, 10, &tmp); 672 if (ret) 673 return ret; 674 675 ret = regmap_field_write(chip->rm_fields[F_BATFET_DIS], !!tmp); 676 if (ret) 677 return ret; 678 679 return count; 680 } 681 port_detect_enable_show(struct device * dev,struct device_attribute * attr,char * buf)682 static ssize_t port_detect_enable_show(struct device *dev, 683 struct device_attribute *attr, char *buf) 684 { 685 struct rt9471_chip *chip = psy_device_to_chip(dev); 686 unsigned int bc12_enable; 687 int ret; 688 689 ret = regmap_field_read(chip->rm_fields[F_BC12_EN], &bc12_enable); 690 if (ret) 691 return ret; 692 693 return sysfs_emit(buf, "%d\n", bc12_enable); 694 } 695 port_detect_enable_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)696 static ssize_t port_detect_enable_store(struct device *dev, 697 struct device_attribute *attr, 698 const char *buf, size_t count) 699 { 700 struct rt9471_chip *chip = psy_device_to_chip(dev); 701 unsigned int tmp; 702 int ret; 703 704 ret = kstrtouint(buf, 10, &tmp); 705 if (ret) 706 return ret; 707 708 ret = regmap_field_write(chip->rm_fields[F_BC12_EN], !!tmp); 709 if (ret) 710 return ret; 711 712 return count; 713 } 714 715 static DEVICE_ATTR_RW(sysoff_enable); 716 static DEVICE_ATTR_RW(port_detect_enable); 717 718 static struct attribute *rt9471_sysfs_attrs[] = { 719 &dev_attr_sysoff_enable.attr, 720 &dev_attr_port_detect_enable.attr, 721 NULL 722 }; 723 724 ATTRIBUTE_GROUPS(rt9471_sysfs); 725 rt9471_register_psy(struct rt9471_chip * chip)726 static int rt9471_register_psy(struct rt9471_chip *chip) 727 { 728 struct device *dev = chip->dev; 729 struct power_supply_desc *desc = &chip->psy_desc; 730 struct power_supply_config cfg = {}; 731 char *psy_name; 732 733 cfg.drv_data = chip; 734 cfg.of_node = dev->of_node; 735 cfg.attr_grp = rt9471_sysfs_groups; 736 737 psy_name = devm_kasprintf(dev, GFP_KERNEL, "rt9471-%s", dev_name(dev)); 738 if (!psy_name) 739 return -ENOMEM; 740 741 desc->name = psy_name; 742 desc->type = POWER_SUPPLY_TYPE_USB; 743 desc->usb_types = rt9471_charger_usb_types; 744 desc->num_usb_types = ARRAY_SIZE(rt9471_charger_usb_types); 745 desc->properties = rt9471_charger_properties; 746 desc->num_properties = ARRAY_SIZE(rt9471_charger_properties); 747 desc->get_property = rt9471_charger_get_property; 748 desc->set_property = rt9471_charger_set_property; 749 desc->property_is_writeable = rt9471_charger_property_is_writeable; 750 751 chip->psy = devm_power_supply_register(dev, desc, &cfg); 752 753 return PTR_ERR_OR_ZERO(chip->psy); 754 } 755 756 static const struct regmap_irq rt9471_regmap_irqs[] = { 757 REGMAP_IRQ_REG_LINE(RT9471_IRQ_BC12_DONE, 8), 758 REGMAP_IRQ_REG_LINE(RT9471_IRQ_DETACH, 8), 759 REGMAP_IRQ_REG_LINE(RT9471_IRQ_RECHG, 8), 760 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_DONE, 8), 761 REGMAP_IRQ_REG_LINE(RT9471_IRQ_BG_CHG, 8), 762 REGMAP_IRQ_REG_LINE(RT9471_IRQ_IE0C, 8), 763 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_RDY, 8), 764 REGMAP_IRQ_REG_LINE(RT9471_IRQ_VBUS_GD, 8), 765 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_BATOV, 8), 766 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_SYSOV, 8), 767 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_TOUT, 8), 768 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_BUSUV, 8), 769 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_THREG, 8), 770 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_AICR, 8), 771 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_MIVR, 8), 772 REGMAP_IRQ_REG_LINE(RT9471_IRQ_SYS_SHORT, 8), 773 REGMAP_IRQ_REG_LINE(RT9471_IRQ_SYS_MIN, 8), 774 REGMAP_IRQ_REG_LINE(RT9471_IRQ_AICC_DONE, 8), 775 REGMAP_IRQ_REG_LINE(RT9471_IRQ_PE_DONE, 8), 776 REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_COLD, 8), 777 REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_COOL, 8), 778 REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_WARM, 8), 779 REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_HOT, 8), 780 REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTG_FAULT, 8), 781 REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTG_LBP, 8), 782 REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTG_CC, 8), 783 REGMAP_IRQ_REG_LINE(RT9471_IRQ_WDT, 8), 784 REGMAP_IRQ_REG_LINE(RT9471_IRQ_VAC_OV, 8), 785 REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTP, 8), 786 }; 787 788 static const struct regmap_irq_chip rt9471_irq_chip = { 789 .name = "rt9471-irqs", 790 .status_base = RT9471_REG_IRQ0, 791 .mask_base = RT9471_REG_MASK0, 792 .num_regs = RT9471_NUM_IRQ_REGS, 793 .irqs = rt9471_regmap_irqs, 794 .num_irqs = ARRAY_SIZE(rt9471_regmap_irqs), 795 }; 796 797 static const struct reg_sequence rt9471_init_regs[] = { 798 REG_SEQ0(RT9471_REG_INFO, 0x80), /* REG_RST */ 799 REG_SEQ0(RT9471_REG_TOP, 0xC0), /* WDT = 0 */ 800 REG_SEQ0(RT9471_REG_FUNC, 0x01), /* BATFET_DIS_DLY = 0 */ 801 REG_SEQ0(RT9471_REG_IBUS, 0x0A), /* AUTO_AICR = 0 */ 802 REG_SEQ0(RT9471_REG_VBUS, 0xC6), /* VAC_OVP = 14V */ 803 REG_SEQ0(RT9471_REG_JEITA, 0x38), /* JEITA = 0 */ 804 REG_SEQ0(RT9471_REG_DPDMDET, 0x31), /* BC12_EN = 0, DCP_DP_OPT = 1 */ 805 }; 806 rt9471_check_devinfo(struct rt9471_chip * chip)807 static int rt9471_check_devinfo(struct rt9471_chip *chip) 808 { 809 struct device *dev = chip->dev; 810 unsigned int dev_id; 811 int ret; 812 813 ret = regmap_field_read(chip->rm_fields[F_DEVICE_ID], &dev_id); 814 if (ret) 815 return dev_err_probe(dev, ret, "Failed to read device_id\n"); 816 817 switch (dev_id) { 818 case RT9470_DEVID: 819 case RT9470D_DEVID: 820 case RT9471_DEVID: 821 case RT9471D_DEVID: 822 return 0; 823 default: 824 return dev_err_probe(dev, -ENODEV, "Incorrect device id\n"); 825 } 826 } 827 rt9471_accessible_reg(struct device * dev,unsigned int reg)828 static bool rt9471_accessible_reg(struct device *dev, unsigned int reg) 829 { 830 switch (reg) { 831 case 0x00 ... 0x0F: 832 case 0x10 ... 0x13: 833 case 0x20 ... 0x33: 834 case 0x40 ... 0xA1: 835 return true; 836 default: 837 return false; 838 } 839 } 840 841 static const struct regmap_config rt9471_regmap_config = { 842 .reg_bits = 8, 843 .val_bits = 8, 844 .max_register = 0xA1, 845 .writeable_reg = rt9471_accessible_reg, 846 .readable_reg = rt9471_accessible_reg, 847 }; 848 rt9471_probe(struct i2c_client * i2c)849 static int rt9471_probe(struct i2c_client *i2c) 850 { 851 struct device *dev = &i2c->dev; 852 struct rt9471_chip *chip; 853 struct gpio_desc *ce_gpio; 854 struct regmap *regmap; 855 int ret; 856 857 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); 858 if (!chip) 859 return -ENOMEM; 860 861 chip->dev = dev; 862 mutex_init(&chip->var_lock); 863 i2c_set_clientdata(i2c, chip); 864 865 /* Default pull charge enable gpio to make 'CHG_EN' by SW control only */ 866 ce_gpio = devm_gpiod_get_optional(dev, "charge-enable", GPIOD_OUT_HIGH); 867 if (IS_ERR(ce_gpio)) 868 return dev_err_probe(dev, PTR_ERR(ce_gpio), 869 "Failed to config charge enable gpio\n"); 870 871 regmap = devm_regmap_init_i2c(i2c, &rt9471_regmap_config); 872 if (IS_ERR(regmap)) 873 return dev_err_probe(dev, PTR_ERR(regmap), "Failed to init regmap\n"); 874 875 chip->regmap = regmap; 876 877 ret = devm_regmap_field_bulk_alloc(dev, regmap, chip->rm_fields, 878 rt9471_reg_fields, 879 ARRAY_SIZE(rt9471_reg_fields)); 880 if (ret) 881 return dev_err_probe(dev, ret, "Failed to alloc regmap field\n"); 882 883 ret = rt9471_check_devinfo(chip); 884 if (ret) 885 return ret; 886 887 ret = regmap_register_patch(regmap, rt9471_init_regs, 888 ARRAY_SIZE(rt9471_init_regs)); 889 if (ret) 890 return dev_err_probe(dev, ret, "Failed to init registers\n"); 891 892 ret = devm_regmap_add_irq_chip(dev, regmap, i2c->irq, 893 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 0, 894 &rt9471_irq_chip, &chip->irq_chip_data); 895 if (ret) 896 return dev_err_probe(dev, ret, "Failed to add IRQ chip\n"); 897 898 ret = rt9471_register_psy(chip); 899 if (ret) 900 return dev_err_probe(dev, ret, "Failed to register psy\n"); 901 902 ret = rt9471_register_otg_regulator(chip); 903 if (ret) 904 return dev_err_probe(dev, ret, "Failed to register otg\n"); 905 906 ret = rt9471_register_interrupts(chip); 907 if (ret) 908 return ret; 909 910 /* After IRQs are all initialized, enable port detection by default */ 911 return regmap_field_write(chip->rm_fields[F_BC12_EN], 1); 912 } 913 rt9471_shutdown(struct i2c_client * i2c)914 static void rt9471_shutdown(struct i2c_client *i2c) 915 { 916 struct rt9471_chip *chip = i2c_get_clientdata(i2c); 917 918 /* 919 * There's no external reset pin. Do register reset to guarantee charger 920 * function is normal after shutdown 921 */ 922 regmap_field_write(chip->rm_fields[F_REG_RST], 1); 923 } 924 925 static const struct of_device_id rt9471_of_device_id[] = { 926 { .compatible = "richtek,rt9471" }, 927 {} 928 }; 929 MODULE_DEVICE_TABLE(of, rt9471_of_device_id); 930 931 static struct i2c_driver rt9471_driver = { 932 .driver = { 933 .name = "rt9471", 934 .of_match_table = rt9471_of_device_id, 935 }, 936 .probe = rt9471_probe, 937 .shutdown = rt9471_shutdown, 938 }; 939 module_i2c_driver(rt9471_driver); 940 941 MODULE_DESCRIPTION("Richtek RT9471 charger driver"); 942 MODULE_AUTHOR("Alina Yu <alina_yu@richtek.com>"); 943 MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>"); 944 MODULE_LICENSE("GPL"); 945