xref: /openbmc/linux/drivers/net/ethernet/chelsio/cxgb3/firmware_exports.h (revision e5451c8f8330e03ad3cfa16048b4daf961af434f)
1  /*
2   * Copyright (c) 2004-2008 Chelsio, Inc. All rights reserved.
3   *
4   * This software is available to you under a choice of one of two
5   * licenses.  You may choose to be licensed under the terms of the GNU
6   * General Public License (GPL) Version 2, available from the file
7   * COPYING in the main directory of this source tree, or the
8   * OpenIB.org BSD license below:
9   *
10   *     Redistribution and use in source and binary forms, with or
11   *     without modification, are permitted provided that the following
12   *     conditions are met:
13   *
14   *      - Redistributions of source code must retain the above
15   *        copyright notice, this list of conditions and the following
16   *        disclaimer.
17   *
18   *      - Redistributions in binary form must reproduce the above
19   *        copyright notice, this list of conditions and the following
20   *        disclaimer in the documentation and/or other materials
21   *        provided with the distribution.
22   *
23   * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24   * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25   * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26   * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27   * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28   * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29   * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30   * SOFTWARE.
31   */
32  #ifndef _FIRMWARE_EXPORTS_H_
33  #define _FIRMWARE_EXPORTS_H_
34  
35  /* WR OPCODES supported by the firmware.
36   */
37  #define	FW_WROPCODE_FORWARD			0x01
38  #define FW_WROPCODE_BYPASS			0x05
39  
40  #define FW_WROPCODE_TUNNEL_TX_PKT		0x03
41  
42  #define FW_WROPOCDE_ULPTX_DATA_SGL		0x00
43  #define FW_WROPCODE_ULPTX_MEM_READ		0x02
44  #define FW_WROPCODE_ULPTX_PKT			0x04
45  #define FW_WROPCODE_ULPTX_INVALIDATE		0x06
46  
47  #define FW_WROPCODE_TUNNEL_RX_PKT		0x07
48  
49  #define FW_WROPCODE_OFLD_GETTCB_RPL		0x08
50  #define FW_WROPCODE_OFLD_CLOSE_CON		0x09
51  #define FW_WROPCODE_OFLD_TP_ABORT_CON_REQ	0x0A
52  #define FW_WROPCODE_OFLD_HOST_ABORT_CON_RPL	0x0F
53  #define FW_WROPCODE_OFLD_HOST_ABORT_CON_REQ	0x0B
54  #define FW_WROPCODE_OFLD_TP_ABORT_CON_RPL	0x0C
55  #define FW_WROPCODE_OFLD_TX_DATA		0x0D
56  #define FW_WROPCODE_OFLD_TX_DATA_ACK		0x0E
57  
58  #define FW_WROPCODE_RI_RDMA_INIT		0x10
59  #define FW_WROPCODE_RI_RDMA_WRITE		0x11
60  #define FW_WROPCODE_RI_RDMA_READ_REQ		0x12
61  #define FW_WROPCODE_RI_RDMA_READ_RESP		0x13
62  #define FW_WROPCODE_RI_SEND			0x14
63  #define FW_WROPCODE_RI_TERMINATE		0x15
64  #define FW_WROPCODE_RI_RDMA_READ		0x16
65  #define FW_WROPCODE_RI_RECEIVE			0x17
66  #define FW_WROPCODE_RI_BIND_MW			0x18
67  #define FW_WROPCODE_RI_FASTREGISTER_MR		0x19
68  #define FW_WROPCODE_RI_LOCAL_INV		0x1A
69  #define FW_WROPCODE_RI_MODIFY_QP		0x1B
70  #define FW_WROPCODE_RI_BYPASS			0x1C
71  
72  #define FW_WROPOCDE_RSVD			0x1E
73  
74  #define FW_WROPCODE_SGE_EGRESSCONTEXT_RR	0x1F
75  
76  #define FW_WROPCODE_MNGT			0x1D
77  #define FW_MNGTOPCODE_PKTSCHED_SET		0x00
78  
79  /* Maximum size of a WR sent from the host, limited by the SGE.
80   *
81   * Note: WR coming from ULP or TP are only limited by CIM.
82   */
83  #define FW_WR_SIZE			128
84  
85  /* Maximum number of outstanding WRs sent from the host. Value must be
86   * programmed in the CTRL/TUNNEL/QP SGE Egress Context and used by
87   * offload modules to limit the number of WRs per connection.
88   */
89  #define FW_T3_WR_NUM			16
90  #define FW_N3_WR_NUM			7
91  
92  #ifndef N3
93  # define FW_WR_NUM			FW_T3_WR_NUM
94  #else
95  # define FW_WR_NUM			FW_N3_WR_NUM
96  #endif
97  
98  /* FW_TUNNEL_NUM corresponds to the number of supported TUNNEL Queues. These
99   * queues must start at SGE Egress Context FW_TUNNEL_SGEEC_START and must
100   * start at 'TID' (or 'uP Token') FW_TUNNEL_TID_START.
101   *
102   * Ingress Traffic (e.g. DMA completion credit)  for TUNNEL Queue[i] is sent
103   * to RESP Queue[i].
104   */
105  #define FW_TUNNEL_NUM			8
106  #define FW_TUNNEL_SGEEC_START		8
107  #define FW_TUNNEL_TID_START		65544
108  
109  /* FW_CTRL_NUM corresponds to the number of supported CTRL Queues. These queues
110   * must start at SGE Egress Context FW_CTRL_SGEEC_START and must start at 'TID'
111   * (or 'uP Token') FW_CTRL_TID_START.
112   *
113   * Ingress Traffic for CTRL Queue[i] is sent to RESP Queue[i].
114   */
115  #define FW_CTRL_NUM			8
116  #define FW_CTRL_SGEEC_START		65528
117  #define FW_CTRL_TID_START		65536
118  
119  /* FW_OFLD_NUM corresponds to the number of supported OFFLOAD Queues. These
120   * queues must start at SGE Egress Context FW_OFLD_SGEEC_START.
121   *
122   * Note: the 'uP Token' in the SGE Egress Context fields is irrelevant for
123   * OFFLOAD Queues, as the host is responsible for providing the correct TID in
124   * every WR.
125   *
126   * Ingress Trafffic for OFFLOAD Queue[i] is sent to RESP Queue[i].
127   */
128  #define FW_OFLD_NUM			8
129  #define FW_OFLD_SGEEC_START		0
130  
131  /*
132   *
133   */
134  #define FW_RI_NUM			1
135  #define FW_RI_SGEEC_START		65527
136  #define FW_RI_TID_START			65552
137  
138  /*
139   * The RX_PKT_TID
140   */
141  #define FW_RX_PKT_NUM			1
142  #define FW_RX_PKT_TID_START		65553
143  
144  /* FW_WRC_NUM corresponds to the number of Work Request Context that supported
145   * by the firmware.
146   */
147  #define FW_WRC_NUM			\
148      (65536 + FW_TUNNEL_NUM + FW_CTRL_NUM + FW_RI_NUM + FW_RX_PKT_NUM)
149  
150  /*
151   * FW type and version.
152   */
153  #define S_FW_VERSION_TYPE		28
154  #define M_FW_VERSION_TYPE		0xF
155  #define V_FW_VERSION_TYPE(x)		((x) << S_FW_VERSION_TYPE)
156  #define G_FW_VERSION_TYPE(x)		\
157      (((x) >> S_FW_VERSION_TYPE) & M_FW_VERSION_TYPE)
158  
159  #define S_FW_VERSION_MAJOR		16
160  #define M_FW_VERSION_MAJOR		0xFFF
161  #define V_FW_VERSION_MAJOR(x)		((x) << S_FW_VERSION_MAJOR)
162  #define G_FW_VERSION_MAJOR(x)		\
163      (((x) >> S_FW_VERSION_MAJOR) & M_FW_VERSION_MAJOR)
164  
165  #define S_FW_VERSION_MINOR		8
166  #define M_FW_VERSION_MINOR		0xFF
167  #define V_FW_VERSION_MINOR(x)		((x) << S_FW_VERSION_MINOR)
168  #define G_FW_VERSION_MINOR(x)		\
169      (((x) >> S_FW_VERSION_MINOR) & M_FW_VERSION_MINOR)
170  
171  #define S_FW_VERSION_MICRO		0
172  #define M_FW_VERSION_MICRO		0xFF
173  #define V_FW_VERSION_MICRO(x)		((x) << S_FW_VERSION_MICRO)
174  #define G_FW_VERSION_MICRO(x)		\
175      (((x) >> S_FW_VERSION_MICRO) & M_FW_VERSION_MICRO)
176  
177  #endif				/* _FIRMWARE_EXPORTS_H_ */
178