xref: /openbmc/linux/drivers/net/can/usb/f81604.c (revision 88da1743)
1 // SPDX-License-Identifier: GPL-2.0
2 /* Fintek F81604 USB-to-2CAN controller driver.
3  *
4  * Copyright (C) 2023 Ji-Ze Hong (Peter Hong) <peter_hong@fintek.com.tw>
5  */
6 #include <linux/bitfield.h>
7 #include <linux/netdevice.h>
8 #include <linux/units.h>
9 #include <linux/usb.h>
10 
11 #include <linux/can.h>
12 #include <linux/can/dev.h>
13 #include <linux/can/error.h>
14 #include <linux/can/platform/sja1000.h>
15 
16 #include <asm-generic/unaligned.h>
17 
18 /* vendor and product id */
19 #define F81604_VENDOR_ID 0x2c42
20 #define F81604_PRODUCT_ID 0x1709
21 #define F81604_CAN_CLOCK (12 * MEGA)
22 #define F81604_MAX_DEV 2
23 #define F81604_SET_DEVICE_RETRY 10
24 
25 #define F81604_USB_TIMEOUT 2000
26 #define F81604_SET_GET_REGISTER 0xA0
27 #define F81604_PORT_OFFSET 0x1000
28 #define F81604_MAX_RX_URBS 4
29 
30 #define F81604_CMD_DATA 0x00
31 
32 #define F81604_DLC_LEN_MASK GENMASK(3, 0)
33 #define F81604_DLC_EFF_BIT BIT(7)
34 #define F81604_DLC_RTR_BIT BIT(6)
35 
36 #define F81604_SFF_SHIFT 5
37 #define F81604_EFF_SHIFT 3
38 
39 #define F81604_BRP_MASK GENMASK(5, 0)
40 #define F81604_SJW_MASK GENMASK(7, 6)
41 
42 #define F81604_SEG1_MASK GENMASK(3, 0)
43 #define F81604_SEG2_MASK GENMASK(6, 4)
44 
45 #define F81604_CLEAR_ALC 0
46 #define F81604_CLEAR_ECC 1
47 #define F81604_CLEAR_OVERRUN 2
48 
49 /* device setting */
50 #define F81604_CTRL_MODE_REG 0x80
51 #define F81604_TX_ONESHOT (0x03 << 3)
52 #define F81604_TX_NORMAL (0x01 << 3)
53 #define F81604_RX_AUTO_RELEASE_BUF BIT(1)
54 #define F81604_INT_WHEN_CHANGE BIT(0)
55 
56 #define F81604_TERMINATOR_REG 0x105
57 #define F81604_CAN0_TERM BIT(2)
58 #define F81604_CAN1_TERM BIT(3)
59 
60 #define F81604_TERMINATION_DISABLED CAN_TERMINATION_DISABLED
61 #define F81604_TERMINATION_ENABLED 120
62 
63 /* SJA1000 registers - manual section 6.4 (Pelican Mode) */
64 #define F81604_SJA1000_MOD 0x00
65 #define F81604_SJA1000_CMR 0x01
66 #define F81604_SJA1000_IR 0x03
67 #define F81604_SJA1000_IER 0x04
68 #define F81604_SJA1000_ALC 0x0B
69 #define F81604_SJA1000_ECC 0x0C
70 #define F81604_SJA1000_RXERR 0x0E
71 #define F81604_SJA1000_TXERR 0x0F
72 #define F81604_SJA1000_ACCC0 0x10
73 #define F81604_SJA1000_ACCM0 0x14
74 #define F81604_MAX_FILTER_CNT 4
75 
76 /* Common registers - manual section 6.5 */
77 #define F81604_SJA1000_BTR0 0x06
78 #define F81604_SJA1000_BTR1 0x07
79 #define F81604_SJA1000_BTR1_SAMPLE_TRIPLE BIT(7)
80 #define F81604_SJA1000_OCR 0x08
81 #define F81604_SJA1000_CDR 0x1F
82 
83 /* mode register */
84 #define F81604_SJA1000_MOD_RM 0x01
85 #define F81604_SJA1000_MOD_LOM 0x02
86 #define F81604_SJA1000_MOD_STM 0x04
87 
88 /* commands */
89 #define F81604_SJA1000_CMD_CDO 0x08
90 
91 /* interrupt sources */
92 #define F81604_SJA1000_IRQ_BEI 0x80
93 #define F81604_SJA1000_IRQ_ALI 0x40
94 #define F81604_SJA1000_IRQ_EPI 0x20
95 #define F81604_SJA1000_IRQ_DOI 0x08
96 #define F81604_SJA1000_IRQ_EI 0x04
97 #define F81604_SJA1000_IRQ_TI 0x02
98 #define F81604_SJA1000_IRQ_RI 0x01
99 #define F81604_SJA1000_IRQ_ALL 0xFF
100 #define F81604_SJA1000_IRQ_OFF 0x00
101 
102 /* status register content */
103 #define F81604_SJA1000_SR_BS 0x80
104 #define F81604_SJA1000_SR_ES 0x40
105 #define F81604_SJA1000_SR_TCS 0x08
106 
107 /* ECC register */
108 #define F81604_SJA1000_ECC_SEG 0x1F
109 #define F81604_SJA1000_ECC_DIR 0x20
110 #define F81604_SJA1000_ECC_BIT 0x00
111 #define F81604_SJA1000_ECC_FORM 0x40
112 #define F81604_SJA1000_ECC_STUFF 0x80
113 #define F81604_SJA1000_ECC_MASK 0xc0
114 
115 /* ALC register */
116 #define F81604_SJA1000_ALC_MASK 0x1f
117 
118 /* table of devices that work with this driver */
119 static const struct usb_device_id f81604_table[] = {
120 	{ USB_DEVICE(F81604_VENDOR_ID, F81604_PRODUCT_ID) },
121 	{} /* Terminating entry */
122 };
123 
124 MODULE_DEVICE_TABLE(usb, f81604_table);
125 
126 static const struct ethtool_ops f81604_ethtool_ops = {
127 	.get_ts_info = ethtool_op_get_ts_info,
128 };
129 
130 static const u16 f81604_termination[] = { F81604_TERMINATION_DISABLED,
131 					  F81604_TERMINATION_ENABLED };
132 
133 struct f81604_priv {
134 	struct net_device *netdev[F81604_MAX_DEV];
135 };
136 
137 struct f81604_port_priv {
138 	struct can_priv can;
139 	struct net_device *netdev;
140 	struct sk_buff *echo_skb;
141 
142 	unsigned long clear_flags;
143 	struct work_struct clear_reg_work;
144 
145 	struct usb_device *dev;
146 	struct usb_interface *intf;
147 
148 	struct usb_anchor urbs_anchor;
149 };
150 
151 /* Interrupt endpoint data format:
152  *	Byte 0: Status register.
153  *	Byte 1: Interrupt register.
154  *	Byte 2: Interrupt enable register.
155  *	Byte 3: Arbitration lost capture(ALC) register.
156  *	Byte 4: Error code capture(ECC) register.
157  *	Byte 5: Error warning limit register.
158  *	Byte 6: RX error counter register.
159  *	Byte 7: TX error counter register.
160  *	Byte 8: Reserved.
161  */
162 struct f81604_int_data {
163 	u8 sr;
164 	u8 isrc;
165 	u8 ier;
166 	u8 alc;
167 	u8 ecc;
168 	u8 ewlr;
169 	u8 rxerr;
170 	u8 txerr;
171 	u8 val;
172 } __packed __aligned(4);
173 
174 struct f81604_sff {
175 	__be16 id;
176 	u8 data[CAN_MAX_DLEN];
177 } __packed __aligned(2);
178 
179 struct f81604_eff {
180 	__be32 id;
181 	u8 data[CAN_MAX_DLEN];
182 } __packed __aligned(2);
183 
184 struct f81604_can_frame {
185 	u8 cmd;
186 
187 	/* According for F81604 DLC define:
188 	 *	bit 3~0: data length (0~8)
189 	 *	bit6: is RTR flag.
190 	 *	bit7: is EFF frame.
191 	 */
192 	u8 dlc;
193 
194 	union {
195 		struct f81604_sff sff;
196 		struct f81604_eff eff;
197 	};
198 } __packed __aligned(2);
199 
200 static const u8 bulk_in_addr[F81604_MAX_DEV] = { 2, 4 };
201 static const u8 bulk_out_addr[F81604_MAX_DEV] = { 1, 3 };
202 static const u8 int_in_addr[F81604_MAX_DEV] = { 1, 3 };
203 
f81604_write(struct usb_device * dev,u16 reg,u8 data)204 static int f81604_write(struct usb_device *dev, u16 reg, u8 data)
205 {
206 	int ret;
207 
208 	ret = usb_control_msg_send(dev, 0, F81604_SET_GET_REGISTER,
209 				   USB_TYPE_VENDOR | USB_DIR_OUT, 0, reg,
210 				   &data, sizeof(data), F81604_USB_TIMEOUT,
211 				   GFP_KERNEL);
212 	if (ret)
213 		dev_err(&dev->dev, "%s: reg: %x data: %x failed: %pe\n",
214 			__func__, reg, data, ERR_PTR(ret));
215 
216 	return ret;
217 }
218 
f81604_read(struct usb_device * dev,u16 reg,u8 * data)219 static int f81604_read(struct usb_device *dev, u16 reg, u8 *data)
220 {
221 	int ret;
222 
223 	ret = usb_control_msg_recv(dev, 0, F81604_SET_GET_REGISTER,
224 				   USB_TYPE_VENDOR | USB_DIR_IN, 0, reg, data,
225 				   sizeof(*data), F81604_USB_TIMEOUT,
226 				   GFP_KERNEL);
227 
228 	if (ret < 0)
229 		dev_err(&dev->dev, "%s: reg: %x failed: %pe\n", __func__, reg,
230 			ERR_PTR(ret));
231 
232 	return ret;
233 }
234 
f81604_update_bits(struct usb_device * dev,u16 reg,u8 mask,u8 data)235 static int f81604_update_bits(struct usb_device *dev, u16 reg, u8 mask,
236 			      u8 data)
237 {
238 	int ret;
239 	u8 tmp;
240 
241 	ret = f81604_read(dev, reg, &tmp);
242 	if (ret)
243 		return ret;
244 
245 	tmp &= ~mask;
246 	tmp |= (mask & data);
247 
248 	return f81604_write(dev, reg, tmp);
249 }
250 
f81604_sja1000_write(struct f81604_port_priv * priv,u16 reg,u8 data)251 static int f81604_sja1000_write(struct f81604_port_priv *priv, u16 reg,
252 				u8 data)
253 {
254 	int port = priv->netdev->dev_port;
255 	int real_reg;
256 
257 	real_reg = reg + F81604_PORT_OFFSET * port + F81604_PORT_OFFSET;
258 	return f81604_write(priv->dev, real_reg, data);
259 }
260 
f81604_sja1000_read(struct f81604_port_priv * priv,u16 reg,u8 * data)261 static int f81604_sja1000_read(struct f81604_port_priv *priv, u16 reg,
262 			       u8 *data)
263 {
264 	int port = priv->netdev->dev_port;
265 	int real_reg;
266 
267 	real_reg = reg + F81604_PORT_OFFSET * port + F81604_PORT_OFFSET;
268 	return f81604_read(priv->dev, real_reg, data);
269 }
270 
f81604_set_reset_mode(struct f81604_port_priv * priv)271 static int f81604_set_reset_mode(struct f81604_port_priv *priv)
272 {
273 	int ret, i;
274 	u8 tmp;
275 
276 	/* disable interrupts */
277 	ret = f81604_sja1000_write(priv, F81604_SJA1000_IER,
278 				   F81604_SJA1000_IRQ_OFF);
279 	if (ret)
280 		return ret;
281 
282 	for (i = 0; i < F81604_SET_DEVICE_RETRY; i++) {
283 		ret = f81604_sja1000_read(priv, F81604_SJA1000_MOD, &tmp);
284 		if (ret)
285 			return ret;
286 
287 		/* check reset bit */
288 		if (tmp & F81604_SJA1000_MOD_RM) {
289 			priv->can.state = CAN_STATE_STOPPED;
290 			return 0;
291 		}
292 
293 		/* reset chip */
294 		ret = f81604_sja1000_write(priv, F81604_SJA1000_MOD,
295 					   F81604_SJA1000_MOD_RM);
296 		if (ret)
297 			return ret;
298 	}
299 
300 	return -EPERM;
301 }
302 
f81604_set_normal_mode(struct f81604_port_priv * priv)303 static int f81604_set_normal_mode(struct f81604_port_priv *priv)
304 {
305 	u8 tmp, ier = 0;
306 	u8 mod_reg = 0;
307 	int ret, i;
308 
309 	for (i = 0; i < F81604_SET_DEVICE_RETRY; i++) {
310 		ret = f81604_sja1000_read(priv, F81604_SJA1000_MOD, &tmp);
311 		if (ret)
312 			return ret;
313 
314 		/* check reset bit */
315 		if ((tmp & F81604_SJA1000_MOD_RM) == 0) {
316 			priv->can.state = CAN_STATE_ERROR_ACTIVE;
317 			/* enable interrupts, RI handled by bulk-in */
318 			ier = F81604_SJA1000_IRQ_ALL & ~F81604_SJA1000_IRQ_RI;
319 			if (!(priv->can.ctrlmode &
320 			      CAN_CTRLMODE_BERR_REPORTING))
321 				ier &= ~F81604_SJA1000_IRQ_BEI;
322 
323 			return f81604_sja1000_write(priv, F81604_SJA1000_IER,
324 						    ier);
325 		}
326 
327 		/* set chip to normal mode */
328 		if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY)
329 			mod_reg |= F81604_SJA1000_MOD_LOM;
330 		if (priv->can.ctrlmode & CAN_CTRLMODE_PRESUME_ACK)
331 			mod_reg |= F81604_SJA1000_MOD_STM;
332 
333 		ret = f81604_sja1000_write(priv, F81604_SJA1000_MOD, mod_reg);
334 		if (ret)
335 			return ret;
336 	}
337 
338 	return -EPERM;
339 }
340 
f81604_chipset_init(struct f81604_port_priv * priv)341 static int f81604_chipset_init(struct f81604_port_priv *priv)
342 {
343 	int i, ret;
344 
345 	/* set clock divider and output control register */
346 	ret = f81604_sja1000_write(priv, F81604_SJA1000_CDR,
347 				   CDR_CBP | CDR_PELICAN);
348 	if (ret)
349 		return ret;
350 
351 	/* set acceptance filter (accept all) */
352 	for (i = 0; i < F81604_MAX_FILTER_CNT; ++i) {
353 		ret = f81604_sja1000_write(priv, F81604_SJA1000_ACCC0 + i, 0);
354 		if (ret)
355 			return ret;
356 	}
357 
358 	for (i = 0; i < F81604_MAX_FILTER_CNT; ++i) {
359 		ret = f81604_sja1000_write(priv, F81604_SJA1000_ACCM0 + i,
360 					   0xFF);
361 		if (ret)
362 			return ret;
363 	}
364 
365 	return f81604_sja1000_write(priv, F81604_SJA1000_OCR,
366 				    OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL |
367 					    OCR_MODE_NORMAL);
368 }
369 
f81604_process_rx_packet(struct net_device * netdev,struct f81604_can_frame * frame)370 static void f81604_process_rx_packet(struct net_device *netdev,
371 				     struct f81604_can_frame *frame)
372 {
373 	struct net_device_stats *stats = &netdev->stats;
374 	struct can_frame *cf;
375 	struct sk_buff *skb;
376 
377 	if (frame->cmd != F81604_CMD_DATA)
378 		return;
379 
380 	skb = alloc_can_skb(netdev, &cf);
381 	if (!skb) {
382 		stats->rx_dropped++;
383 		return;
384 	}
385 
386 	cf->len = can_cc_dlc2len(frame->dlc & F81604_DLC_LEN_MASK);
387 
388 	if (frame->dlc & F81604_DLC_EFF_BIT) {
389 		cf->can_id = get_unaligned_be32(&frame->eff.id) >>
390 			     F81604_EFF_SHIFT;
391 		cf->can_id |= CAN_EFF_FLAG;
392 
393 		if (!(frame->dlc & F81604_DLC_RTR_BIT))
394 			memcpy(cf->data, frame->eff.data, cf->len);
395 	} else {
396 		cf->can_id = get_unaligned_be16(&frame->sff.id) >>
397 			     F81604_SFF_SHIFT;
398 
399 		if (!(frame->dlc & F81604_DLC_RTR_BIT))
400 			memcpy(cf->data, frame->sff.data, cf->len);
401 	}
402 
403 	if (frame->dlc & F81604_DLC_RTR_BIT)
404 		cf->can_id |= CAN_RTR_FLAG;
405 	else
406 		stats->rx_bytes += cf->len;
407 
408 	stats->rx_packets++;
409 	netif_rx(skb);
410 }
411 
f81604_read_bulk_callback(struct urb * urb)412 static void f81604_read_bulk_callback(struct urb *urb)
413 {
414 	struct f81604_can_frame *frame = urb->transfer_buffer;
415 	struct net_device *netdev = urb->context;
416 	int ret;
417 
418 	if (!netif_device_present(netdev))
419 		return;
420 
421 	if (urb->status)
422 		netdev_info(netdev, "%s: URB aborted %pe\n", __func__,
423 			    ERR_PTR(urb->status));
424 
425 	switch (urb->status) {
426 	case 0: /* success */
427 		break;
428 
429 	case -ENOENT:
430 	case -EPIPE:
431 	case -EPROTO:
432 	case -ESHUTDOWN:
433 		return;
434 
435 	default:
436 		goto resubmit_urb;
437 	}
438 
439 	if (urb->actual_length != sizeof(*frame)) {
440 		netdev_warn(netdev, "URB length %u not equal to %zu\n",
441 			    urb->actual_length, sizeof(*frame));
442 		goto resubmit_urb;
443 	}
444 
445 	f81604_process_rx_packet(netdev, frame);
446 
447 resubmit_urb:
448 	ret = usb_submit_urb(urb, GFP_ATOMIC);
449 	if (ret == -ENODEV)
450 		netif_device_detach(netdev);
451 	else if (ret)
452 		netdev_err(netdev,
453 			   "%s: failed to resubmit read bulk urb: %pe\n",
454 			   __func__, ERR_PTR(ret));
455 }
456 
f81604_handle_tx(struct f81604_port_priv * priv,struct f81604_int_data * data)457 static void f81604_handle_tx(struct f81604_port_priv *priv,
458 			     struct f81604_int_data *data)
459 {
460 	struct net_device *netdev = priv->netdev;
461 	struct net_device_stats *stats = &netdev->stats;
462 
463 	/* transmission buffer released */
464 	if (priv->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT &&
465 	    !(data->sr & F81604_SJA1000_SR_TCS)) {
466 		stats->tx_errors++;
467 		can_free_echo_skb(netdev, 0, NULL);
468 	} else {
469 		/* transmission complete */
470 		stats->tx_bytes += can_get_echo_skb(netdev, 0, NULL);
471 		stats->tx_packets++;
472 	}
473 
474 	netif_wake_queue(netdev);
475 }
476 
f81604_handle_can_bus_errors(struct f81604_port_priv * priv,struct f81604_int_data * data)477 static void f81604_handle_can_bus_errors(struct f81604_port_priv *priv,
478 					 struct f81604_int_data *data)
479 {
480 	enum can_state can_state = priv->can.state;
481 	struct net_device *netdev = priv->netdev;
482 	struct net_device_stats *stats = &netdev->stats;
483 	struct can_frame *cf;
484 	struct sk_buff *skb;
485 
486 	/* Note: ALC/ECC will not auto clear by read here, must be cleared by
487 	 * read register (via clear_reg_work).
488 	 */
489 
490 	skb = alloc_can_err_skb(netdev, &cf);
491 	if (skb) {
492 		cf->can_id |= CAN_ERR_CNT;
493 		cf->data[6] = data->txerr;
494 		cf->data[7] = data->rxerr;
495 	}
496 
497 	if (data->isrc & F81604_SJA1000_IRQ_DOI) {
498 		/* data overrun interrupt */
499 		netdev_dbg(netdev, "data overrun interrupt\n");
500 
501 		if (skb) {
502 			cf->can_id |= CAN_ERR_CRTL;
503 			cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
504 		}
505 
506 		stats->rx_over_errors++;
507 		stats->rx_errors++;
508 
509 		set_bit(F81604_CLEAR_OVERRUN, &priv->clear_flags);
510 	}
511 
512 	if (data->isrc & F81604_SJA1000_IRQ_EI) {
513 		/* error warning interrupt */
514 		netdev_dbg(netdev, "error warning interrupt\n");
515 
516 		if (data->sr & F81604_SJA1000_SR_BS)
517 			can_state = CAN_STATE_BUS_OFF;
518 		else if (data->sr & F81604_SJA1000_SR_ES)
519 			can_state = CAN_STATE_ERROR_WARNING;
520 		else
521 			can_state = CAN_STATE_ERROR_ACTIVE;
522 	}
523 
524 	if (data->isrc & F81604_SJA1000_IRQ_BEI) {
525 		/* bus error interrupt */
526 		netdev_dbg(netdev, "bus error interrupt\n");
527 
528 		priv->can.can_stats.bus_error++;
529 		stats->rx_errors++;
530 
531 		if (skb) {
532 			cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
533 
534 			/* set error type */
535 			switch (data->ecc & F81604_SJA1000_ECC_MASK) {
536 			case F81604_SJA1000_ECC_BIT:
537 				cf->data[2] |= CAN_ERR_PROT_BIT;
538 				break;
539 			case F81604_SJA1000_ECC_FORM:
540 				cf->data[2] |= CAN_ERR_PROT_FORM;
541 				break;
542 			case F81604_SJA1000_ECC_STUFF:
543 				cf->data[2] |= CAN_ERR_PROT_STUFF;
544 				break;
545 			default:
546 				break;
547 			}
548 
549 			/* set error location */
550 			cf->data[3] = data->ecc & F81604_SJA1000_ECC_SEG;
551 
552 			/* Error occurred during transmission? */
553 			if ((data->ecc & F81604_SJA1000_ECC_DIR) == 0)
554 				cf->data[2] |= CAN_ERR_PROT_TX;
555 		}
556 
557 		set_bit(F81604_CLEAR_ECC, &priv->clear_flags);
558 	}
559 
560 	if (data->isrc & F81604_SJA1000_IRQ_EPI) {
561 		if (can_state == CAN_STATE_ERROR_PASSIVE)
562 			can_state = CAN_STATE_ERROR_WARNING;
563 		else
564 			can_state = CAN_STATE_ERROR_PASSIVE;
565 
566 		/* error passive interrupt */
567 		netdev_dbg(netdev, "error passive interrupt: %d\n", can_state);
568 	}
569 
570 	if (data->isrc & F81604_SJA1000_IRQ_ALI) {
571 		/* arbitration lost interrupt */
572 		netdev_dbg(netdev, "arbitration lost interrupt\n");
573 
574 		priv->can.can_stats.arbitration_lost++;
575 
576 		if (skb) {
577 			cf->can_id |= CAN_ERR_LOSTARB;
578 			cf->data[0] = data->alc & F81604_SJA1000_ALC_MASK;
579 		}
580 
581 		set_bit(F81604_CLEAR_ALC, &priv->clear_flags);
582 	}
583 
584 	if (can_state != priv->can.state) {
585 		enum can_state tx_state, rx_state;
586 
587 		tx_state = data->txerr >= data->rxerr ? can_state : 0;
588 		rx_state = data->txerr <= data->rxerr ? can_state : 0;
589 
590 		can_change_state(netdev, cf, tx_state, rx_state);
591 
592 		if (can_state == CAN_STATE_BUS_OFF)
593 			can_bus_off(netdev);
594 	}
595 
596 	if (priv->clear_flags)
597 		schedule_work(&priv->clear_reg_work);
598 
599 	if (skb)
600 		netif_rx(skb);
601 }
602 
f81604_read_int_callback(struct urb * urb)603 static void f81604_read_int_callback(struct urb *urb)
604 {
605 	struct f81604_int_data *data = urb->transfer_buffer;
606 	struct net_device *netdev = urb->context;
607 	struct f81604_port_priv *priv;
608 	int ret;
609 
610 	priv = netdev_priv(netdev);
611 
612 	if (!netif_device_present(netdev))
613 		return;
614 
615 	if (urb->status)
616 		netdev_info(netdev, "%s: Int URB aborted: %pe\n", __func__,
617 			    ERR_PTR(urb->status));
618 
619 	switch (urb->status) {
620 	case 0: /* success */
621 		break;
622 
623 	case -ENOENT:
624 	case -EPIPE:
625 	case -EPROTO:
626 	case -ESHUTDOWN:
627 		return;
628 
629 	default:
630 		goto resubmit_urb;
631 	}
632 
633 	/* handle Errors */
634 	if (data->isrc & (F81604_SJA1000_IRQ_DOI | F81604_SJA1000_IRQ_EI |
635 			  F81604_SJA1000_IRQ_BEI | F81604_SJA1000_IRQ_EPI |
636 			  F81604_SJA1000_IRQ_ALI))
637 		f81604_handle_can_bus_errors(priv, data);
638 
639 	/* handle TX */
640 	if (priv->can.state != CAN_STATE_BUS_OFF &&
641 	    (data->isrc & F81604_SJA1000_IRQ_TI))
642 		f81604_handle_tx(priv, data);
643 
644 resubmit_urb:
645 	ret = usb_submit_urb(urb, GFP_ATOMIC);
646 	if (ret == -ENODEV)
647 		netif_device_detach(netdev);
648 	else if (ret)
649 		netdev_err(netdev, "%s: failed to resubmit int urb: %pe\n",
650 			   __func__, ERR_PTR(ret));
651 }
652 
f81604_unregister_urbs(struct f81604_port_priv * priv)653 static void f81604_unregister_urbs(struct f81604_port_priv *priv)
654 {
655 	usb_kill_anchored_urbs(&priv->urbs_anchor);
656 }
657 
f81604_register_urbs(struct f81604_port_priv * priv)658 static int f81604_register_urbs(struct f81604_port_priv *priv)
659 {
660 	struct net_device *netdev = priv->netdev;
661 	struct f81604_int_data *int_data;
662 	int id = netdev->dev_port;
663 	struct urb *int_urb;
664 	int rx_urb_cnt;
665 	int ret;
666 
667 	for (rx_urb_cnt = 0; rx_urb_cnt < F81604_MAX_RX_URBS; ++rx_urb_cnt) {
668 		struct f81604_can_frame *frame;
669 		struct urb *rx_urb;
670 
671 		rx_urb = usb_alloc_urb(0, GFP_KERNEL);
672 		if (!rx_urb) {
673 			ret = -ENOMEM;
674 			break;
675 		}
676 
677 		frame = kmalloc(sizeof(*frame), GFP_KERNEL);
678 		if (!frame) {
679 			usb_free_urb(rx_urb);
680 			ret = -ENOMEM;
681 			break;
682 		}
683 
684 		usb_fill_bulk_urb(rx_urb, priv->dev,
685 				  usb_rcvbulkpipe(priv->dev, bulk_in_addr[id]),
686 				  frame, sizeof(*frame),
687 				  f81604_read_bulk_callback, netdev);
688 
689 		rx_urb->transfer_flags |= URB_FREE_BUFFER;
690 		usb_anchor_urb(rx_urb, &priv->urbs_anchor);
691 
692 		ret = usb_submit_urb(rx_urb, GFP_KERNEL);
693 		if (ret) {
694 			usb_unanchor_urb(rx_urb);
695 			usb_free_urb(rx_urb);
696 			break;
697 		}
698 
699 		/* Drop reference, USB core will take care of freeing it */
700 		usb_free_urb(rx_urb);
701 	}
702 
703 	if (rx_urb_cnt == 0) {
704 		netdev_warn(netdev, "%s: submit rx urb failed: %pe\n",
705 			    __func__, ERR_PTR(ret));
706 
707 		goto error;
708 	}
709 
710 	int_urb = usb_alloc_urb(0, GFP_KERNEL);
711 	if (!int_urb) {
712 		ret = -ENOMEM;
713 		goto error;
714 	}
715 
716 	int_data = kmalloc(sizeof(*int_data), GFP_KERNEL);
717 	if (!int_data) {
718 		usb_free_urb(int_urb);
719 		ret = -ENOMEM;
720 		goto error;
721 	}
722 
723 	usb_fill_int_urb(int_urb, priv->dev,
724 			 usb_rcvintpipe(priv->dev, int_in_addr[id]), int_data,
725 			 sizeof(*int_data), f81604_read_int_callback, netdev,
726 			 1);
727 
728 	int_urb->transfer_flags |= URB_FREE_BUFFER;
729 	usb_anchor_urb(int_urb, &priv->urbs_anchor);
730 
731 	ret = usb_submit_urb(int_urb, GFP_KERNEL);
732 	if (ret) {
733 		usb_unanchor_urb(int_urb);
734 		usb_free_urb(int_urb);
735 
736 		netdev_warn(netdev, "%s: submit int urb failed: %pe\n",
737 			    __func__, ERR_PTR(ret));
738 		goto error;
739 	}
740 
741 	/* Drop reference, USB core will take care of freeing it */
742 	usb_free_urb(int_urb);
743 
744 	return 0;
745 
746 error:
747 	f81604_unregister_urbs(priv);
748 	return ret;
749 }
750 
f81604_start(struct net_device * netdev)751 static int f81604_start(struct net_device *netdev)
752 {
753 	struct f81604_port_priv *priv = netdev_priv(netdev);
754 	int ret;
755 	u8 mode;
756 	u8 tmp;
757 
758 	mode = F81604_RX_AUTO_RELEASE_BUF | F81604_INT_WHEN_CHANGE;
759 
760 	/* Set TR/AT mode */
761 	if (priv->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT)
762 		mode |= F81604_TX_ONESHOT;
763 	else
764 		mode |= F81604_TX_NORMAL;
765 
766 	ret = f81604_sja1000_write(priv, F81604_CTRL_MODE_REG, mode);
767 	if (ret)
768 		return ret;
769 
770 	/* set reset mode */
771 	ret = f81604_set_reset_mode(priv);
772 	if (ret)
773 		return ret;
774 
775 	ret = f81604_chipset_init(priv);
776 	if (ret)
777 		return ret;
778 
779 	/* Clear error counters and error code capture */
780 	ret = f81604_sja1000_write(priv, F81604_SJA1000_TXERR, 0);
781 	if (ret)
782 		return ret;
783 
784 	ret = f81604_sja1000_write(priv, F81604_SJA1000_RXERR, 0);
785 	if (ret)
786 		return ret;
787 
788 	/* Read clear for ECC/ALC/IR register */
789 	ret = f81604_sja1000_read(priv, F81604_SJA1000_ECC, &tmp);
790 	if (ret)
791 		return ret;
792 
793 	ret = f81604_sja1000_read(priv, F81604_SJA1000_ALC, &tmp);
794 	if (ret)
795 		return ret;
796 
797 	ret = f81604_sja1000_read(priv, F81604_SJA1000_IR, &tmp);
798 	if (ret)
799 		return ret;
800 
801 	ret = f81604_register_urbs(priv);
802 	if (ret)
803 		return ret;
804 
805 	ret = f81604_set_normal_mode(priv);
806 	if (ret) {
807 		f81604_unregister_urbs(priv);
808 		return ret;
809 	}
810 
811 	return 0;
812 }
813 
f81604_set_bittiming(struct net_device * dev)814 static int f81604_set_bittiming(struct net_device *dev)
815 {
816 	struct f81604_port_priv *priv = netdev_priv(dev);
817 	struct can_bittiming *bt = &priv->can.bittiming;
818 	u8 btr0, btr1;
819 	int ret;
820 
821 	btr0 = FIELD_PREP(F81604_BRP_MASK, bt->brp - 1) |
822 	       FIELD_PREP(F81604_SJW_MASK, bt->sjw - 1);
823 
824 	btr1 = FIELD_PREP(F81604_SEG1_MASK,
825 			  bt->prop_seg + bt->phase_seg1 - 1) |
826 	       FIELD_PREP(F81604_SEG2_MASK, bt->phase_seg2 - 1);
827 
828 	if (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
829 		btr1 |= F81604_SJA1000_BTR1_SAMPLE_TRIPLE;
830 
831 	ret = f81604_sja1000_write(priv, F81604_SJA1000_BTR0, btr0);
832 	if (ret) {
833 		netdev_warn(dev, "%s: Set BTR0 failed: %pe\n", __func__,
834 			    ERR_PTR(ret));
835 		return ret;
836 	}
837 
838 	ret = f81604_sja1000_write(priv, F81604_SJA1000_BTR1, btr1);
839 	if (ret) {
840 		netdev_warn(dev, "%s: Set BTR1 failed: %pe\n", __func__,
841 			    ERR_PTR(ret));
842 		return ret;
843 	}
844 
845 	return 0;
846 }
847 
f81604_set_mode(struct net_device * netdev,enum can_mode mode)848 static int f81604_set_mode(struct net_device *netdev, enum can_mode mode)
849 {
850 	int ret;
851 
852 	switch (mode) {
853 	case CAN_MODE_START:
854 		ret = f81604_start(netdev);
855 		if (!ret && netif_queue_stopped(netdev))
856 			netif_wake_queue(netdev);
857 		break;
858 
859 	default:
860 		ret = -EOPNOTSUPP;
861 	}
862 
863 	return ret;
864 }
865 
f81604_write_bulk_callback(struct urb * urb)866 static void f81604_write_bulk_callback(struct urb *urb)
867 {
868 	struct net_device *netdev = urb->context;
869 
870 	if (!netif_device_present(netdev))
871 		return;
872 
873 	if (urb->status)
874 		netdev_info(netdev, "%s: Tx URB error: %pe\n", __func__,
875 			    ERR_PTR(urb->status));
876 }
877 
f81604_clear_reg_work(struct work_struct * work)878 static void f81604_clear_reg_work(struct work_struct *work)
879 {
880 	struct f81604_port_priv *priv;
881 	u8 tmp;
882 
883 	priv = container_of(work, struct f81604_port_priv, clear_reg_work);
884 
885 	/* dummy read for clear Arbitration lost capture(ALC) register. */
886 	if (test_and_clear_bit(F81604_CLEAR_ALC, &priv->clear_flags))
887 		f81604_sja1000_read(priv, F81604_SJA1000_ALC, &tmp);
888 
889 	/* dummy read for clear Error code capture(ECC) register. */
890 	if (test_and_clear_bit(F81604_CLEAR_ECC, &priv->clear_flags))
891 		f81604_sja1000_read(priv, F81604_SJA1000_ECC, &tmp);
892 
893 	/* dummy write for clear data overrun flag. */
894 	if (test_and_clear_bit(F81604_CLEAR_OVERRUN, &priv->clear_flags))
895 		f81604_sja1000_write(priv, F81604_SJA1000_CMR,
896 				     F81604_SJA1000_CMD_CDO);
897 }
898 
f81604_start_xmit(struct sk_buff * skb,struct net_device * netdev)899 static netdev_tx_t f81604_start_xmit(struct sk_buff *skb,
900 				     struct net_device *netdev)
901 {
902 	struct can_frame *cf = (struct can_frame *)skb->data;
903 	struct f81604_port_priv *priv = netdev_priv(netdev);
904 	struct net_device_stats *stats = &netdev->stats;
905 	struct f81604_can_frame *frame;
906 	struct urb *write_urb;
907 	int ret;
908 
909 	if (can_dev_dropped_skb(netdev, skb))
910 		return NETDEV_TX_OK;
911 
912 	netif_stop_queue(netdev);
913 
914 	write_urb = usb_alloc_urb(0, GFP_ATOMIC);
915 	if (!write_urb)
916 		goto nomem_urb;
917 
918 	frame = kzalloc(sizeof(*frame), GFP_ATOMIC);
919 	if (!frame)
920 		goto nomem_buf;
921 
922 	usb_fill_bulk_urb(write_urb, priv->dev,
923 			  usb_sndbulkpipe(priv->dev,
924 					  bulk_out_addr[netdev->dev_port]),
925 			  frame, sizeof(*frame), f81604_write_bulk_callback,
926 			  priv->netdev);
927 
928 	write_urb->transfer_flags |= URB_FREE_BUFFER;
929 
930 	frame->cmd = F81604_CMD_DATA;
931 	frame->dlc = cf->len;
932 
933 	if (cf->can_id & CAN_RTR_FLAG)
934 		frame->dlc |= F81604_DLC_RTR_BIT;
935 
936 	if (cf->can_id & CAN_EFF_FLAG) {
937 		u32 id = (cf->can_id & CAN_EFF_MASK) << F81604_EFF_SHIFT;
938 
939 		put_unaligned_be32(id, &frame->eff.id);
940 
941 		frame->dlc |= F81604_DLC_EFF_BIT;
942 
943 		if (!(cf->can_id & CAN_RTR_FLAG))
944 			memcpy(&frame->eff.data, cf->data, cf->len);
945 	} else {
946 		u32 id = (cf->can_id & CAN_SFF_MASK) << F81604_SFF_SHIFT;
947 
948 		put_unaligned_be16(id, &frame->sff.id);
949 
950 		if (!(cf->can_id & CAN_RTR_FLAG))
951 			memcpy(&frame->sff.data, cf->data, cf->len);
952 	}
953 
954 	can_put_echo_skb(skb, netdev, 0, 0);
955 
956 	ret = usb_submit_urb(write_urb, GFP_ATOMIC);
957 	if (ret) {
958 		netdev_err(netdev, "%s: failed to resubmit tx bulk urb: %pe\n",
959 			   __func__, ERR_PTR(ret));
960 
961 		can_free_echo_skb(netdev, 0, NULL);
962 		stats->tx_dropped++;
963 		stats->tx_errors++;
964 
965 		if (ret == -ENODEV)
966 			netif_device_detach(netdev);
967 		else
968 			netif_wake_queue(netdev);
969 	}
970 
971 	/* let usb core take care of this urb */
972 	usb_free_urb(write_urb);
973 
974 	return NETDEV_TX_OK;
975 
976 nomem_buf:
977 	usb_free_urb(write_urb);
978 
979 nomem_urb:
980 	dev_kfree_skb(skb);
981 	stats->tx_dropped++;
982 	stats->tx_errors++;
983 	netif_wake_queue(netdev);
984 
985 	return NETDEV_TX_OK;
986 }
987 
f81604_get_berr_counter(const struct net_device * netdev,struct can_berr_counter * bec)988 static int f81604_get_berr_counter(const struct net_device *netdev,
989 				   struct can_berr_counter *bec)
990 {
991 	struct f81604_port_priv *priv = netdev_priv(netdev);
992 	u8 txerr, rxerr;
993 	int ret;
994 
995 	ret = f81604_sja1000_read(priv, F81604_SJA1000_TXERR, &txerr);
996 	if (ret)
997 		return ret;
998 
999 	ret = f81604_sja1000_read(priv, F81604_SJA1000_RXERR, &rxerr);
1000 	if (ret)
1001 		return ret;
1002 
1003 	bec->txerr = txerr;
1004 	bec->rxerr = rxerr;
1005 
1006 	return 0;
1007 }
1008 
1009 /* Open USB device */
f81604_open(struct net_device * netdev)1010 static int f81604_open(struct net_device *netdev)
1011 {
1012 	int ret;
1013 
1014 	ret = open_candev(netdev);
1015 	if (ret)
1016 		return ret;
1017 
1018 	ret = f81604_start(netdev);
1019 	if (ret) {
1020 		if (ret == -ENODEV)
1021 			netif_device_detach(netdev);
1022 
1023 		close_candev(netdev);
1024 		return ret;
1025 	}
1026 
1027 	netif_start_queue(netdev);
1028 	return 0;
1029 }
1030 
1031 /* Close USB device */
f81604_close(struct net_device * netdev)1032 static int f81604_close(struct net_device *netdev)
1033 {
1034 	struct f81604_port_priv *priv = netdev_priv(netdev);
1035 
1036 	f81604_set_reset_mode(priv);
1037 
1038 	netif_stop_queue(netdev);
1039 	cancel_work_sync(&priv->clear_reg_work);
1040 	close_candev(netdev);
1041 
1042 	f81604_unregister_urbs(priv);
1043 
1044 	return 0;
1045 }
1046 
1047 static const struct net_device_ops f81604_netdev_ops = {
1048 	.ndo_open = f81604_open,
1049 	.ndo_stop = f81604_close,
1050 	.ndo_start_xmit = f81604_start_xmit,
1051 	.ndo_change_mtu = can_change_mtu,
1052 };
1053 
1054 static const struct can_bittiming_const f81604_bittiming_const = {
1055 	.name = KBUILD_MODNAME,
1056 	.tseg1_min = 1,
1057 	.tseg1_max = 16,
1058 	.tseg2_min = 1,
1059 	.tseg2_max = 8,
1060 	.sjw_max = 4,
1061 	.brp_min = 1,
1062 	.brp_max = 64,
1063 	.brp_inc = 1,
1064 };
1065 
1066 /* Called by the usb core when driver is unloaded or device is removed */
f81604_disconnect(struct usb_interface * intf)1067 static void f81604_disconnect(struct usb_interface *intf)
1068 {
1069 	struct f81604_priv *priv = usb_get_intfdata(intf);
1070 	int i;
1071 
1072 	for (i = 0; i < ARRAY_SIZE(priv->netdev); ++i) {
1073 		if (!priv->netdev[i])
1074 			continue;
1075 
1076 		unregister_netdev(priv->netdev[i]);
1077 		free_candev(priv->netdev[i]);
1078 	}
1079 }
1080 
__f81604_set_termination(struct usb_device * dev,int idx,u16 term)1081 static int __f81604_set_termination(struct usb_device *dev, int idx, u16 term)
1082 {
1083 	u8 mask, data = 0;
1084 
1085 	if (idx == 0)
1086 		mask = F81604_CAN0_TERM;
1087 	else
1088 		mask = F81604_CAN1_TERM;
1089 
1090 	if (term)
1091 		data = mask;
1092 
1093 	return f81604_update_bits(dev, F81604_TERMINATOR_REG, mask, data);
1094 }
1095 
f81604_set_termination(struct net_device * netdev,u16 term)1096 static int f81604_set_termination(struct net_device *netdev, u16 term)
1097 {
1098 	struct f81604_port_priv *port_priv = netdev_priv(netdev);
1099 
1100 	ASSERT_RTNL();
1101 
1102 	return __f81604_set_termination(port_priv->dev, netdev->dev_port,
1103 					term);
1104 }
1105 
f81604_probe(struct usb_interface * intf,const struct usb_device_id * id)1106 static int f81604_probe(struct usb_interface *intf,
1107 			const struct usb_device_id *id)
1108 {
1109 	struct usb_device *dev = interface_to_usbdev(intf);
1110 	struct net_device *netdev;
1111 	struct f81604_priv *priv;
1112 	int i, ret;
1113 
1114 	priv = devm_kzalloc(&intf->dev, sizeof(*priv), GFP_KERNEL);
1115 	if (!priv)
1116 		return -ENOMEM;
1117 
1118 	usb_set_intfdata(intf, priv);
1119 
1120 	for (i = 0; i < ARRAY_SIZE(priv->netdev); ++i) {
1121 		ret = __f81604_set_termination(dev, i, 0);
1122 		if (ret) {
1123 			dev_err(&intf->dev,
1124 				"Setting termination of CH#%d failed: %pe\n",
1125 				i, ERR_PTR(ret));
1126 			return ret;
1127 		}
1128 	}
1129 
1130 	for (i = 0; i < ARRAY_SIZE(priv->netdev); ++i) {
1131 		struct f81604_port_priv *port_priv;
1132 
1133 		netdev = alloc_candev(sizeof(*port_priv), 1);
1134 		if (!netdev) {
1135 			dev_err(&intf->dev, "Couldn't alloc candev: %d\n", i);
1136 			ret = -ENOMEM;
1137 
1138 			goto failure_cleanup;
1139 		}
1140 
1141 		port_priv = netdev_priv(netdev);
1142 
1143 		INIT_WORK(&port_priv->clear_reg_work, f81604_clear_reg_work);
1144 		init_usb_anchor(&port_priv->urbs_anchor);
1145 
1146 		port_priv->intf = intf;
1147 		port_priv->dev = dev;
1148 		port_priv->netdev = netdev;
1149 		port_priv->can.clock.freq = F81604_CAN_CLOCK;
1150 
1151 		port_priv->can.termination_const = f81604_termination;
1152 		port_priv->can.termination_const_cnt =
1153 			ARRAY_SIZE(f81604_termination);
1154 		port_priv->can.bittiming_const = &f81604_bittiming_const;
1155 		port_priv->can.do_set_bittiming = f81604_set_bittiming;
1156 		port_priv->can.do_set_mode = f81604_set_mode;
1157 		port_priv->can.do_set_termination = f81604_set_termination;
1158 		port_priv->can.do_get_berr_counter = f81604_get_berr_counter;
1159 		port_priv->can.ctrlmode_supported =
1160 			CAN_CTRLMODE_LISTENONLY | CAN_CTRLMODE_3_SAMPLES |
1161 			CAN_CTRLMODE_ONE_SHOT | CAN_CTRLMODE_BERR_REPORTING |
1162 			CAN_CTRLMODE_PRESUME_ACK;
1163 
1164 		netdev->ethtool_ops = &f81604_ethtool_ops;
1165 		netdev->netdev_ops = &f81604_netdev_ops;
1166 		netdev->flags |= IFF_ECHO;
1167 		netdev->dev_port = i;
1168 
1169 		SET_NETDEV_DEV(netdev, &intf->dev);
1170 
1171 		ret = register_candev(netdev);
1172 		if (ret) {
1173 			netdev_err(netdev, "register CAN device failed: %pe\n",
1174 				   ERR_PTR(ret));
1175 			free_candev(netdev);
1176 
1177 			goto failure_cleanup;
1178 		}
1179 
1180 		priv->netdev[i] = netdev;
1181 	}
1182 
1183 	return 0;
1184 
1185 failure_cleanup:
1186 	f81604_disconnect(intf);
1187 	return ret;
1188 }
1189 
1190 static struct usb_driver f81604_driver = {
1191 	.name = KBUILD_MODNAME,
1192 	.probe = f81604_probe,
1193 	.disconnect = f81604_disconnect,
1194 	.id_table = f81604_table,
1195 };
1196 
1197 module_usb_driver(f81604_driver);
1198 
1199 MODULE_AUTHOR("Ji-Ze Hong (Peter Hong) <peter_hong@fintek.com.tw>");
1200 MODULE_DESCRIPTION("Fintek F81604 USB to 2xCANBUS");
1201 MODULE_LICENSE("GPL");
1202