xref: /openbmc/u-boot/drivers/spi/fsl_espi.c (revision d94604d5)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * eSPI controller driver.
4  *
5  * Copyright 2010-2011 Freescale Semiconductor, Inc.
6  * Author: Mingkai Hu (Mingkai.hu@freescale.com)
7  */
8 
9 #include <common.h>
10 
11 #include <malloc.h>
12 #include <spi.h>
13 #include <asm/immap_85xx.h>
14 
15 struct fsl_spi_slave {
16 	struct spi_slave slave;
17 	ccsr_espi_t	*espi;
18 	unsigned int	div16;
19 	unsigned int	pm;
20 	int		tx_timeout;
21 	unsigned int	mode;
22 	size_t		cmd_len;
23 	u8		cmd_buf[16];
24 	size_t		data_len;
25 	unsigned int    max_transfer_length;
26 };
27 
28 #define to_fsl_spi_slave(s) container_of(s, struct fsl_spi_slave, slave)
29 #define US_PER_SECOND		1000000UL
30 
31 #define ESPI_MAX_CS_NUM		4
32 #define ESPI_FIFO_WIDTH_BIT	32
33 
34 #define ESPI_EV_RNE		BIT(9)
35 #define ESPI_EV_TNF		BIT(8)
36 #define ESPI_EV_DON		BIT(14)
37 #define ESPI_EV_TXE		BIT(15)
38 #define ESPI_EV_RFCNT_SHIFT	24
39 #define ESPI_EV_RFCNT_MASK	(0x3f << ESPI_EV_RFCNT_SHIFT)
40 
41 #define ESPI_MODE_EN		BIT(31)	/* Enable interface */
42 #define ESPI_MODE_TXTHR(x)	((x) << 8)	/* Tx FIFO threshold */
43 #define ESPI_MODE_RXTHR(x)	((x) << 0)	/* Rx FIFO threshold */
44 
45 #define ESPI_COM_CS(x)		((x) << 30)
46 #define ESPI_COM_TRANLEN(x)	((x) << 0)
47 
48 #define ESPI_CSMODE_CI_INACTIVEHIGH	BIT(31)
49 #define ESPI_CSMODE_CP_BEGIN_EDGCLK	BIT(30)
50 #define ESPI_CSMODE_REV_MSB_FIRST	BIT(29)
51 #define ESPI_CSMODE_DIV16		BIT(28)
52 #define ESPI_CSMODE_PM(x)		((x) << 24)
53 #define ESPI_CSMODE_POL_ASSERTED_LOW	BIT(20)
54 #define ESPI_CSMODE_LEN(x)		((x) << 16)
55 #define ESPI_CSMODE_CSBEF(x)		((x) << 12)
56 #define ESPI_CSMODE_CSAFT(x)		((x) << 8)
57 #define ESPI_CSMODE_CSCG(x)		((x) << 3)
58 
59 #define ESPI_CSMODE_INIT_VAL (ESPI_CSMODE_POL_ASSERTED_LOW | \
60 		ESPI_CSMODE_CSBEF(0) | ESPI_CSMODE_CSAFT(0) | \
61 		ESPI_CSMODE_CSCG(1))
62 
63 #define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0
64 
spi_setup_slave(unsigned int bus,unsigned int cs,unsigned int max_hz,unsigned int mode)65 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
66 		unsigned int max_hz, unsigned int mode)
67 {
68 	struct fsl_spi_slave *fsl;
69 	sys_info_t sysinfo;
70 	unsigned long spibrg = 0;
71 	unsigned long spi_freq = 0;
72 	unsigned char pm = 0;
73 
74 	if (!spi_cs_is_valid(bus, cs))
75 		return NULL;
76 
77 	fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs);
78 	if (!fsl)
79 		return NULL;
80 
81 	fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
82 	fsl->mode = mode;
83 	fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN;
84 
85 	/* Set eSPI BRG clock source */
86 	get_sys_info(&sysinfo);
87 	spibrg = sysinfo.freq_systembus / 2;
88 	fsl->div16 = 0;
89 	if ((spibrg / max_hz) > 32) {
90 		fsl->div16 = ESPI_CSMODE_DIV16;
91 		pm = spibrg / (max_hz * 16 * 2);
92 		if (pm > 16) {
93 			pm = 16;
94 			debug("Requested speed is too low: %d Hz, %ld Hz "
95 				"is used.\n", max_hz, spibrg / (32 * 16));
96 		}
97 	} else
98 		pm = spibrg / (max_hz * 2);
99 	if (pm)
100 		pm--;
101 	fsl->pm = pm;
102 
103 	if (fsl->div16)
104 		spi_freq = spibrg / ((pm + 1) * 2 * 16);
105 	else
106 		spi_freq = spibrg / ((pm + 1) * 2);
107 
108 	/* set tx_timeout to 10 times of one espi FIFO entry go out */
109 	fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * ESPI_FIFO_WIDTH_BIT
110 				* 10), spi_freq);
111 
112 	return &fsl->slave;
113 }
114 
spi_free_slave(struct spi_slave * slave)115 void spi_free_slave(struct spi_slave *slave)
116 {
117 	struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
118 	free(fsl);
119 }
120 
spi_claim_bus(struct spi_slave * slave)121 int spi_claim_bus(struct spi_slave *slave)
122 {
123 	struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
124 	ccsr_espi_t *espi = fsl->espi;
125 	unsigned char pm = fsl->pm;
126 	unsigned int cs = slave->cs;
127 	unsigned int mode =  fsl->mode;
128 	unsigned int div16 = fsl->div16;
129 	int i;
130 
131 	debug("%s: bus:%i cs:%i\n", __func__, slave->bus, cs);
132 
133 	/* Enable eSPI interface */
134 	out_be32(&espi->mode, ESPI_MODE_RXTHR(3)
135 			| ESPI_MODE_TXTHR(4) | ESPI_MODE_EN);
136 
137 	out_be32(&espi->event, 0xffffffff); /* Clear all eSPI events */
138 	out_be32(&espi->mask, 0x00000000); /* Mask  all eSPI interrupts */
139 
140 	/* Init CS mode interface */
141 	for (i = 0; i < ESPI_MAX_CS_NUM; i++)
142 		out_be32(&espi->csmode[i], ESPI_CSMODE_INIT_VAL);
143 
144 	out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) &
145 		~(ESPI_CSMODE_PM(0xF) | ESPI_CSMODE_DIV16
146 		| ESPI_CSMODE_CI_INACTIVEHIGH | ESPI_CSMODE_CP_BEGIN_EDGCLK
147 		| ESPI_CSMODE_REV_MSB_FIRST | ESPI_CSMODE_LEN(0xF)));
148 
149 	/* Set eSPI BRG clock source */
150 	out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
151 		| ESPI_CSMODE_PM(pm) | div16);
152 
153 	/* Set eSPI mode */
154 	if (mode & SPI_CPHA)
155 		out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
156 			| ESPI_CSMODE_CP_BEGIN_EDGCLK);
157 	if (mode & SPI_CPOL)
158 		out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
159 			| ESPI_CSMODE_CI_INACTIVEHIGH);
160 
161 	/* Character bit order: msb first */
162 	out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
163 		| ESPI_CSMODE_REV_MSB_FIRST);
164 
165 	/* Character length in bits, between 0x3~0xf, i.e. 4bits~16bits */
166 	out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
167 		| ESPI_CSMODE_LEN(7));
168 
169 	return 0;
170 }
171 
spi_release_bus(struct spi_slave * slave)172 void spi_release_bus(struct spi_slave *slave)
173 {
174 
175 }
176 
fsl_espi_tx(struct fsl_spi_slave * fsl,const void * dout)177 static void fsl_espi_tx(struct fsl_spi_slave *fsl, const void *dout)
178 {
179 	ccsr_espi_t *espi = fsl->espi;
180 	unsigned int tmpdout, event;
181 	int tmp_tx_timeout;
182 
183 	if (dout)
184 		tmpdout = *(u32 *)dout;
185 	else
186 		tmpdout = 0;
187 
188 	out_be32(&espi->tx, tmpdout);
189 	out_be32(&espi->event, ESPI_EV_TNF);
190 	debug("***spi_xfer:...%08x written\n", tmpdout);
191 
192 	tmp_tx_timeout = fsl->tx_timeout;
193 	/* Wait for eSPI transmit to go out */
194 	while (tmp_tx_timeout--) {
195 		event = in_be32(&espi->event);
196 		if (event & ESPI_EV_DON || event & ESPI_EV_TXE) {
197 			out_be32(&espi->event, ESPI_EV_TXE);
198 			break;
199 		}
200 		udelay(1);
201 	}
202 
203 	if (tmp_tx_timeout < 0)
204 		debug("***spi_xfer:...Tx timeout! event = %08x\n", event);
205 }
206 
fsl_espi_rx(struct fsl_spi_slave * fsl,void * din,unsigned int bytes)207 static int fsl_espi_rx(struct fsl_spi_slave *fsl, void *din, unsigned int bytes)
208 {
209 	ccsr_espi_t *espi = fsl->espi;
210 	unsigned int tmpdin, rx_times;
211 	unsigned char *buf, *p_cursor;
212 
213 	if (bytes <= 0)
214 		return 0;
215 
216 	rx_times = DIV_ROUND_UP(bytes, 4);
217 	buf = (unsigned char *)malloc(4 * rx_times);
218 	if (!buf) {
219 		debug("SF: Failed to malloc memory.\n");
220 		return -1;
221 	}
222 	p_cursor = buf;
223 	while (rx_times--) {
224 		tmpdin = in_be32(&espi->rx);
225 		debug("***spi_xfer:...%08x readed\n", tmpdin);
226 		*(u32 *)p_cursor = tmpdin;
227 		p_cursor += 4;
228 	}
229 
230 	if (din)
231 		memcpy(din, buf, bytes);
232 
233 	free(buf);
234 	out_be32(&espi->event, ESPI_EV_RNE);
235 
236 	return bytes;
237 }
238 
spi_xfer(struct spi_slave * slave,unsigned int bitlen,const void * data_out,void * data_in,unsigned long flags)239 int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out,
240 		void *data_in, unsigned long flags)
241 {
242 	struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
243 	ccsr_espi_t *espi = fsl->espi;
244 	unsigned int event, rx_bytes;
245 	const void *dout = NULL;
246 	void *din = NULL;
247 	int len = 0;
248 	int num_blks, num_chunks, max_tran_len, tran_len;
249 	int num_bytes;
250 	unsigned char *buffer = NULL;
251 	size_t buf_len;
252 	u8 *cmd_buf = fsl->cmd_buf;
253 	size_t cmd_len = fsl->cmd_len;
254 	size_t data_len = bitlen / 8;
255 	size_t rx_offset = 0;
256 	int rf_cnt;
257 
258 	max_tran_len = fsl->max_transfer_length;
259 	switch (flags) {
260 	case SPI_XFER_BEGIN:
261 		cmd_len = fsl->cmd_len = data_len;
262 		memcpy(cmd_buf, data_out, cmd_len);
263 		return 0;
264 	case 0:
265 	case SPI_XFER_END:
266 		if (bitlen == 0) {
267 			spi_cs_deactivate(slave);
268 			return 0;
269 		}
270 		buf_len = 2 * cmd_len + min(data_len, (size_t)max_tran_len);
271 		len = cmd_len + data_len;
272 		rx_offset = cmd_len;
273 		buffer = (unsigned char *)malloc(buf_len);
274 		if (!buffer) {
275 			debug("SF: Failed to malloc memory.\n");
276 			return 1;
277 		}
278 		memcpy(buffer, cmd_buf, cmd_len);
279 		if (data_in == NULL)
280 			memcpy(buffer + cmd_len, data_out, data_len);
281 		break;
282 	case SPI_XFER_BEGIN | SPI_XFER_END:
283 		len = data_len;
284 		buffer = (unsigned char *)malloc(len * 2);
285 		if (!buffer) {
286 			debug("SF: Failed to malloc memory.\n");
287 			return 1;
288 		}
289 		memcpy(buffer, data_out, len);
290 		rx_offset = len;
291 		cmd_len = 0;
292 		break;
293 	}
294 
295 	debug("spi_xfer: data_out %08X(%p) data_in %08X(%p) len %u\n",
296 	      *(uint *)data_out, data_out, *(uint *)data_in, data_in, len);
297 
298 	num_chunks = DIV_ROUND_UP(data_len, max_tran_len);
299 	while (num_chunks--) {
300 		if (data_in)
301 			din = buffer + rx_offset;
302 		dout = buffer;
303 		tran_len = min(data_len, (size_t)max_tran_len);
304 		num_blks = DIV_ROUND_UP(tran_len + cmd_len, 4);
305 		num_bytes = (tran_len + cmd_len) % 4;
306 		fsl->data_len = tran_len + cmd_len;
307 		spi_cs_activate(slave);
308 
309 		/* Clear all eSPI events */
310 		out_be32(&espi->event , 0xffffffff);
311 		/* handle data in 32-bit chunks */
312 		while (num_blks) {
313 			event = in_be32(&espi->event);
314 			if (event & ESPI_EV_TNF) {
315 				fsl_espi_tx(fsl, dout);
316 				/* Set up the next iteration */
317 				if (len > 4) {
318 					len -= 4;
319 					dout += 4;
320 				}
321 			}
322 
323 			event = in_be32(&espi->event);
324 			if (event & ESPI_EV_RNE) {
325 				rf_cnt = ((event & ESPI_EV_RFCNT_MASK)
326 						>> ESPI_EV_RFCNT_SHIFT);
327 				if (rf_cnt >= 4)
328 					rx_bytes = 4;
329 				else if (num_blks == 1 && rf_cnt == num_bytes)
330 					rx_bytes = num_bytes;
331 				else
332 					continue;
333 				if (fsl_espi_rx(fsl, din, rx_bytes)
334 						== rx_bytes) {
335 					num_blks--;
336 					if (din)
337 						din = (unsigned char *)din
338 							+ rx_bytes;
339 				}
340 			}
341 		}
342 		if (data_in) {
343 			memcpy(data_in, buffer + 2 * cmd_len, tran_len);
344 			if (*buffer == 0x0b) {
345 				data_in += tran_len;
346 				data_len -= tran_len;
347 				*(int *)buffer += tran_len;
348 			}
349 		}
350 		spi_cs_deactivate(slave);
351 	}
352 
353 	free(buffer);
354 	return 0;
355 }
356 
spi_cs_is_valid(unsigned int bus,unsigned int cs)357 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
358 {
359 	return bus == 0 && cs < ESPI_MAX_CS_NUM;
360 }
361 
spi_cs_activate(struct spi_slave * slave)362 void spi_cs_activate(struct spi_slave *slave)
363 {
364 	struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
365 	ccsr_espi_t *espi = fsl->espi;
366 	unsigned int com = 0;
367 	size_t data_len = fsl->data_len;
368 
369 	com &= ~(ESPI_COM_CS(0x3) | ESPI_COM_TRANLEN(0xFFFF));
370 	com |= ESPI_COM_CS(slave->cs);
371 	com |= ESPI_COM_TRANLEN(data_len - 1);
372 	out_be32(&espi->com, com);
373 }
374 
spi_cs_deactivate(struct spi_slave * slave)375 void spi_cs_deactivate(struct spi_slave *slave)
376 {
377 	struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
378 	ccsr_espi_t *espi = fsl->espi;
379 
380 	/* clear the RXCNT and TXCNT */
381 	out_be32(&espi->mode, in_be32(&espi->mode) & (~ESPI_MODE_EN));
382 	out_be32(&espi->mode, in_be32(&espi->mode) | ESPI_MODE_EN);
383 }
384