1 /** @file 2 GUIDs and definitions used for Common Platform Error Record. 3 4 Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR> 5 (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR> 6 SPDX-License-Identifier: BSD-2-Clause-Patent 7 8 @par Revision Reference: 9 GUIDs defined in UEFI 2.7 Specification. 10 11 **/ 12 13 #ifndef CPER_GUID_H 14 #define CPER_GUID_H 15 16 #include <libcper/BaseTypes.h> 17 #include <libcper/common-utils.h> 18 19 #ifdef __cplusplus 20 extern "C" { 21 #endif 22 23 #pragma pack(push, 1) 24 25 #define EFI_ERROR_RECORD_SIGNATURE_START SIGNATURE_32('C', 'P', 'E', 'R') 26 #define EFI_ERROR_RECORD_SIGNATURE_END 0xFFFFFFFF 27 28 #define EFI_ERROR_RECORD_REVISION 0x0101 29 30 /// 31 /// Error Severity in Error Record Header and Error Section Descriptor 32 ///@{ 33 #define EFI_GENERIC_ERROR_RECOVERABLE 0x00000000 34 #define EFI_GENERIC_ERROR_FATAL 0x00000001 35 #define EFI_GENERIC_ERROR_CORRECTED 0x00000002 36 #define EFI_GENERIC_ERROR_INFO 0x00000003 37 ///@} 38 39 /// 40 /// The validation bit mask indicates the validity of the following fields 41 /// in Error Record Header. 42 ///@{ 43 #define EFI_ERROR_RECORD_HEADER_PLATFORM_ID_VALID BIT0 44 #define EFI_ERROR_RECORD_HEADER_TIME_STAMP_VALID BIT1 45 #define EFI_ERROR_RECORD_HEADER_PARTITION_ID_VALID BIT2 46 ///@} 47 48 /// 49 /// Timestamp is precise if this bit is set and correlates to the time of the 50 /// error event. 51 /// 52 #define EFI_ERROR_TIME_STAMP_PRECISE BIT0 53 54 /// 55 /// Hexadecimal string representation of a 64bit integer 56 /// 16 digits + 2 char + 1 null termination 57 /// 58 #define EFI_UINT64_HEX_STRING_LEN 19 59 60 /// 61 /// Length of a single line description for the entire section. 62 /// 63 #define SECTION_DESC_STRING_SIZE 512 64 65 /// 66 /// Length of the description of certain fields within the section. 67 /// 68 #define EFI_ERROR_DESCRIPTION_STRING_LEN 64 69 #define EFI_ERROR_INFORMATION_DESCRIPTION_STRING_LEN 128 70 71 /// 72 /// The timestamp correlates to the time when the error information was collected 73 /// by the system software and may not necessarily represent the time of the error 74 /// event. The timestamp contains the local time in BCD format. 75 /// 76 typedef struct { 77 UINT8 Seconds; 78 UINT8 Minutes; 79 UINT8 Hours; 80 UINT8 Flag; 81 UINT8 Day; 82 UINT8 Month; 83 UINT8 Year; 84 UINT8 Century; 85 } EFI_ERROR_TIME_STAMP; 86 87 /// 88 /// GUID value indicating the record association with an error event notification type. 89 ///@{ 90 #define EFI_EVENT_NOTIFICATION_TYEP_CMC_GUID \ 91 { 0x2DCE8BB1, \ 92 0xBDD7, \ 93 0x450e, \ 94 { 0xB9, 0xAD, 0x9C, 0xF4, 0xEB, 0xD4, 0xF8, 0x90 } } 95 #define EFI_EVENT_NOTIFICATION_TYEP_CPE_GUID \ 96 { 0x4E292F96, \ 97 0xD843, \ 98 0x4a55, \ 99 { 0xA8, 0xC2, 0xD4, 0x81, 0xF2, 0x7E, 0xBE, 0xEE } } 100 #define EFI_EVENT_NOTIFICATION_TYEP_MCE_GUID \ 101 { 0xE8F56FFE, \ 102 0x919C, \ 103 0x4cc5, \ 104 { 0xBA, 0x88, 0x65, 0xAB, 0xE1, 0x49, 0x13, 0xBB } } 105 #define EFI_EVENT_NOTIFICATION_TYEP_PCIE_GUID \ 106 { 0xCF93C01F, \ 107 0x1A16, \ 108 0x4dfc, \ 109 { 0xB8, 0xBC, 0x9C, 0x4D, 0xAF, 0x67, 0xC1, 0x04 } } 110 #define EFI_EVENT_NOTIFICATION_TYEP_INIT_GUID \ 111 { 0xCC5263E8, \ 112 0x9308, \ 113 0x454a, \ 114 { 0x89, 0xD0, 0x34, 0x0B, 0xD3, 0x9B, 0xC9, 0x8E } } 115 #define EFI_EVENT_NOTIFICATION_TYEP_NMI_GUID \ 116 { 0x5BAD89FF, \ 117 0xB7E6, \ 118 0x42c9, \ 119 { 0x81, 0x4A, 0xCF, 0x24, 0x85, 0xD6, 0xE9, 0x8A } } 120 #define EFI_EVENT_NOTIFICATION_TYEP_BOOT_GUID \ 121 { 0x3D61A466, \ 122 0xAB40, \ 123 0x409a, \ 124 { 0xA6, 0x98, 0xF3, 0x62, 0xD4, 0x64, 0xB3, 0x8F } } 125 #define EFI_EVENT_NOTIFICATION_TYEP_DMAR_GUID \ 126 { 0x667DD791, \ 127 0xC6B3, \ 128 0x4c27, \ 129 { 0x8A, 0x6B, 0x0F, 0x8E, 0x72, 0x2D, 0xEB, 0x41 } } 130 #define EFI_EVENT_NOTIFICATION_TYPE_DMAR_SEA \ 131 { 0x9A78788A, \ 132 0xBBE8, \ 133 0x11E4, \ 134 { 0x80, 0x9E, 0x67, 0x61, 0x1E, 0x5D, 0x46, 0xB0 } } 135 #define EFI_EVENT_NOTIFICATION_TYPE_DMAR_SEI \ 136 { 0x5C284C81, \ 137 0xB0AE, \ 138 0x4E87, \ 139 { 0xA3, 0x22, 0xB0, 0x4C, 0x85, 0x62, 0x43, 0x23 } } 140 #define EFI_EVENT_NOTIFICATION_TYPE_DMAR_PEI \ 141 { 0x09A9D5AC, \ 142 0x5204, \ 143 0x4214, \ 144 { 0x96, 0xE5, 0x94, 0x99, 0x2E, 0x75, 0x2B, 0xCD } } 145 ///@} 146 147 /// 148 /// Error Record Header Flags 149 ///@{ 150 #define EFI_HW_ERROR_FLAGS_RECOVERED 0x00000001 151 #define EFI_HW_ERROR_FLAGS_PREVERR 0x00000002 152 #define EFI_HW_ERROR_FLAGS_SIMULATED 0x00000004 153 ///@} 154 155 /// 156 /// Common error record header 157 /// 158 typedef struct { 159 UINT32 SignatureStart; 160 UINT16 Revision; 161 UINT32 SignatureEnd; 162 UINT16 SectionCount; 163 UINT32 ErrorSeverity; 164 UINT32 ValidationBits; 165 UINT32 RecordLength; 166 EFI_ERROR_TIME_STAMP TimeStamp; 167 EFI_GUID PlatformID; 168 EFI_GUID PartitionID; 169 EFI_GUID CreatorID; 170 EFI_GUID NotificationType; 171 UINT64 RecordID; 172 UINT32 Flags; 173 UINT64 PersistenceInfo; 174 UINT8 Resv1[12]; 175 /// 176 /// An array of SectionCount descriptors for the associated 177 /// sections. The number of valid sections is equivalent to the 178 /// SectionCount. The buffer size of the record may include 179 /// more space to dynamically add additional Section 180 /// Descriptors to the error record. 181 /// 182 } EFI_COMMON_ERROR_RECORD_HEADER; 183 184 #define EFI_ERROR_SECTION_REVISION 0x0100 185 186 /// 187 /// Validity Fields in Error Section Descriptor. 188 /// 189 #define EFI_ERROR_SECTION_FRU_ID_VALID BIT0 190 #define EFI_ERROR_SECTION_FRU_STRING_VALID BIT1 191 192 /// 193 /// Flag field contains information that describes the error section 194 /// in Error Section Descriptor. 195 /// 196 #define EFI_ERROR_SECTION_FLAGS_PRIMARY BIT0 197 #define EFI_ERROR_SECTION_FLAGS_CONTAINMENT_WARNING BIT1 198 #define EFI_ERROR_SECTION_FLAGS_RESET BIT2 199 #define EFI_ERROR_SECTION_FLAGS_ERROR_THRESHOLD_EXCEEDED BIT3 200 #define EFI_ERROR_SECTION_FLAGS_RESOURCE_NOT_ACCESSIBLE BIT4 201 #define EFI_ERROR_SECTION_FLAGS_LATENT_ERROR BIT5 202 203 /// 204 /// Error Sectition Type GUIDs in Error Section Descriptor 205 ///@{ 206 #define EFI_ERROR_SECTION_PROCESSOR_GENERIC_GUID \ 207 { 0x9876ccad, \ 208 0x47b4, \ 209 0x4bdb, \ 210 { 0xb6, 0x5e, 0x16, 0xf1, 0x93, 0xc4, 0xf3, 0xdb } } 211 #define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_GUID \ 212 { 0xdc3ea0b0, \ 213 0xa144, \ 214 0x4797, \ 215 { 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d } } 216 #define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_IA32X64_GUID \ 217 { 0xdc3ea0b0, \ 218 0xa144, \ 219 0x4797, \ 220 { 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d } } 221 #define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_ARM_GUID \ 222 { 0xe19e3d16, \ 223 0xbc11, \ 224 0x11e4, \ 225 { 0x9c, 0xaa, 0xc2, 0x05, 0x1d, 0x5d, 0x46, 0xb0 } } 226 #define EFI_ERROR_SECTION_PLATFORM_MEMORY_GUID \ 227 { 0xa5bc1114, \ 228 0x6f64, \ 229 0x4ede, \ 230 { 0xb8, 0x63, 0x3e, 0x83, 0xed, 0x7c, 0x83, 0xb1 } } 231 #define EFI_ERROR_SECTION_PLATFORM_MEMORY2_GUID \ 232 { 0x61EC04FC, \ 233 0x48E6, \ 234 0xD813, \ 235 { 0x25, 0xC9, 0x8D, 0xAA, 0x44, 0x75, 0x0B, 0x12 } } 236 #define EFI_ERROR_SECTION_PCIE_GUID \ 237 { 0xd995e954, \ 238 0xbbc1, \ 239 0x430f, \ 240 { 0xad, 0x91, 0xb4, 0x4d, 0xcb, 0x3c, 0x6f, 0x35 } } 241 #define EFI_ERROR_SECTION_FW_ERROR_RECORD_GUID \ 242 { 0x81212a96, \ 243 0x09ed, \ 244 0x4996, \ 245 { 0x94, 0x71, 0x8d, 0x72, 0x9c, 0x8e, 0x69, 0xed } } 246 #define EFI_ERROR_SECTION_PCI_PCIX_BUS_GUID \ 247 { 0xc5753963, \ 248 0x3b84, \ 249 0x4095, \ 250 { 0xbf, 0x78, 0xed, 0xda, 0xd3, 0xf9, 0xc9, 0xdd } } 251 #define EFI_ERROR_SECTION_PCI_DEVICE_GUID \ 252 { 0xeb5e4685, \ 253 0xca66, \ 254 0x4769, \ 255 { 0xb6, 0xa2, 0x26, 0x06, 0x8b, 0x00, 0x13, 0x26 } } 256 #define EFI_ERROR_SECTION_DMAR_GENERIC_GUID \ 257 { 0x5b51fef7, \ 258 0xc79d, \ 259 0x4434, \ 260 { 0x8f, 0x1b, 0xaa, 0x62, 0xde, 0x3e, 0x2c, 0x64 } } 261 #define EFI_ERROR_SECTION_DIRECTED_IO_DMAR_GUID \ 262 { 0x71761d37, \ 263 0x32b2, \ 264 0x45cd, \ 265 { 0xa7, 0xd0, 0xb0, 0xfe, 0xdd, 0x93, 0xe8, 0xcf } } 266 #define EFI_ERROR_SECTION_IOMMU_DMAR_GUID \ 267 { 0x036f84e1, \ 268 0x7f37, \ 269 0x428c, \ 270 { 0xa7, 0x9e, 0x57, 0x5f, 0xdf, 0xaa, 0x84, 0xec } } 271 #define EFI_ERROR_SECTION_AMPERE_SPECIFIC_GUID \ 272 { 0x2826cc9f, \ 273 0x448c, \ 274 0x4c2b, \ 275 { 0x86, 0xb6, 0xa9, 0x53, 0x94, 0xb7, 0xef, 0x33 } } 276 ///@} 277 278 /// 279 /// Error Section Descriptor 280 /// 281 typedef struct { 282 UINT32 SectionOffset; 283 UINT32 SectionLength; 284 UINT16 Revision; 285 UINT8 SecValidMask; 286 UINT8 Resv1; 287 UINT32 SectionFlags; 288 EFI_GUID SectionType; 289 EFI_GUID FruId; 290 UINT32 Severity; 291 CHAR8 FruString[20]; 292 } EFI_ERROR_SECTION_DESCRIPTOR; 293 294 /// 295 /// The validation bit mask indicates whether or not each of the following fields are 296 /// valid in Proessor Generic Error section. 297 ///@{ 298 #define EFI_GENERIC_ERROR_PROC_TYPE_VALID BIT0 299 #define EFI_GENERIC_ERROR_PROC_ISA_VALID BIT1 300 #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_VALID BIT2 301 #define EFI_GENERIC_ERROR_PROC_OPERATION_VALID BIT3 302 #define EFI_GENERIC_ERROR_PROC_FLAGS_VALID BIT4 303 #define EFI_GENERIC_ERROR_PROC_LEVEL_VALID BIT5 304 #define EFI_GENERIC_ERROR_PROC_VERSION_VALID BIT6 305 #define EFI_GENERIC_ERROR_PROC_BRAND_VALID BIT7 306 #define EFI_GENERIC_ERROR_PROC_ID_VALID BIT8 307 #define EFI_GENERIC_ERROR_PROC_TARGET_ADDR_VALID BIT9 308 #define EFI_GENERIC_ERROR_PROC_REQUESTER_ID_VALID BIT10 309 #define EFI_GENERIC_ERROR_PROC_RESPONDER_ID_VALID BIT11 310 #define EFI_GENERIC_ERROR_PROC_INST_IP_VALID BIT12 311 ///@} 312 313 /// 314 /// The type of the processor architecture in Proessor Generic Error section. 315 ///@{ 316 #define EFI_GENERIC_ERROR_PROC_TYPE_IA32_X64 0x00 317 #define EFI_GENERIC_ERROR_PROC_TYPE_IA64 0x01 318 #define EFI_GENERIC_ERROR_PROC_TYPE_ARM 0x02 319 ///@} 320 321 /// 322 /// The type of the instruction set executing when the error occurred in Proessor 323 /// Generic Error section. 324 ///@{ 325 #define EFI_GENERIC_ERROR_PROC_ISA_IA32 0x00 326 #define EFI_GENERIC_ERROR_PROC_ISA_IA64 0x01 327 #define EFI_GENERIC_ERROR_PROC_ISA_X64 0x02 328 #define EFI_GENERIC_ERROR_PROC_ISA_ARM_A32_T32 0x03 329 #define EFI_GENERIC_ERROR_PROC_ISA_ARM_A64 0x04 330 ///@} 331 332 /// 333 /// The type of error that occurred in Proessor Generic Error section. 334 ///@{ 335 #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_UNKNOWN 0x00 336 #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_CACHE 0x01 337 #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_TLB 0x02 338 #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_BUS 0x04 339 #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_MICRO_ARCH 0x08 340 ///@} 341 342 /// 343 /// The type of operation in Proessor Generic Error section. 344 ///@{ 345 #define EFI_GENERIC_ERROR_PROC_OPERATION_GENERIC 0x00 346 #define EFI_GENERIC_ERROR_PROC_OPERATION_DATA_READ 0x01 347 #define EFI_GENERIC_ERROR_PROC_OPERATION_DATA_WRITE 0x02 348 #define EFI_GENERIC_ERROR_PROC_OPERATION_INSTRUCTION_EXEC 0x03 349 ///@} 350 351 /// 352 /// Flags bit mask indicates additional information about the error in Proessor Generic 353 /// Error section 354 ///@{ 355 #define EFI_GENERIC_ERROR_PROC_FLAGS_RESTARTABLE BIT0 356 #define EFI_GENERIC_ERROR_PROC_FLAGS_PRECISE_IP BIT1 357 #define EFI_GENERIC_ERROR_PROC_FLAGS_OVERFLOW BIT2 358 #define EFI_GENERIC_ERROR_PROC_FLAGS_CORRECTED BIT3 359 ///@} 360 361 /// 362 /// Processor Generic Error Section 363 /// describes processor reported hardware errors for logical processors in the system. 364 /// 365 typedef struct { 366 UINT64 ValidFields; 367 UINT8 Type; 368 UINT8 Isa; 369 UINT8 ErrorType; 370 UINT8 Operation; 371 UINT8 Flags; 372 UINT8 Level; 373 UINT16 Resv1; 374 UINT64 VersionInfo; 375 CHAR8 BrandString[128]; 376 UINT64 ApicId; 377 UINT64 TargetAddr; 378 UINT64 RequestorId; 379 UINT64 ResponderId; 380 UINT64 InstructionIP; 381 } EFI_PROCESSOR_GENERIC_ERROR_DATA; 382 383 /// 384 /// IA32 and x64 Specific definitions. 385 /// 386 387 /// 388 /// GUID value indicating the type of Processor Error Information structure 389 /// in IA32/X64 Processor Error Information Structure. 390 ///@{ 391 #define EFI_IA32_X64_ERROR_TYPE_CACHE_CHECK_GUID \ 392 { 0xA55701F5, \ 393 0xE3EF, \ 394 0x43de, \ 395 { 0xAC, 0x72, 0x24, 0x9B, 0x57, 0x3F, 0xAD, 0x2C } } 396 #define EFI_IA32_X64_ERROR_TYPE_TLB_CHECK_GUID \ 397 { 0xFC06B535, \ 398 0x5E1F, \ 399 0x4562, \ 400 { 0x9F, 0x25, 0x0A, 0x3B, 0x9A, 0xDB, 0x63, 0xC3 } } 401 #define EFI_IA32_X64_ERROR_TYPE_BUS_CHECK_GUID \ 402 { 0x1CF3F8B3, \ 403 0xC5B1, \ 404 0x49a2, \ 405 { 0xAA, 0x59, 0x5E, 0xEF, 0x92, 0xFF, 0xA6, 0x3C } } 406 #define EFI_IA32_X64_ERROR_TYPE_MS_CHECK_GUID \ 407 { 0x48AB7F57, \ 408 0xDC34, \ 409 0x4f6c, \ 410 { 0xA7, 0xD3, 0xB0, 0xB5, 0xB0, 0xA7, 0x43, 0x14 } } 411 extern EFI_GUID gEfiIa32x64ErrorTypeCacheCheckGuid; 412 extern EFI_GUID gEfiIa32x64ErrorTypeTlbCheckGuid; 413 extern EFI_GUID gEfiIa32x64ErrorTypeBusCheckGuid; 414 extern EFI_GUID gEfiIa32x64ErrorTypeMsCheckGuid; 415 416 ///@} 417 418 /// 419 /// The validation bit mask indicates which fields in the IA32/X64 Processor 420 /// Error Record structure are valid. 421 ///@{ 422 #define EFI_IA32_X64_PROCESSOR_ERROR_APIC_ID_VALID BIT0 423 #define EFI_IA32_X64_PROCESSOR_ERROR_CPU_ID_INFO_VALID BIT1 424 ///@} 425 426 /// 427 /// IA32/X64 Processor Error Record 428 /// 429 typedef struct { 430 UINT64 ValidFields; 431 UINT64 ApicId; 432 UINT8 CpuIdInfo[48]; 433 } EFI_IA32_X64_PROCESSOR_ERROR_RECORD; 434 435 /// 436 /// The validation bit mask indicates which fields in the Cache Check structure 437 /// are valid. 438 ///@{ 439 #define EFI_CACHE_CHECK_TRANSACTION_TYPE_VALID BIT0 440 #define EFI_CACHE_CHECK_OPERATION_VALID BIT1 441 #define EFI_CACHE_CHECK_LEVEL_VALID BIT2 442 #define EFI_CACHE_CHECK_CONTEXT_CORRUPT_VALID BIT3 443 #define EFI_CACHE_CHECK_UNCORRECTED_VALID BIT4 444 #define EFI_CACHE_CHECK_PRECISE_IP_VALID BIT5 445 #define EFI_CACHE_CHECK_RESTARTABLE_VALID BIT6 446 #define EFI_CACHE_CHECK_OVERFLOW_VALID BIT7 447 ///@} 448 449 /// 450 /// Type of cache error in the Cache Check structure 451 ///@{ 452 #define EFI_CACHE_CHECK_ERROR_TYPE_INSTRUCTION 0 453 #define EFI_CACHE_CHECK_ERROR_TYPE_DATA_ACCESS 1 454 #define EFI_CACHE_CHECK_ERROR_TYPE_GENERIC 2 455 ///@} 456 457 /// 458 /// Type of cache operation that caused the error in the Cache 459 /// Check structure 460 ///@{ 461 #define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC 0 462 #define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC_READ 1 463 #define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC_WRITE 2 464 #define EFI_CACHE_CHECK_OPERATION_TYPE_DATA_READ 3 465 #define EFI_CACHE_CHECK_OPERATION_TYPE_DATA_WRITE 4 466 #define EFI_CACHE_CHECK_OPERATION_TYPE_INSTRUCTION_FETCH 5 467 #define EFI_CACHE_CHECK_OPERATION_TYPE_PREFETCH 6 468 #define EFI_CACHE_CHECK_OPERATION_TYPE_EVICTION 7 469 #define EFI_CACHE_CHECK_OPERATION_TYPE_SNOOP 8 470 ///@} 471 472 /// 473 /// IA32/X64 Cache Check Structure 474 /// 475 typedef struct { 476 UINT64 ValidFields : 16; 477 UINT64 TransactionType : 2; 478 UINT64 Operation : 4; 479 UINT64 Level : 3; 480 UINT64 ContextCorrupt : 1; 481 UINT64 ErrorUncorrected : 1; 482 UINT64 PreciseIp : 1; 483 UINT64 RestartableIp : 1; 484 UINT64 Overflow : 1; 485 UINT64 Resv1 : 34; 486 } EFI_IA32_X64_CACHE_CHECK_INFO; 487 488 /// 489 /// The validation bit mask indicates which fields in the TLB Check structure 490 /// are valid. 491 ///@{ 492 #define EFI_TLB_CHECK_TRANSACTION_TYPE_VALID BIT0 493 #define EFI_TLB_CHECK_OPERATION_VALID BIT1 494 #define EFI_TLB_CHECK_LEVEL_VALID BIT2 495 #define EFI_TLB_CHECK_CONTEXT_CORRUPT_VALID BIT3 496 #define EFI_TLB_CHECK_UNCORRECTED_VALID BIT4 497 #define EFI_TLB_CHECK_PRECISE_IP_VALID BIT5 498 #define EFI_TLB_CHECK_RESTARTABLE_VALID BIT6 499 #define EFI_TLB_CHECK_OVERFLOW_VALID BIT7 500 ///@} 501 502 /// 503 /// Type of cache error in the TLB Check structure 504 ///@{ 505 #define EFI_TLB_CHECK_ERROR_TYPE_INSTRUCTION 0 506 #define EFI_TLB_CHECK_ERROR_TYPE_DATA_ACCESS 1 507 #define EFI_TLB_CHECK_ERROR_TYPE_GENERIC 2 508 ///@} 509 510 /// 511 /// Type of cache operation that caused the error in the TLB 512 /// Check structure 513 ///@{ 514 #define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC 0 515 #define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC_READ 1 516 #define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC_WRITE 2 517 #define EFI_TLB_CHECK_OPERATION_TYPE_DATA_READ 3 518 #define EFI_TLB_CHECK_OPERATION_TYPE_DATA_WRITE 4 519 #define EFI_TLB_CHECK_OPERATION_TYPE_INST_FETCH 5 520 #define EFI_TLB_CHECK_OPERATION_TYPE_PREFETCH 6 521 ///@} 522 523 /// 524 /// IA32/X64 TLB Check Structure 525 /// 526 typedef struct { 527 UINT64 ValidFields : 16; 528 UINT64 TransactionType : 2; 529 UINT64 Operation : 4; 530 UINT64 Level : 3; 531 UINT64 ContextCorrupt : 1; 532 UINT64 ErrorUncorrected : 1; 533 UINT64 PreciseIp : 1; 534 UINT64 RestartableIp : 1; 535 UINT64 Overflow : 1; 536 UINT64 Resv1 : 34; 537 } EFI_IA32_X64_TLB_CHECK_INFO; 538 539 /// 540 /// The validation bit mask indicates which fields in the MS Check structure 541 /// are valid. 542 ///@{ 543 #define EFI_BUS_CHECK_TRANSACTION_TYPE_VALID BIT0 544 #define EFI_BUS_CHECK_OPERATION_VALID BIT1 545 #define EFI_BUS_CHECK_LEVEL_VALID BIT2 546 #define EFI_BUS_CHECK_CONTEXT_CORRUPT_VALID BIT3 547 #define EFI_BUS_CHECK_UNCORRECTED_VALID BIT4 548 #define EFI_BUS_CHECK_PRECISE_IP_VALID BIT5 549 #define EFI_BUS_CHECK_RESTARTABLE_VALID BIT6 550 #define EFI_BUS_CHECK_OVERFLOW_VALID BIT7 551 #define EFI_BUS_CHECK_PARTICIPATION_TYPE_VALID BIT8 552 #define EFI_BUS_CHECK_TIME_OUT_VALID BIT9 553 #define EFI_BUS_CHECK_ADDRESS_SPACE_VALID BIT10 554 ///@} 555 556 /// 557 /// Type of cache error in the Bus Check structure 558 ///@{ 559 #define EFI_BUS_CHECK_ERROR_TYPE_INSTRUCTION 0 560 #define EFI_BUS_CHECK_ERROR_TYPE_DATA_ACCESS 1 561 #define EFI_BUS_CHECK_ERROR_TYPE_GENERIC 2 562 ///@} 563 564 /// 565 /// Type of cache operation that caused the error in the Bus 566 /// Check structure 567 ///@{ 568 #define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC 0 569 #define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC_READ 1 570 #define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC_WRITE 2 571 #define EFI_BUS_CHECK_OPERATION_TYPE_DATA_READ 3 572 #define EFI_BUS_CHECK_OPERATION_TYPE_DATA_WRITE 4 573 #define EFI_BUS_CHECK_OPERATION_TYPE_INST_FETCH 5 574 #define EFI_BUS_CHECK_OPERATION_TYPE_PREFETCH 6 575 ///@} 576 577 /// 578 /// Type of Participation 579 ///@{ 580 #define EFI_BUS_CHECK_PARTICIPATION_TYPE_REQUEST 0 581 #define EFI_BUS_CHECK_PARTICIPATION_TYPE_RESPONDED 1 582 #define EFI_BUS_CHECK_PARTICIPATION_TYPE_OBSERVED 2 583 #define EFI_BUS_CHECK_PARTICIPATION_TYPE_GENERIC 3 584 ///@} 585 586 /// 587 /// Type of Address Space 588 ///@{ 589 #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_MEMORY 0 590 #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_RESERVED 1 591 #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_IO 2 592 #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_OTHER 3 593 ///@} 594 595 /// 596 /// IA32/X64 Bus Check Structure 597 /// 598 typedef struct { 599 UINT64 ValidFields : 16; 600 UINT64 TransactionType : 2; 601 UINT64 Operation : 4; 602 UINT64 Level : 3; 603 UINT64 ContextCorrupt : 1; 604 UINT64 ErrorUncorrected : 1; 605 UINT64 PreciseIp : 1; 606 UINT64 RestartableIp : 1; 607 UINT64 Overflow : 1; 608 UINT64 ParticipationType : 2; 609 UINT64 TimeOut : 1; 610 UINT64 AddressSpace : 2; 611 UINT64 Resv1 : 29; 612 } EFI_IA32_X64_BUS_CHECK_INFO; 613 614 /// 615 /// The validation bit mask indicates which fields in the MS Check structure 616 /// are valid. 617 ///@{ 618 #define EFI_MS_CHECK_ERROR_TYPE_VALID BIT0 619 #define EFI_MS_CHECK_CONTEXT_CORRUPT_VALID BIT1 620 #define EFI_MS_CHECK_UNCORRECTED_VALID BIT2 621 #define EFI_MS_CHECK_PRECISE_IP_VALID BIT3 622 #define EFI_MS_CHECK_RESTARTABLE_VALID BIT4 623 #define EFI_MS_CHECK_OVERFLOW_VALID BIT5 624 ///@} 625 626 /// 627 /// Error type identifies the operation that caused the error. 628 ///@{ 629 #define EFI_MS_CHECK_ERROR_TYPE_NO 0 630 #define EFI_MS_CHECK_ERROR_TYPE_UNCLASSIFIED 1 631 #define EFI_MS_CHECK_ERROR_TYPE_MICROCODE_PARITY 2 632 #define EFI_MS_CHECK_ERROR_TYPE_EXTERNAL 3 633 #define EFI_MS_CHECK_ERROR_TYPE_FRC 4 634 #define EFI_MS_CHECK_ERROR_TYPE_INTERNAL_UNCLASSIFIED 5 635 ///@} 636 637 /// 638 /// IA32/X64 MS Check Field Description 639 /// 640 typedef struct { 641 UINT64 ValidFields : 16; 642 UINT64 ErrorType : 3; 643 UINT64 ContextCorrupt : 1; 644 UINT64 ErrorUncorrected : 1; 645 UINT64 PreciseIp : 1; 646 UINT64 RestartableIp : 1; 647 UINT64 Overflow : 1; 648 UINT64 Resv1 : 40; 649 } EFI_IA32_X64_MS_CHECK_INFO; 650 651 /// 652 /// IA32/X64 Check Information Item 653 /// 654 typedef union { 655 EFI_IA32_X64_CACHE_CHECK_INFO CacheCheck; 656 EFI_IA32_X64_TLB_CHECK_INFO TlbCheck; 657 EFI_IA32_X64_BUS_CHECK_INFO BusCheck; 658 EFI_IA32_X64_MS_CHECK_INFO MsCheck; 659 UINT64 Data64; 660 } EFI_IA32_X64_CHECK_INFO_ITEM; 661 662 /// 663 /// The validation bit mask indicates which fields in the IA32/X64 Processor Error 664 /// Information Structure are valid. 665 ///@{ 666 #define EFI_IA32_X64_ERROR_PROC_CHECK_INFO_VALID BIT0 667 #define EFI_IA32_X64_ERROR_PROC_TARGET_ADDR_VALID BIT1 668 #define EFI_IA32_X64_ERROR_PROC_REQUESTER_ID_VALID BIT2 669 #define EFI_IA32_X64_ERROR_PROC_RESPONDER_ID_VALID BIT3 670 #define EFI_IA32_X64_ERROR_PROC_INST_IP_VALID BIT4 671 ///@} 672 673 /// 674 /// IA32/X64 Processor Error Information Structure 675 /// 676 typedef struct { 677 EFI_GUID ErrorType; 678 UINT64 ValidFields; 679 EFI_IA32_X64_CHECK_INFO_ITEM CheckInfo; 680 UINT64 TargetId; 681 UINT64 RequestorId; 682 UINT64 ResponderId; 683 UINT64 InstructionIP; 684 } EFI_IA32_X64_PROCESS_ERROR_INFO; 685 686 /// 687 /// IA32/X64 Processor Context Information Structure 688 /// 689 typedef struct { 690 UINT16 RegisterType; 691 UINT16 ArraySize; 692 UINT32 MsrAddress; 693 UINT64 MmRegisterAddress; 694 // 695 // This field will provide the contents of the actual registers or raw data. 696 // The number of Registers or size of the raw data reported is determined 697 // by (Array Size / 8) or otherwise specified by the context structure type 698 // definition. 699 // 700 } EFI_IA32_X64_PROCESSOR_CONTEXT_INFO; 701 702 /// 703 /// Register Context Type 704 ///@{ 705 #define EFI_REG_CONTEXT_TYPE_UNCLASSIFIED 0x0000 706 #define EFI_REG_CONTEXT_TYPE_MSR 0x0001 707 #define EFI_REG_CONTEXT_TYPE_IA32 0x0002 708 #define EFI_REG_CONTEXT_TYPE_X64 0x0003 709 #define EFI_REG_CONTEXT_TYPE_FXSAVE 0x0004 710 #define EFI_REG_CONTEXT_TYPE_DR_IA32 0x0005 711 #define EFI_REG_CONTEXT_TYPE_DR_X64 0x0006 712 #define EFI_REG_CONTEXT_TYPE_MEM_MAP 0x0007 713 ///@} 714 715 /// 716 /// IA32 Register State 717 /// 718 typedef struct { 719 UINT32 Eax; 720 UINT32 Ebx; 721 UINT32 Ecx; 722 UINT32 Edx; 723 UINT32 Esi; 724 UINT32 Edi; 725 UINT32 Ebp; 726 UINT32 Esp; 727 UINT16 Cs; 728 UINT16 Ds; 729 UINT16 Ss; 730 UINT16 Es; 731 UINT16 Fs; 732 UINT16 Gs; 733 UINT32 Eflags; 734 UINT32 Eip; 735 UINT32 Cr0; 736 UINT32 Cr1; 737 UINT32 Cr2; 738 UINT32 Cr3; 739 UINT32 Cr4; 740 UINT32 Gdtr[2]; 741 UINT32 Idtr[2]; 742 UINT16 Ldtr; 743 UINT16 Tr; 744 } EFI_CONTEXT_IA32_REGISTER_STATE; 745 746 /// 747 /// X64 Register State 748 /// 749 typedef struct { 750 UINT64 Rax; 751 UINT64 Rbx; 752 UINT64 Rcx; 753 UINT64 Rdx; 754 UINT64 Rsi; 755 UINT64 Rdi; 756 UINT64 Rbp; 757 UINT64 Rsp; 758 UINT64 R8; 759 UINT64 R9; 760 UINT64 R10; 761 UINT64 R11; 762 UINT64 R12; 763 UINT64 R13; 764 UINT64 R14; 765 UINT64 R15; 766 UINT16 Cs; 767 UINT16 Ds; 768 UINT16 Ss; 769 UINT16 Es; 770 UINT16 Fs; 771 UINT16 Gs; 772 UINT32 Resv1; 773 UINT64 Rflags; 774 UINT64 Rip; 775 UINT64 Cr0; 776 UINT64 Cr1; 777 UINT64 Cr2; 778 UINT64 Cr3; 779 UINT64 Cr4; 780 UINT64 Cr8; 781 UINT64 Gdtr[2]; 782 UINT64 Idtr[2]; 783 UINT16 Ldtr; 784 UINT16 Tr; 785 } EFI_CONTEXT_X64_REGISTER_STATE; 786 787 /// 788 /// The validation bit mask indicates each of the following field is in IA32/X64 789 /// Processor Error Section. 790 /// 791 typedef struct { 792 UINT64 ApicIdValid : 1; 793 UINT64 CpuIdInforValid : 1; 794 UINT64 ErrorInfoNum : 6; 795 UINT64 ContextNum : 6; 796 UINT64 Resv1 : 50; 797 } EFI_IA32_X64_VALID_BITS; 798 799 /// 800 /// Error Status Fields 801 /// 802 typedef struct { 803 UINT64 Resv1 : 8; 804 UINT64 Type : 8; 805 UINT64 AddressSignal 806 : 1; ///< Error in Address signals or in Address portion of transaction 807 UINT64 ControlSignal 808 : 1; ///< Error in Control signals or in Control portion of transaction 809 UINT64 DataSignal 810 : 1; ///< Error in Data signals or in Data portion of transaction 811 UINT64 DetectedByResponder : 1; ///< Error detected by responder 812 UINT64 DetectedByRequester : 1; ///< Error detected by requestor 813 UINT64 FirstError : 1; ///< First Error in the sequence - option field 814 UINT64 OverflowNotLogged 815 : 1; ///< Additional errors were not logged due to lack of resources 816 UINT64 Resv2 : 41; 817 } EFI_GENERIC_ERROR_STATUS; 818 819 /// 820 /// CPER Generic Error Codes 821 /// 822 #define CPER_GENERIC_ERROR_TYPES_KEYS \ 823 ( \ 824 int[]){ 1, 16, 4, 5, 6, 7, 8, 9, 17, \ 825 18, 19, 20, 21, 22, 23, 24, 25, 26 } 826 #define CPER_GENERIC_ERROR_TYPES_VALUES \ 827 (const char *[]){ "ERR_INTERNAL", "ERR_BUS", "ERR_MEM", \ 828 "ERR_TLB", "ERR_CACHE", "ERR_FUNCTION", \ 829 "ERR_SELFTEST", "ERR_FLOW", "ERR_MAP", \ 830 "ERR_IMPROPER", "ERR_UNIMPL", "ERR_LOL", \ 831 "ERR_RESPONSE", "ERR_PARITY", "ERR_PROTOCOL", \ 832 "ERR_ERROR", "ERR_TIMEOUT", "ERR_POISONED" } 833 #define CPER_GENERIC_ERROR_TYPES_DESCRIPTIONS \ 834 (const char *[]){ \ 835 "Error detected internal to the component.", \ 836 "Error detected in the bus.", \ 837 "Storage error in memory (DRAM).", \ 838 "Storage error in TLB.", \ 839 "Storage error in cache.", \ 840 "Error in one or more functional units.", \ 841 "Component failed self test.", \ 842 "Overflow or underflow of internal queue.", \ 843 "Virtual address not found on IO-TLB or IO-PDIR.", \ 844 "Improper access error.", \ 845 "Access to a memory address which is not mapped to any component.", \ 846 "Loss of Lockstep error.", \ 847 "Response not associated with a request.", \ 848 "Bus parity error (must also set the A, C, or D bits).", \ 849 "Detection of a protocol error.", \ 850 "Detection of a PATH_ERROR.", \ 851 "Bus operation timeout.", \ 852 "A read was issued to data that has been poisoned." \ 853 } 854 855 /// 856 /// Error Type 857 /// 858 typedef enum { 859 /// 860 /// General Internal errors 861 /// 862 ErrorInternal = 1, 863 ErrorBus = 16, 864 /// 865 /// Component Internal errors 866 /// 867 ErrorMemStorage = 4, // Error in memory device 868 ErrorTlbStorage = 5, // TLB error in cache 869 ErrorCacheStorage = 6, 870 ErrorFunctionalUnit = 7, 871 ErrorSelftest = 8, 872 ErrorOverflow = 9, 873 /// 874 /// Bus internal errors 875 /// 876 ErrorVirtualMap = 17, 877 ErrorAccessInvalid = 18, // Improper access 878 ErrorUnimplAccess = 19, // Unimplemented memory access 879 ErrorLossOfLockstep = 20, 880 ErrorResponseInvalid = 21, // Response not associated with request 881 ErrorParity = 22, 882 ErrorProtocol = 23, 883 ErrorPath = 24, // Detected path error 884 ErrorTimeout = 25, // Bus timeout 885 ErrorPoisoned = 26 // Read data poisoned 886 } EFI_GENERIC_ERROR_STATUS_ERROR_TYPE; 887 888 /// 889 /// Validation bit mask indicates which fields in the memory error record are valid 890 /// in Memory Error section 891 ///@{ 892 #define EFI_PLATFORM_MEMORY_ERROR_STATUS_VALID BIT0 893 #define EFI_PLATFORM_MEMORY_PHY_ADDRESS_VALID BIT1 894 #define EFI_PLATFORM_MEMORY_PHY_ADDRESS_MASK_VALID BIT2 895 #define EFI_PLATFORM_MEMORY_NODE_VALID BIT3 896 #define EFI_PLATFORM_MEMORY_CARD_VALID BIT4 897 #define EFI_PLATFORM_MEMORY_MODULE_VALID BIT5 898 #define EFI_PLATFORM_MEMORY_BANK_VALID BIT6 899 #define EFI_PLATFORM_MEMORY_DEVICE_VALID BIT7 900 #define EFI_PLATFORM_MEMORY_ROW_VALID BIT8 901 #define EFI_PLATFORM_MEMORY_COLUMN_VALID BIT9 902 #define EFI_PLATFORM_MEMORY_BIT_POS_VALID BIT10 903 #define EFI_PLATFORM_MEMORY_REQUESTOR_ID_VALID BIT11 904 #define EFI_PLATFORM_MEMORY_RESPONDER_ID_VALID BIT12 905 #define EFI_PLATFORM_MEMORY_TARGET_ID_VALID BIT13 906 #define EFI_PLATFORM_MEMORY_ERROR_TYPE_VALID BIT14 907 #define EFI_PLATFORM_MEMORY_ERROR_RANK_NUM_VALID BIT15 908 #define EFI_PLATFORM_MEMORY_ERROR_CARD_HANDLE_VALID BIT16 909 #define EFI_PLATFORM_MEMORY_ERROR_MODULE_HANDLE_VALID BIT17 910 #define EFI_PLATFORM_MEMORY_ERROR_EXTENDED_ROW_BIT_16_17_VALID BIT18 911 #define EFI_PLATFORM_MEMORY_ERROR_BANK_GROUP_VALID BIT19 912 #define EFI_PLATFORM_MEMORY_ERROR_BANK_ADDRESS_VALID BIT20 913 #define EFI_PLATFORM_MEMORY_ERROR_CHIP_IDENTIFICATION_VALID BIT21 914 ///@} 915 916 /// 917 /// Memory Error Type identifies the type of error that occurred in Memory 918 /// Error section 919 ///@{ 920 #define EFI_PLATFORM_MEMORY_ERROR_UNKNOWN 0x00 921 #define EFI_PLATFORM_MEMORY_ERROR_NONE 0x01 922 #define EFI_PLATFORM_MEMORY_ERROR_SINGLEBIT_ECC 0x02 923 #define EFI_PLATFORM_MEMORY_ERROR_MLTIBIT_ECC 0x03 924 #define EFI_PLATFORM_MEMORY_ERROR_SINGLESYMBOLS_CHIPKILL 0x04 925 #define EFI_PLATFORM_MEMORY_ERROR_MULTISYMBOL_CHIPKILL 0x05 926 #define EFI_PLATFORM_MEMORY_ERROR_MATER_ABORT 0x06 927 #define EFI_PLATFORM_MEMORY_ERROR_TARGET_ABORT 0x07 928 #define EFI_PLATFORM_MEMORY_ERROR_PARITY 0x08 929 #define EFI_PLATFORM_MEMORY_ERROR_WDT 0x09 930 #define EFI_PLATFORM_MEMORY_ERROR_INVALID_ADDRESS 0x0A 931 #define EFI_PLATFORM_MEMORY_ERROR_MIRROR_FAILED 0x0B 932 #define EFI_PLATFORM_MEMORY_ERROR_SPARING 0x0C 933 #define EFI_PLATFORM_MEMORY_ERROR_SCRUB_CORRECTED 0x0D 934 #define EFI_PLATFORM_MEMORY_ERROR_SCRUB_UNCORRECTED 0x0E 935 #define EFI_PLATFORM_MEMORY_ERROR_MEMORY_MAP_EVENT 0x0F 936 ///@} 937 938 /// 939 /// Memory Error Section 940 /// 941 typedef struct { 942 UINT64 ValidFields; 943 EFI_GENERIC_ERROR_STATUS ErrorStatus; 944 UINT64 PhysicalAddress; // Error physical address 945 UINT64 PhysicalAddressMask; // Grnaularity 946 UINT16 Node; // Node # 947 UINT16 Card; 948 UINT16 ModuleRank; // Module or Rank# 949 UINT16 Bank; 950 UINT16 Device; 951 UINT16 Row; 952 UINT16 Column; 953 UINT16 BitPosition; 954 UINT64 RequestorId; 955 UINT64 ResponderId; 956 UINT64 TargetId; 957 UINT8 ErrorType; 958 UINT8 Extended; 959 UINT16 RankNum; 960 UINT16 CardHandle; 961 UINT16 ModuleHandle; 962 } EFI_PLATFORM_MEMORY_ERROR_DATA; 963 964 /// 965 /// Validation bit mask indicates which fields in the memory error record 2 are valid 966 /// in Memory Error section 2 967 ///@{ 968 #define EFI_PLATFORM_MEMORY2_ERROR_STATUS_VALID BIT0 969 #define EFI_PLATFORM_MEMORY2_PHY_ADDRESS_VALID BIT1 970 #define EFI_PLATFORM_MEMORY2_PHY_ADDRESS_MASK_VALID BIT2 971 #define EFI_PLATFORM_MEMORY2_NODE_VALID BIT3 972 #define EFI_PLATFORM_MEMORY2_CARD_VALID BIT4 973 #define EFI_PLATFORM_MEMORY2_MODULE_VALID BIT5 974 #define EFI_PLATFORM_MEMORY2_BANK_VALID BIT6 975 #define EFI_PLATFORM_MEMORY2_DEVICE_VALID BIT7 976 #define EFI_PLATFORM_MEMORY2_ROW_VALID BIT8 977 #define EFI_PLATFORM_MEMORY2_COLUMN_VALID BIT9 978 #define EFI_PLATFORM_MEMORY2_RANK_VALID BIT10 979 #define EFI_PLATFORM_MEMORY2_BIT_POS_VALID BIT11 980 #define EFI_PLATFORM_MEMORY2_CHIP_ID_VALID BIT12 981 #define EFI_PLATFORM_MEMORY2_MEMORY_ERROR_TYPE_VALID BIT13 982 #define EFI_PLATFORM_MEMORY2_STATUS_VALID BIT14 983 #define EFI_PLATFORM_MEMORY2_REQUESTOR_ID_VALID BIT15 984 #define EFI_PLATFORM_MEMORY2_RESPONDER_ID_VALID BIT16 985 #define EFI_PLATFORM_MEMORY2_TARGET_ID_VALID BIT17 986 #define EFI_PLATFORM_MEMORY2_CARD_HANDLE_VALID BIT18 987 #define EFI_PLATFORM_MEMORY2_MODULE_HANDLE_VALID BIT19 988 #define EFI_PLATFORM_MEMORY2_BANK_GROUP_VALID BIT20 989 #define EFI_PLATFORM_MEMORY2_BANK_ADDRESS_VALID BIT21 990 ///@} 991 992 /// 993 /// Memory Error Type identifies the type of error that occurred in Memory 994 /// Error section 2 995 ///@{ 996 #define EFI_PLATFORM_MEMORY2_ERROR_UNKNOWN 0x00 997 #define EFI_PLATFORM_MEMORY2_ERROR_NONE 0x01 998 #define EFI_PLATFORM_MEMORY2_ERROR_SINGLEBIT_ECC 0x02 999 #define EFI_PLATFORM_MEMORY2_ERROR_MLTIBIT_ECC 0x03 1000 #define EFI_PLATFORM_MEMORY2_ERROR_SINGLESYMBOL_CHIPKILL 0x04 1001 #define EFI_PLATFORM_MEMORY2_ERROR_MULTISYMBOL_CHIPKILL 0x05 1002 #define EFI_PLATFORM_MEMORY2_ERROR_MASTER_ABORT 0x06 1003 #define EFI_PLATFORM_MEMORY2_ERROR_TARGET_ABORT 0x07 1004 #define EFI_PLATFORM_MEMORY2_ERROR_PARITY 0x08 1005 #define EFI_PLATFORM_MEMORY2_ERROR_WDT 0x09 1006 #define EFI_PLATFORM_MEMORY2_ERROR_INVALID_ADDRESS 0x0A 1007 #define EFI_PLATFORM_MEMORY2_ERROR_MIRROR_BROKEN 0x0B 1008 #define EFI_PLATFORM_MEMORY2_ERROR_MEMORY_SPARING 0x0C 1009 #define EFI_PLATFORM_MEMORY2_ERROR_SCRUB_CORRECTED 0x0D 1010 #define EFI_PLATFORM_MEMORY2_ERROR_SCRUB_UNCORRECTED 0x0E 1011 #define EFI_PLATFORM_MEMORY2_ERROR_MEMORY_MAP_EVENT 0x0F 1012 ///@} 1013 1014 /// 1015 /// Memory Error Section 2 1016 /// 1017 typedef struct { 1018 UINT64 ValidFields; 1019 EFI_GENERIC_ERROR_STATUS ErrorStatus; 1020 UINT64 PhysicalAddress; // Error physical address 1021 UINT64 PhysicalAddressMask; // Grnaularity 1022 UINT16 Node; // Node # 1023 UINT16 Card; 1024 UINT16 Module; // Module or Rank# 1025 UINT16 Bank; 1026 UINT32 Device; 1027 UINT32 Row; 1028 UINT32 Column; 1029 UINT32 Rank; 1030 UINT32 BitPosition; 1031 UINT8 ChipId; 1032 UINT8 MemErrorType; 1033 UINT8 Status; 1034 UINT8 Reserved; 1035 UINT64 RequestorId; 1036 UINT64 ResponderId; 1037 UINT64 TargetId; 1038 UINT32 CardHandle; 1039 UINT32 ModuleHandle; 1040 } EFI_PLATFORM_MEMORY2_ERROR_DATA; 1041 1042 /// 1043 /// Validation bits mask indicates which of the following fields is valid 1044 /// in PCI Express Error Record. 1045 ///@{ 1046 #define EFI_PCIE_ERROR_PORT_TYPE_VALID BIT0 1047 #define EFI_PCIE_ERROR_VERSION_VALID BIT1 1048 #define EFI_PCIE_ERROR_COMMAND_STATUS_VALID BIT2 1049 #define EFI_PCIE_ERROR_DEVICE_ID_VALID BIT3 1050 #define EFI_PCIE_ERROR_SERIAL_NO_VALID BIT4 1051 #define EFI_PCIE_ERROR_BRIDGE_CRL_STS_VALID BIT5 1052 #define EFI_PCIE_ERROR_CAPABILITY_INFO_VALID BIT6 1053 #define EFI_PCIE_ERROR_AER_INFO_VALID BIT7 1054 ///@} 1055 1056 /// 1057 /// PCIe Device/Port Type as defined in the PCI Express capabilities register 1058 ///@{ 1059 #define EFI_PCIE_ERROR_PORT_PCIE_ENDPOINT 0x00000000 1060 #define EFI_PCIE_ERROR_PORT_PCI_ENDPOINT 0x00000001 1061 #define EFI_PCIE_ERROR_PORT_ROOT_PORT 0x00000004 1062 #define EFI_PCIE_ERROR_PORT_UPSWITCH_PORT 0x00000005 1063 #define EFI_PCIE_ERROR_PORT_DOWNSWITCH_PORT 0x00000006 1064 #define EFI_PCIE_ERROR_PORT_PCIE_TO_PCI_BRIDGE 0x00000007 1065 #define EFI_PCIE_ERROR_PORT_PCI_TO_PCIE_BRIDGE 0x00000008 1066 #define EFI_PCIE_ERROR_PORT_ROOT_INT_ENDPOINT 0x00000009 1067 #define EFI_PCIE_ERROR_PORT_ROOT_EVENT_COLLECTOR 0x0000000A 1068 ///@} 1069 1070 /// 1071 /// PCI Slot number 1072 /// 1073 typedef struct { 1074 UINT16 Resv1 : 3; 1075 UINT16 Number : 13; 1076 } EFI_GENERIC_ERROR_PCI_SLOT; 1077 1078 /// 1079 /// PCIe Root Port PCI/bridge PCI compatible device number and 1080 /// bus number information to uniquely identify the root port or 1081 /// bridge. Default values for both the bus numbers is zero. 1082 /// 1083 typedef struct { 1084 UINT16 VendorId; 1085 UINT16 DeviceId; 1086 UINT8 ClassCode[3]; 1087 UINT8 Function; 1088 UINT8 Device; 1089 UINT16 Segment; 1090 UINT8 PrimaryOrDeviceBus; 1091 UINT8 SecondaryBus; 1092 EFI_GENERIC_ERROR_PCI_SLOT Slot; 1093 UINT8 Resv1; 1094 } EFI_GENERIC_ERROR_PCIE_DEV_BRIDGE_ID; 1095 1096 /// 1097 /// PCIe Capability Structure 1098 /// 1099 typedef struct { 1100 UINT8 PcieCap[60]; 1101 } EFI_PCIE_ERROR_DATA_CAPABILITY; 1102 1103 /// 1104 /// PCIe Advanced Error Reporting Extended Capability Structure. 1105 /// 1106 typedef struct { 1107 UINT8 PcieAer[96]; 1108 } EFI_PCIE_ERROR_DATA_AER; 1109 1110 /// 1111 /// PCI Express Error Record 1112 /// 1113 typedef struct { 1114 UINT64 ValidFields; 1115 UINT32 PortType; 1116 UINT32 Version; 1117 UINT32 CommandStatus; 1118 UINT32 Resv2; 1119 EFI_GENERIC_ERROR_PCIE_DEV_BRIDGE_ID DevBridge; 1120 UINT64 SerialNo; 1121 UINT32 BridgeControlStatus; 1122 EFI_PCIE_ERROR_DATA_CAPABILITY Capability; 1123 EFI_PCIE_ERROR_DATA_AER AerInfo; 1124 } EFI_PCIE_ERROR_DATA; 1125 1126 /// 1127 /// Validation bits Indicates which of the following fields is valid 1128 /// in PCI/PCI-X Bus Error Section. 1129 ///@{ 1130 #define EFI_PCI_PCIX_BUS_ERROR_STATUS_VALID BIT0 1131 #define EFI_PCI_PCIX_BUS_ERROR_TYPE_VALID BIT1 1132 #define EFI_PCI_PCIX_BUS_ERROR_BUS_ID_VALID BIT2 1133 #define EFI_PCI_PCIX_BUS_ERROR_BUS_ADDRESS_VALID BIT3 1134 #define EFI_PCI_PCIX_BUS_ERROR_BUS_DATA_VALID BIT4 1135 #define EFI_PCI_PCIX_BUS_ERROR_COMMAND_VALID BIT5 1136 #define EFI_PCI_PCIX_BUS_ERROR_REQUESTOR_ID_VALID BIT6 1137 #define EFI_PCI_PCIX_BUS_ERROR_COMPLETER_ID_VALID BIT7 1138 #define EFI_PCI_PCIX_BUS_ERROR_TARGET_ID_VALID BIT8 1139 ///@} 1140 1141 /// 1142 /// PCI Bus Error Type in PCI/PCI-X Bus Error Section 1143 ///@{ 1144 #define EFI_PCI_PCIX_BUS_ERROR_UNKNOWN 0x0000 1145 #define EFI_PCI_PCIX_BUS_ERROR_DATA_PARITY 0x0001 1146 #define EFI_PCI_PCIX_BUS_ERROR_SYSTEM 0x0002 1147 #define EFI_PCI_PCIX_BUS_ERROR_MASTER_ABORT 0x0003 1148 #define EFI_PCI_PCIX_BUS_ERROR_BUS_TIMEOUT 0x0004 1149 #define EFI_PCI_PCIX_BUS_ERROR_MASTER_DATA_PARITY 0x0005 1150 #define EFI_PCI_PCIX_BUS_ERROR_ADDRESS_PARITY 0x0006 1151 #define EFI_PCI_PCIX_BUS_ERROR_COMMAND_PARITY 0x0007 1152 ///@} 1153 1154 /// 1155 /// PCI/PCI-X Bus Error Section 1156 /// 1157 typedef struct { 1158 UINT64 ValidFields; 1159 EFI_GENERIC_ERROR_STATUS ErrorStatus; 1160 UINT16 Type; 1161 UINT16 BusId; 1162 UINT32 Resv2; 1163 UINT64 BusAddress; 1164 UINT64 BusData; 1165 UINT64 BusCommand; 1166 UINT64 RequestorId; 1167 UINT64 ResponderId; 1168 UINT64 TargetId; 1169 } EFI_PCI_PCIX_BUS_ERROR_DATA; 1170 1171 /// 1172 /// Validation bits Indicates which of the following fields is valid 1173 /// in PCI/PCI-X Component Error Section. 1174 ///@{ 1175 #define EFI_PCI_PCIX_DEVICE_ERROR_STATUS_VALID BIT0 1176 #define EFI_PCI_PCIX_DEVICE_ERROR_ID_INFO_VALID BIT1 1177 #define EFI_PCI_PCIX_DEVICE_ERROR_MEM_NUM_VALID BIT2 1178 #define EFI_PCI_PCIX_DEVICE_ERROR_IO_NUM_VALID BIT3 1179 #define EFI_PCI_PCIX_DEVICE_ERROR_REG_DATA_PAIR_VALID BIT4 1180 ///@} 1181 1182 /// 1183 /// PCI/PCI-X Device Identification Information 1184 /// 1185 typedef struct { 1186 UINT16 VendorId; 1187 UINT16 DeviceId; 1188 UINT8 ClassCode[3]; 1189 UINT8 Function; 1190 UINT8 Device; 1191 UINT8 Bus; 1192 UINT8 Segment; 1193 UINT8 Resv1; 1194 UINT32 Resv2; 1195 } EFI_GENERIC_ERROR_PCI_DEVICE_ID; 1196 1197 /// 1198 /// Identifies the type of firmware error record 1199 ///@{ 1200 #define EFI_FIRMWARE_ERROR_TYPE_IPF_SAL 0x00 1201 #define EFI_FIRMWARE_ERROR_TYPE_SOC_TYPE1 0x01 1202 #define EFI_FIRMWARE_ERROR_TYPE_SOC_TYPE2 0x02 1203 ///@} 1204 1205 /// 1206 /// Firmware Error Record Section 1207 /// 1208 typedef struct { 1209 UINT8 ErrorType; 1210 UINT8 Revision; 1211 UINT8 Resv1[6]; 1212 UINT64 RecordId; 1213 EFI_GUID RecordIdGuid; 1214 } EFI_FIRMWARE_ERROR_DATA; 1215 1216 /// 1217 /// Fault Reason in DMAr Generic Error Section 1218 ///@{ 1219 #define EFI_DMA_FAULT_REASON_TABLE_ENTRY_NOT_PRESENT 0x01 1220 #define EFI_DMA_FAULT_REASON_TABLE_ENTRY_INVALID 0x02 1221 #define EFI_DMA_FAULT_REASON_ACCESS_MAPPING_TABLE_ERROR 0x03 1222 #define EFI_DMA_FAULT_REASON_RESV_BIT_ERROR_IN_MAPPING_TABLE 0x04 1223 #define EFI_DMA_FAULT_REASON_ACCESS_ADDR_OUT_OF_SPACE 0x05 1224 #define EFI_DMA_FAULT_REASON_INVALID_ACCESS 0x06 1225 #define EFI_DMA_FAULT_REASON_INVALID_REQUEST 0x07 1226 #define EFI_DMA_FAULT_REASON_ACCESS_TRANSLATE_TABLE_ERROR 0x08 1227 #define EFI_DMA_FAULT_REASON_RESV_BIT_ERROR_IN_TRANSLATE_TABLE 0x09 1228 #define EFI_DMA_FAULT_REASON_INVALID_COMMAOND 0x0A 1229 #define EFI_DMA_FAULT_REASON_ACCESS_COMMAND_BUFFER_ERROR 0x0B 1230 ///@} 1231 1232 /// 1233 /// DMA access type in DMAr Generic Error Section 1234 ///@{ 1235 #define EFI_DMA_ACCESS_TYPE_READ 0x00 1236 #define EFI_DMA_ACCESS_TYPE_WRITE 0x01 1237 ///@} 1238 1239 /// 1240 /// DMA address type in DMAr Generic Error Section 1241 ///@{ 1242 #define EFI_DMA_ADDRESS_UNTRANSLATED 0x00 1243 #define EFI_DMA_ADDRESS_TRANSLATION 0x01 1244 ///@} 1245 1246 /// 1247 /// Architecture type in DMAr Generic Error Section 1248 ///@{ 1249 #define EFI_DMA_ARCH_TYPE_VT 0x01 1250 #define EFI_DMA_ARCH_TYPE_IOMMU 0x02 1251 ///@} 1252 1253 /// 1254 /// DMAr Generic Error Section 1255 /// 1256 typedef struct { 1257 UINT16 RequesterId; 1258 UINT16 SegmentNumber; 1259 UINT8 FaultReason; 1260 UINT8 AccessType; 1261 UINT8 AddressType; 1262 UINT8 ArchType; 1263 UINT64 DeviceAddr; 1264 UINT8 Resv1[16]; 1265 } EFI_DMAR_GENERIC_ERROR_DATA; 1266 1267 /// 1268 /// Intel VT for Directed I/O specific DMAr Errors 1269 /// 1270 typedef struct { 1271 UINT8 Version; 1272 UINT8 Revision; 1273 UINT8 OemId[6]; 1274 UINT64 Capability; 1275 UINT64 CapabilityEx; 1276 UINT32 GlobalCommand; 1277 UINT32 GlobalStatus; 1278 UINT32 FaultStatus; 1279 UINT8 Resv1[12]; 1280 UINT64 FaultRecord[2]; 1281 UINT64 RootEntry[2]; 1282 UINT64 ContextEntry[2]; 1283 UINT64 PteL6; 1284 UINT64 PteL5; 1285 UINT64 PteL4; 1286 UINT64 PteL3; 1287 UINT64 PteL2; 1288 UINT64 PteL1; 1289 } EFI_DIRECTED_IO_DMAR_ERROR_DATA; 1290 1291 /// 1292 /// IOMMU specific DMAr Errors 1293 /// 1294 typedef struct { 1295 UINT8 Revision; 1296 UINT8 Resv1[7]; 1297 UINT64 Control; 1298 UINT64 Status; 1299 UINT8 Resv2[8]; 1300 UINT64 EventLogEntry[2]; 1301 UINT8 Resv3[16]; 1302 UINT64 DeviceTableEntry[4]; 1303 UINT64 PteL6; 1304 UINT64 PteL5; 1305 UINT64 PteL4; 1306 UINT64 PteL3; 1307 UINT64 PteL2; 1308 UINT64 PteL1; 1309 } EFI_IOMMU_DMAR_ERROR_DATA; 1310 1311 extern EFI_GUID gEfiEventNotificationTypeCmcGuid; 1312 extern EFI_GUID gEfiEventNotificationTypeCpeGuid; 1313 extern EFI_GUID gEfiEventNotificationTypeMceGuid; 1314 extern EFI_GUID gEfiEventNotificationTypePcieGuid; 1315 extern EFI_GUID gEfiEventNotificationTypeInitGuid; 1316 extern EFI_GUID gEfiEventNotificationTypeNmiGuid; 1317 extern EFI_GUID gEfiEventNotificationTypeBootGuid; 1318 extern EFI_GUID gEfiEventNotificationTypeDmarGuid; 1319 extern EFI_GUID gEfiEventNotificationTypeSeaGuid; 1320 extern EFI_GUID gEfiEventNotificationTypeSeiGuid; 1321 extern EFI_GUID gEfiEventNotificationTypePeiGuid; 1322 extern EFI_GUID gEfiEventNotificationTypeCxlGuid; 1323 extern EFI_GUID gEfiProcessorGenericErrorSectionGuid; 1324 extern EFI_GUID gEfiProcessorSpecificErrorSectionGuid; 1325 extern EFI_GUID gEfiIa32X64ProcessorErrorSectionGuid; 1326 extern EFI_GUID gEfiIpfProcessorErrorSectionGuid; 1327 extern EFI_GUID gEfiArmProcessorErrorSectionGuid; 1328 extern EFI_GUID gEfiPlatformMemoryErrorSectionGuid; 1329 extern EFI_GUID gEfiPlatformMemoryError2SectionGuid; 1330 extern EFI_GUID gEfiPcieErrorSectionGuid; 1331 extern EFI_GUID gEfiFirmwareErrorSectionGuid; 1332 extern EFI_GUID gEfiPciBusErrorSectionGuid; 1333 extern EFI_GUID gEfiPciDevErrorSectionGuid; 1334 extern EFI_GUID gEfiDMArGenericErrorSectionGuid; 1335 extern EFI_GUID gEfiDirectedIoDMArErrorSectionGuid; 1336 extern EFI_GUID gEfiIommuDMArErrorSectionGuid; 1337 extern EFI_GUID gEfiCcixPerLogErrorSectionGuid; 1338 extern EFI_GUID gEfiCxlProtocolErrorSectionGuid; 1339 extern EFI_GUID gEfiCxlGeneralMediaErrorSectionGuid; 1340 extern EFI_GUID gEfiCxlDramEventErrorSectionGuid; 1341 extern EFI_GUID gEfiCxlMemoryModuleErrorSectionGuid; 1342 extern EFI_GUID gEfiCxlPhysicalSwitchErrorSectionGuid; 1343 extern EFI_GUID gEfiCxlVirtualSwitchErrorSectionGuid; 1344 extern EFI_GUID gEfiCxlMldPortErrorSectionGuid; 1345 1346 #if defined(MDE_CPU_IA32) || defined(MDE_CPU_X64) 1347 /// 1348 /// IA32 and x64 Specific definitions. 1349 /// 1350 1351 extern EFI_GUID gEfiIa32X64ErrorTypeCacheCheckGuid; 1352 extern EFI_GUID gEfiIa32X64ErrorTypeTlbCheckGuid; 1353 extern EFI_GUID gEfiIa32X64ErrorTypeBusCheckGuid; 1354 extern EFI_GUID gEfiIa32X64ErrorTypeMsCheckGuid; 1355 1356 #endif 1357 1358 /// 1359 /// NVIDIA Error Record Section 1360 /// 1361 typedef struct { 1362 UINT32 ErrorCount; 1363 UINT32 ChannelEnabled : 1; 1364 UINT32 ChannelIsSpare : 1; 1365 UINT32 ChannelPermanentlyDisabled : 1; 1366 UINT32 DisabledReason : 2; 1367 UINT32 Reserved : 27; 1368 } EFI_NVIDIA_CMET_CHANNEL_INFO; 1369 1370 typedef struct { 1371 CHAR8 initiating_firmware[8]; 1372 UINT64 task_checkpoint; 1373 UINT64 mb1_error_code; 1374 CHAR8 mb1_version_string[8]; 1375 UINT64 bad_pages_retired_mask; 1376 UINT64 training_or_alias_check_retired_mask; 1377 UINT32 worst_bad_pages_channel_number; 1378 UINT32 worst_bad_pages_bad_page_count; 1379 UINT32 second_worst_bad_pages_channel_number; 1380 UINT32 second_worst_bad_pages_bad_page_count; 1381 UINT32 third_worst_bad_pages_channel_number; 1382 UINT32 third_worst_bad_pages_bad_page_count; 1383 UINT64 mss_aon_cfg_scratch_register_0; 1384 UINT64 scratch_dram_disable; 1385 } EFI_NVIDIA_FWERROR; 1386 1387 typedef struct { 1388 UINT64 Address; 1389 union { 1390 UINT64 Value; 1391 EFI_NVIDIA_CMET_CHANNEL_INFO CmetInfo; 1392 }; 1393 } EFI_NVIDIA_REGISTER_DATA; 1394 1395 typedef struct { 1396 CHAR8 Signature[16]; 1397 UINT16 ErrorType; 1398 UINT16 ErrorInstance; 1399 UINT8 Severity; 1400 UINT8 Socket; 1401 UINT8 NumberRegs; 1402 UINT8 Reserved; 1403 UINT64 InstanceBase; 1404 // Keep this at the end of this struct 1405 // and allocate based on NumberRegs 1406 #ifndef __cplusplus 1407 EFI_NVIDIA_REGISTER_DATA Register[] LIBCPER_CC_COUNTED_BY(NumberRegs); 1408 #endif 1409 } EFI_NVIDIA_ERROR_DATA; 1410 1411 extern EFI_GUID gEfiNvidiaErrorSectionGuid; 1412 1413 /// 1414 /// Ampere Error Record Section 1415 /// 1416 typedef struct { 1417 UINT16 TypeId; 1418 UINT16 SubtypeId; 1419 UINT32 InstanceId; 1420 } __attribute__((packed)) EFI_AMPERE_ERROR_DATA; 1421 1422 extern EFI_GUID gEfiAmpereErrorSectionGuid; 1423 1424 /// 1425 /// Arm Error Record Section 1426 /// 1427 typedef struct { 1428 UINT32 ValidFields; 1429 UINT16 ErrInfoNum; 1430 UINT16 ContextInfoNum; 1431 UINT32 SectionLength; 1432 UINT32 ErrorAffinityLevel; 1433 UINT64 MPIDR_EL1; 1434 UINT64 MIDR_EL1; 1435 UINT32 RunningState; 1436 UINT32 PsciState; 1437 } __attribute__((packed, aligned(1))) EFI_ARM_ERROR_RECORD; 1438 1439 /// 1440 /// ARM Processor Error Information Structure 1441 /// 1442 #define ARM_ERROR_INFORMATION_TYPE_CACHE 1 1443 #define ARM_ERROR_INFORMATION_TYPE_TLB 2 1444 #define ARM_ERROR_INFORMATION_TYPE_BUS 4 1445 #define ARM_ERROR_INFORMATION_TYPE_MICROARCH 8 1446 1447 typedef struct { 1448 UINT64 ValidationBits : 16; 1449 UINT64 TransactionType : 2; 1450 UINT64 Operation : 4; 1451 UINT64 Level : 3; 1452 UINT64 ProcessorContextCorrupt : 1; 1453 UINT64 Corrected : 1; 1454 UINT64 PrecisePC : 1; 1455 UINT64 RestartablePC : 1; 1456 UINT64 Reserved : 34; 1457 } EFI_ARM_CACHE_ERROR_STRUCTURE; 1458 1459 typedef struct { 1460 UINT64 ValidationBits : 16; 1461 UINT64 TransactionType : 2; 1462 UINT64 Operation : 4; 1463 UINT64 Level : 3; 1464 UINT64 ProcessorContextCorrupt : 1; 1465 UINT64 Corrected : 1; 1466 UINT64 PrecisePC : 1; 1467 UINT64 RestartablePC : 1; 1468 UINT64 Reserved : 34; 1469 } EFI_ARM_TLB_ERROR_STRUCTURE; 1470 1471 typedef struct { 1472 UINT64 ValidationBits : 16; 1473 UINT64 TransactionType : 2; 1474 UINT64 Operation : 4; 1475 UINT64 Level : 3; 1476 UINT64 ProcessorContextCorrupt : 1; 1477 UINT64 Corrected : 1; 1478 UINT64 PrecisePC : 1; 1479 UINT64 RestartablePC : 1; 1480 UINT64 ParticipationType : 2; 1481 UINT64 TimeOut : 1; 1482 UINT64 AddressSpace : 2; 1483 UINT64 MemoryAddressAttributes : 9; 1484 UINT64 AccessMode : 1; 1485 UINT64 Reserved : 20; 1486 } EFI_ARM_BUS_ERROR_STRUCTURE; 1487 1488 typedef union { 1489 UINT64 Value; 1490 EFI_ARM_CACHE_ERROR_STRUCTURE CacheError; 1491 EFI_ARM_TLB_ERROR_STRUCTURE TlbError; 1492 EFI_ARM_BUS_ERROR_STRUCTURE BusError; 1493 } EFI_ARM_ERROR_INFORMATION_STRUCTURE; 1494 1495 typedef struct { 1496 UINT8 Version; 1497 UINT8 Length; 1498 UINT16 ValidationBits; 1499 UINT8 Type; 1500 UINT16 MultipleError; 1501 UINT8 Flags; 1502 EFI_ARM_ERROR_INFORMATION_STRUCTURE ErrorInformation; 1503 UINT64 VirtualFaultAddress; 1504 UINT64 PhysicalFaultAddress; 1505 } __attribute__((packed, aligned(1))) EFI_ARM_ERROR_INFORMATION_ENTRY; 1506 1507 /// 1508 /// ARM Processor Context Information Structure 1509 /// 1510 typedef struct { 1511 UINT16 Version; 1512 UINT16 RegisterContextType; 1513 UINT32 RegisterArraySize; 1514 } __attribute__((packed, aligned(1))) EFI_ARM_CONTEXT_INFORMATION_HEADER; 1515 1516 /// 1517 /// ARM Processor Context Register Types 1518 /// 1519 #define EFI_ARM_CONTEXT_TYPE_AARCH32_GPR 0 1520 #define EFI_ARM_CONTEXT_TYPE_AARCH32_EL1 1 1521 #define EFI_ARM_CONTEXT_TYPE_AARCH32_EL2 2 1522 #define EFI_ARM_CONTEXT_TYPE_AARCH32_SECURE 3 1523 #define EFI_ARM_CONTEXT_TYPE_AARCH64_GPR 4 1524 #define EFI_ARM_CONTEXT_TYPE_AARCH64_EL1 5 1525 #define EFI_ARM_CONTEXT_TYPE_AARCH64_EL2 6 1526 #define EFI_ARM_CONTEXT_TYPE_AARCH64_EL3 7 1527 #define EFI_ARM_CONTEXT_TYPE_MISC 8 1528 1529 typedef struct { 1530 UINT32 R0; 1531 UINT32 R1; 1532 UINT32 R2; 1533 UINT32 R3; 1534 UINT32 R4; 1535 UINT32 R5; 1536 UINT32 R6; 1537 UINT32 R7; 1538 UINT32 R8; 1539 UINT32 R9; 1540 UINT32 R10; 1541 UINT32 R11; 1542 UINT32 R12; 1543 UINT32 R13_sp; 1544 UINT32 R14_lr; 1545 UINT32 R15_pc; 1546 } EFI_ARM_V8_AARCH32_GPR; 1547 1548 typedef struct { 1549 UINT32 Dfar; 1550 UINT32 Dfsr; 1551 UINT32 Ifar; 1552 UINT32 Isr; 1553 UINT32 Mair0; 1554 UINT32 Mair1; 1555 UINT32 Midr; 1556 UINT32 Mpidr; 1557 UINT32 Nmrr; 1558 UINT32 Prrr; 1559 UINT32 Sctlr_Ns; 1560 UINT32 Spsr; 1561 UINT32 Spsr_Abt; 1562 UINT32 Spsr_Fiq; 1563 UINT32 Spsr_Irq; 1564 UINT32 Spsr_Svc; 1565 UINT32 Spsr_Und; 1566 UINT32 Tpidrprw; 1567 UINT32 Tpidruro; 1568 UINT32 Tpidrurw; 1569 UINT32 Ttbcr; 1570 UINT32 Ttbr0; 1571 UINT32 Ttbr1; 1572 UINT32 Dacr; 1573 } EFI_ARM_AARCH32_EL1_CONTEXT_REGISTERS; 1574 1575 typedef struct { 1576 UINT32 Elr_Hyp; 1577 UINT32 Hamair0; 1578 UINT32 Hamair1; 1579 UINT32 Hcr; 1580 UINT32 Hcr2; 1581 UINT32 Hdfar; 1582 UINT32 Hifar; 1583 UINT32 Hpfar; 1584 UINT32 Hsr; 1585 UINT32 Htcr; 1586 UINT32 Htpidr; 1587 UINT32 Httbr; 1588 UINT32 Spsr_Hyp; 1589 UINT32 Vtcr; 1590 UINT32 Vttbr; 1591 UINT32 Dacr32_El2; 1592 } EFI_ARM_AARCH32_EL2_CONTEXT_REGISTERS; 1593 1594 typedef struct { 1595 UINT32 Sctlr_S; 1596 UINT32 Spsr_Mon; 1597 } EFI_ARM_AARCH32_SECURE_CONTEXT_REGISTERS; 1598 1599 typedef struct { 1600 UINT64 X0; 1601 UINT64 X1; 1602 UINT64 X2; 1603 UINT64 X3; 1604 UINT64 X4; 1605 UINT64 X5; 1606 UINT64 X6; 1607 UINT64 X7; 1608 UINT64 X8; 1609 UINT64 X9; 1610 UINT64 X10; 1611 UINT64 X11; 1612 UINT64 X12; 1613 UINT64 X13; 1614 UINT64 X14; 1615 UINT64 X15; 1616 UINT64 X16; 1617 UINT64 X17; 1618 UINT64 X18; 1619 UINT64 X19; 1620 UINT64 X20; 1621 UINT64 X21; 1622 UINT64 X22; 1623 UINT64 X23; 1624 UINT64 X24; 1625 UINT64 X25; 1626 UINT64 X26; 1627 UINT64 X27; 1628 UINT64 X28; 1629 UINT64 X29; 1630 UINT64 X30; 1631 UINT64 Sp; 1632 } EFI_ARM_V8_AARCH64_GPR; 1633 1634 typedef struct { 1635 UINT64 Elr_El1; 1636 UINT64 Esr_El1; 1637 UINT64 Far_El1; 1638 UINT64 Isr_El1; 1639 UINT64 Mair_El1; 1640 UINT64 Midr_El1; 1641 UINT64 Mpidr_El1; 1642 UINT64 Sctlr_El1; 1643 UINT64 Sp_El0; 1644 UINT64 Sp_El1; 1645 UINT64 Spsr_El1; 1646 UINT64 Tcr_El1; 1647 UINT64 Tpidr_El0; 1648 UINT64 Tpidr_El1; 1649 UINT64 Tpidrro_El0; 1650 UINT64 Ttbr0_El1; 1651 UINT64 Ttbr1_El1; 1652 } EFI_ARM_AARCH64_EL1_CONTEXT_REGISTERS; 1653 1654 typedef struct { 1655 UINT64 Elr_El2; 1656 UINT64 Esr_El2; 1657 UINT64 Far_El2; 1658 UINT64 Hacr_El2; 1659 UINT64 Hcr_El2; 1660 UINT64 Hpfar_El2; 1661 UINT64 Mair_El2; 1662 UINT64 Sctlr_El2; 1663 UINT64 Sp_El2; 1664 UINT64 Spsr_El2; 1665 UINT64 Tcr_El2; 1666 UINT64 Tpidr_El2; 1667 UINT64 Ttbr0_El2; 1668 UINT64 Vtcr_El2; 1669 UINT64 Vttbr_El2; 1670 } EFI_ARM_AARCH64_EL2_CONTEXT_REGISTERS; 1671 1672 typedef struct { 1673 UINT64 Elr_El3; 1674 UINT64 Esr_El3; 1675 UINT64 Far_El3; 1676 UINT64 Mair_El3; 1677 UINT64 Sctlr_El3; 1678 UINT64 Sp_El3; 1679 UINT64 Spsr_El3; 1680 UINT64 Tcr_El3; 1681 UINT64 Tpidr_El3; 1682 UINT64 Ttbr0_El3; 1683 } EFI_ARM_AARCH64_EL3_CONTEXT_REGISTERS; 1684 1685 typedef struct { 1686 UINT64 MrsOp2 : 3; 1687 UINT64 MrsCrm : 4; 1688 UINT64 MrsCrn : 4; 1689 UINT64 MrsOp1 : 3; 1690 UINT64 MrsO0 : 2; 1691 UINT64 Value : 64; 1692 } EFI_ARM_MISC_CONTEXT_REGISTER; 1693 #pragma pack(pop) 1694 1695 #ifdef __cplusplus 1696 } 1697 #endif 1698 1699 #endif 1700