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Searched defs:DSCC5_DSCC_PPS_CONFIG1__VBR_ENABLE_MASK (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h47153 #define DSCC5_DSCC_PPS_CONFIG1__VBR_ENABLE_MASK … macro
H A Ddcn_2_0_0_sh_mask.h53720 #define DSCC5_DSCC_PPS_CONFIG1__VBR_ENABLE_MASK … macro
H A Ddcn_3_0_0_sh_mask.h53001 #define DSCC5_DSCC_PPS_CONFIG1__VBR_ENABLE_MASK … macro