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Searched defs:DSCC5_DSCC_CONFIG0__ICH_RESET_AT_END_OF_LINE__SHIFT (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h47067 #define DSCC5_DSCC_CONFIG0__ICH_RESET_AT_END_OF_LINE__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h53634 #define DSCC5_DSCC_CONFIG0__ICH_RESET_AT_END_OF_LINE__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h52915 #define DSCC5_DSCC_CONFIG0__ICH_RESET_AT_END_OF_LINE__SHIFT … macro