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Searched defs:DPG5_DPG_CONTROL__DPG_VRES_MASK (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h26728 #define DPG5_DPG_CONTROL__DPG_VRES_MASK … macro
H A Ddcn_2_0_0_sh_mask.h30077 #define DPG5_DPG_CONTROL__DPG_VRES_MASK … macro
H A Ddcn_3_0_0_sh_mask.h29164 #define DPG5_DPG_CONTROL__DPG_VRES_MASK … macro