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Searched defs:DMU_MEM_PWR_CNTL__DMCU_ERAM_MEM_PWR_STATE_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1296 #define DMU_MEM_PWR_CNTL__DMCU_ERAM_MEM_PWR_STATE_MASK macro
H A Ddcn_2_1_0_sh_mask.h2094 #define DMU_MEM_PWR_CNTL__DMCU_ERAM_MEM_PWR_STATE_MASK macro
H A Ddcn_1_0_sh_mask.h3593 #define DMU_MEM_PWR_CNTL__DMCU_ERAM_MEM_PWR_STATE_MASK macro
H A Ddcn_3_0_1_sh_mask.h2251 #define DMU_MEM_PWR_CNTL__DMCU_ERAM_MEM_PWR_STATE_MASK macro
H A Ddcn_3_1_2_sh_mask.h5573 #define DMU_MEM_PWR_CNTL__DMCU_ERAM_MEM_PWR_STATE_MASK macro
H A Ddcn_3_1_5_sh_mask.h3526 #define DMU_MEM_PWR_CNTL__DMCU_ERAM_MEM_PWR_STATE_MASK macro
H A Ddcn_3_1_6_sh_mask.h6170 #define DMU_MEM_PWR_CNTL__DMCU_ERAM_MEM_PWR_STATE_MASK macro
H A Ddcn_3_1_4_sh_mask.h10332 #define DMU_MEM_PWR_CNTL__DMCU_ERAM_MEM_PWR_STATE_MASK macro
H A Ddcn_3_0_2_sh_mask.h2165 #define DMU_MEM_PWR_CNTL__DMCU_ERAM_MEM_PWR_STATE_MASK macro
H A Ddcn_2_0_0_sh_mask.h2362 #define DMU_MEM_PWR_CNTL__DMCU_ERAM_MEM_PWR_STATE_MASK macro
H A Ddcn_3_0_0_sh_mask.h2232 #define DMU_MEM_PWR_CNTL__DMCU_ERAM_MEM_PWR_STATE_MASK macro