Searched defs:DDR2 (Results 1 – 8 of 8) sorted by relevance
/openbmc/qemu/include/hw/i2c/ |
H A D | smbus_eeprom.h | 33 enum sdram_type { SDR = 0x4, DDR = 0x7, DDR2 = 0x8 }; enumerator
|
/openbmc/bmcweb/redfish-core/include/generated/enums/ |
H A D | processor.hpp | 72 DDR2, global() enumerator
|
H A D | memory.hpp | 23 DDR2, enumerator
|
/openbmc/u-boot/cmd/ |
H A D | i2c.c | 1151 enum { unknown, EDO, SDRAM, DDR, DDR2, DDR3, DDR4 } type; in do_sdram() enumerator
|
/openbmc/bmcweb/redfish-core/schema/dmtf/json-schema/ |
H A D | Processor.v1_20_1.json |
|
H A D | Memory.v1_21_0.json |
|
/openbmc/bmcweb/redfish-core/schema/dmtf/json-schema-installed/ |
H A D | Processor.v1_20_1.json |
|
H A D | Memory.v1_21_0.json |
|