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Searched defs:DCIO_HSYNCA_OUTPUT_SEL_PPLL2 (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_enum.h124 DCIO_HSYNCA_OUTPUT_SEL_PPLL2 = 0x2, enumerator
H A Ddce_11_0_enum.h893 DCIO_HSYNCA_OUTPUT_SEL_PPLL2 = 0x2, enumerator
H A Ddce_11_2_enum.h1292 DCIO_HSYNCA_OUTPUT_SEL_PPLL2 = 0x2, enumerator
/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dvega10_enum.h11646 DCIO_HSYNCA_OUTPUT_SEL_PPLL2 = 0x00000002, enumerator
H A Dnavi10_enum.h8113 DCIO_HSYNCA_OUTPUT_SEL_PPLL2 = 0x00000002, enumerator
H A Dsoc21_enum.h9815 DCIO_HSYNCA_OUTPUT_SEL_PPLL2 = 0x00000002, enumerator