1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/kernel.h>
3 #include <linux/types.h>
4 
5 #include <linux/pinctrl/pinctrl.h>
6 
7 #include "pinctrl-nomadik.h"
8 
9 /* All the pins that can be used for GPIO and some other functions */
10 #define _GPIO(offset)		(offset)
11 
12 #define DB8500_PIN_AJ5		_GPIO(0)
13 #define DB8500_PIN_AJ3		_GPIO(1)
14 #define DB8500_PIN_AH4		_GPIO(2)
15 #define DB8500_PIN_AH3		_GPIO(3)
16 #define DB8500_PIN_AH6		_GPIO(4)
17 #define DB8500_PIN_AG6		_GPIO(5)
18 #define DB8500_PIN_AF6		_GPIO(6)
19 #define DB8500_PIN_AG5		_GPIO(7)
20 #define DB8500_PIN_AD5		_GPIO(8)
21 #define DB8500_PIN_AE4		_GPIO(9)
22 #define DB8500_PIN_AF5		_GPIO(10)
23 #define DB8500_PIN_AG4		_GPIO(11)
24 #define DB8500_PIN_AC4		_GPIO(12)
25 #define DB8500_PIN_AF3		_GPIO(13)
26 #define DB8500_PIN_AE3		_GPIO(14)
27 #define DB8500_PIN_AC3		_GPIO(15)
28 #define DB8500_PIN_AD3		_GPIO(16)
29 #define DB8500_PIN_AD4		_GPIO(17)
30 #define DB8500_PIN_AC2		_GPIO(18)
31 #define DB8500_PIN_AC1		_GPIO(19)
32 #define DB8500_PIN_AB4		_GPIO(20)
33 #define DB8500_PIN_AB3		_GPIO(21)
34 #define DB8500_PIN_AA3		_GPIO(22)
35 #define DB8500_PIN_AA4		_GPIO(23)
36 #define DB8500_PIN_AB2		_GPIO(24)
37 #define DB8500_PIN_Y4		_GPIO(25)
38 #define DB8500_PIN_Y2		_GPIO(26)
39 #define DB8500_PIN_AA2		_GPIO(27)
40 #define DB8500_PIN_AA1		_GPIO(28)
41 #define DB8500_PIN_W2		_GPIO(29)
42 #define DB8500_PIN_W3		_GPIO(30)
43 #define DB8500_PIN_V3		_GPIO(31)
44 #define DB8500_PIN_V2		_GPIO(32)
45 #define DB8500_PIN_AF2		_GPIO(33)
46 #define DB8500_PIN_AE1		_GPIO(34)
47 #define DB8500_PIN_AE2		_GPIO(35)
48 #define DB8500_PIN_AG2		_GPIO(36)
49 /* Hole */
50 #define DB8500_PIN_F3		_GPIO(64)
51 #define DB8500_PIN_F1		_GPIO(65)
52 #define DB8500_PIN_G3		_GPIO(66)
53 #define DB8500_PIN_G2		_GPIO(67)
54 #define DB8500_PIN_E1		_GPIO(68)
55 #define DB8500_PIN_E2		_GPIO(69)
56 #define DB8500_PIN_G5		_GPIO(70)
57 #define DB8500_PIN_G4		_GPIO(71)
58 #define DB8500_PIN_H4		_GPIO(72)
59 #define DB8500_PIN_H3		_GPIO(73)
60 #define DB8500_PIN_J3		_GPIO(74)
61 #define DB8500_PIN_H2		_GPIO(75)
62 #define DB8500_PIN_J2		_GPIO(76)
63 #define DB8500_PIN_H1		_GPIO(77)
64 #define DB8500_PIN_F4		_GPIO(78)
65 #define DB8500_PIN_E3		_GPIO(79)
66 #define DB8500_PIN_E4		_GPIO(80)
67 #define DB8500_PIN_D2		_GPIO(81)
68 #define DB8500_PIN_C1		_GPIO(82)
69 #define DB8500_PIN_D3		_GPIO(83)
70 #define DB8500_PIN_C2		_GPIO(84)
71 #define DB8500_PIN_D5		_GPIO(85)
72 #define DB8500_PIN_C6		_GPIO(86)
73 #define DB8500_PIN_B3		_GPIO(87)
74 #define DB8500_PIN_C4		_GPIO(88)
75 #define DB8500_PIN_E6		_GPIO(89)
76 #define DB8500_PIN_A3		_GPIO(90)
77 #define DB8500_PIN_B6		_GPIO(91)
78 #define DB8500_PIN_D6		_GPIO(92)
79 #define DB8500_PIN_B7		_GPIO(93)
80 #define DB8500_PIN_D7		_GPIO(94)
81 #define DB8500_PIN_E8		_GPIO(95)
82 #define DB8500_PIN_D8		_GPIO(96)
83 #define DB8500_PIN_D9		_GPIO(97)
84 /* Hole */
85 #define DB8500_PIN_A5		_GPIO(128)
86 #define DB8500_PIN_B4		_GPIO(129)
87 #define DB8500_PIN_C8		_GPIO(130)
88 #define DB8500_PIN_A12		_GPIO(131)
89 #define DB8500_PIN_C10		_GPIO(132)
90 #define DB8500_PIN_B10		_GPIO(133)
91 #define DB8500_PIN_B9		_GPIO(134)
92 #define DB8500_PIN_A9		_GPIO(135)
93 #define DB8500_PIN_C7		_GPIO(136)
94 #define DB8500_PIN_A7		_GPIO(137)
95 #define DB8500_PIN_C5		_GPIO(138)
96 #define DB8500_PIN_C9		_GPIO(139)
97 #define DB8500_PIN_B11		_GPIO(140)
98 #define DB8500_PIN_C12		_GPIO(141)
99 #define DB8500_PIN_C11		_GPIO(142)
100 #define DB8500_PIN_D12		_GPIO(143)
101 #define DB8500_PIN_B13		_GPIO(144)
102 #define DB8500_PIN_C13		_GPIO(145)
103 #define DB8500_PIN_D13		_GPIO(146)
104 #define DB8500_PIN_C15		_GPIO(147)
105 #define DB8500_PIN_B16		_GPIO(148)
106 #define DB8500_PIN_B14		_GPIO(149)
107 #define DB8500_PIN_C14		_GPIO(150)
108 #define DB8500_PIN_D17		_GPIO(151)
109 #define DB8500_PIN_D16		_GPIO(152)
110 #define DB8500_PIN_B17		_GPIO(153)
111 #define DB8500_PIN_C16		_GPIO(154)
112 #define DB8500_PIN_C19		_GPIO(155)
113 #define DB8500_PIN_C17		_GPIO(156)
114 #define DB8500_PIN_A18		_GPIO(157)
115 #define DB8500_PIN_C18		_GPIO(158)
116 #define DB8500_PIN_B19		_GPIO(159)
117 #define DB8500_PIN_B20		_GPIO(160)
118 #define DB8500_PIN_D21		_GPIO(161)
119 #define DB8500_PIN_D20		_GPIO(162)
120 #define DB8500_PIN_C20		_GPIO(163)
121 #define DB8500_PIN_B21		_GPIO(164)
122 #define DB8500_PIN_C21		_GPIO(165)
123 #define DB8500_PIN_A22		_GPIO(166)
124 #define DB8500_PIN_B24		_GPIO(167)
125 #define DB8500_PIN_C22		_GPIO(168)
126 #define DB8500_PIN_D22		_GPIO(169)
127 #define DB8500_PIN_C23		_GPIO(170)
128 #define DB8500_PIN_D23		_GPIO(171)
129 /* Hole */
130 #define DB8500_PIN_AJ27		_GPIO(192)
131 #define DB8500_PIN_AH27		_GPIO(193)
132 #define DB8500_PIN_AF27		_GPIO(194)
133 #define DB8500_PIN_AG28		_GPIO(195)
134 #define DB8500_PIN_AG26		_GPIO(196)
135 #define DB8500_PIN_AH24		_GPIO(197)
136 #define DB8500_PIN_AG25		_GPIO(198)
137 #define DB8500_PIN_AH23		_GPIO(199)
138 #define DB8500_PIN_AH26		_GPIO(200)
139 #define DB8500_PIN_AF24		_GPIO(201)
140 #define DB8500_PIN_AF25		_GPIO(202)
141 #define DB8500_PIN_AE23		_GPIO(203)
142 #define DB8500_PIN_AF23		_GPIO(204)
143 #define DB8500_PIN_AG23		_GPIO(205)
144 #define DB8500_PIN_AG24		_GPIO(206)
145 #define DB8500_PIN_AJ23		_GPIO(207)
146 #define DB8500_PIN_AH16		_GPIO(208)
147 #define DB8500_PIN_AG15		_GPIO(209)
148 #define DB8500_PIN_AJ15		_GPIO(210)
149 #define DB8500_PIN_AG14		_GPIO(211)
150 #define DB8500_PIN_AF13		_GPIO(212)
151 #define DB8500_PIN_AG13		_GPIO(213)
152 #define DB8500_PIN_AH15		_GPIO(214)
153 #define DB8500_PIN_AH13		_GPIO(215)
154 #define DB8500_PIN_AG12		_GPIO(216)
155 #define DB8500_PIN_AH12		_GPIO(217)
156 #define DB8500_PIN_AH11		_GPIO(218)
157 #define DB8500_PIN_AG10		_GPIO(219)
158 #define DB8500_PIN_AH10		_GPIO(220)
159 #define DB8500_PIN_AJ11		_GPIO(221)
160 #define DB8500_PIN_AJ9		_GPIO(222)
161 #define DB8500_PIN_AH9		_GPIO(223)
162 #define DB8500_PIN_AG9		_GPIO(224)
163 #define DB8500_PIN_AG8		_GPIO(225)
164 #define DB8500_PIN_AF8		_GPIO(226)
165 #define DB8500_PIN_AH7		_GPIO(227)
166 #define DB8500_PIN_AJ6		_GPIO(228)
167 #define DB8500_PIN_AG7		_GPIO(229)
168 #define DB8500_PIN_AF7		_GPIO(230)
169 /* Hole */
170 #define DB8500_PIN_AF28		_GPIO(256)
171 #define DB8500_PIN_AE29		_GPIO(257)
172 #define DB8500_PIN_AD29		_GPIO(258)
173 #define DB8500_PIN_AC29		_GPIO(259)
174 #define DB8500_PIN_AD28		_GPIO(260)
175 #define DB8500_PIN_AD26		_GPIO(261)
176 #define DB8500_PIN_AE26		_GPIO(262)
177 #define DB8500_PIN_AG29		_GPIO(263)
178 #define DB8500_PIN_AE27		_GPIO(264)
179 #define DB8500_PIN_AD27		_GPIO(265)
180 #define DB8500_PIN_AC28		_GPIO(266)
181 #define DB8500_PIN_AC27		_GPIO(267)
182 
183 /*
184  * The names of the pins are denoted by GPIO number and ball name, even
185  * though they can be used for other things than GPIO, this is the first
186  * column in the table of the data sheet and often used on schematics and
187  * such.
188  */
189 static const struct pinctrl_pin_desc nmk_db8500_pins[] = {
190 	PINCTRL_PIN(DB8500_PIN_AJ5, "GPIO0_AJ5"),
191 	PINCTRL_PIN(DB8500_PIN_AJ3, "GPIO1_AJ3"),
192 	PINCTRL_PIN(DB8500_PIN_AH4, "GPIO2_AH4"),
193 	PINCTRL_PIN(DB8500_PIN_AH3, "GPIO3_AH3"),
194 	PINCTRL_PIN(DB8500_PIN_AH6, "GPIO4_AH6"),
195 	PINCTRL_PIN(DB8500_PIN_AG6, "GPIO5_AG6"),
196 	PINCTRL_PIN(DB8500_PIN_AF6, "GPIO6_AF6"),
197 	PINCTRL_PIN(DB8500_PIN_AG5, "GPIO7_AG5"),
198 	PINCTRL_PIN(DB8500_PIN_AD5, "GPIO8_AD5"),
199 	PINCTRL_PIN(DB8500_PIN_AE4, "GPIO9_AE4"),
200 	PINCTRL_PIN(DB8500_PIN_AF5, "GPIO10_AF5"),
201 	PINCTRL_PIN(DB8500_PIN_AG4, "GPIO11_AG4"),
202 	PINCTRL_PIN(DB8500_PIN_AC4, "GPIO12_AC4"),
203 	PINCTRL_PIN(DB8500_PIN_AF3, "GPIO13_AF3"),
204 	PINCTRL_PIN(DB8500_PIN_AE3, "GPIO14_AE3"),
205 	PINCTRL_PIN(DB8500_PIN_AC3, "GPIO15_AC3"),
206 	PINCTRL_PIN(DB8500_PIN_AD3, "GPIO16_AD3"),
207 	PINCTRL_PIN(DB8500_PIN_AD4, "GPIO17_AD4"),
208 	PINCTRL_PIN(DB8500_PIN_AC2, "GPIO18_AC2"),
209 	PINCTRL_PIN(DB8500_PIN_AC1, "GPIO19_AC1"),
210 	PINCTRL_PIN(DB8500_PIN_AB4, "GPIO20_AB4"),
211 	PINCTRL_PIN(DB8500_PIN_AB3, "GPIO21_AB3"),
212 	PINCTRL_PIN(DB8500_PIN_AA3, "GPIO22_AA3"),
213 	PINCTRL_PIN(DB8500_PIN_AA4, "GPIO23_AA4"),
214 	PINCTRL_PIN(DB8500_PIN_AB2, "GPIO24_AB2"),
215 	PINCTRL_PIN(DB8500_PIN_Y4, "GPIO25_Y4"),
216 	PINCTRL_PIN(DB8500_PIN_Y2, "GPIO26_Y2"),
217 	PINCTRL_PIN(DB8500_PIN_AA2, "GPIO27_AA2"),
218 	PINCTRL_PIN(DB8500_PIN_AA1, "GPIO28_AA1"),
219 	PINCTRL_PIN(DB8500_PIN_W2, "GPIO29_W2"),
220 	PINCTRL_PIN(DB8500_PIN_W3, "GPIO30_W3"),
221 	PINCTRL_PIN(DB8500_PIN_V3, "GPIO31_V3"),
222 	PINCTRL_PIN(DB8500_PIN_V2, "GPIO32_V2"),
223 	PINCTRL_PIN(DB8500_PIN_AF2, "GPIO33_AF2"),
224 	PINCTRL_PIN(DB8500_PIN_AE1, "GPIO34_AE1"),
225 	PINCTRL_PIN(DB8500_PIN_AE2, "GPIO35_AE2"),
226 	PINCTRL_PIN(DB8500_PIN_AG2, "GPIO36_AG2"),
227 	/* Hole */
228 	PINCTRL_PIN(DB8500_PIN_F3, "GPIO64_F3"),
229 	PINCTRL_PIN(DB8500_PIN_F1, "GPIO65_F1"),
230 	PINCTRL_PIN(DB8500_PIN_G3, "GPIO66_G3"),
231 	PINCTRL_PIN(DB8500_PIN_G2, "GPIO67_G2"),
232 	PINCTRL_PIN(DB8500_PIN_E1, "GPIO68_E1"),
233 	PINCTRL_PIN(DB8500_PIN_E2, "GPIO69_E2"),
234 	PINCTRL_PIN(DB8500_PIN_G5, "GPIO70_G5"),
235 	PINCTRL_PIN(DB8500_PIN_G4, "GPIO71_G4"),
236 	PINCTRL_PIN(DB8500_PIN_H4, "GPIO72_H4"),
237 	PINCTRL_PIN(DB8500_PIN_H3, "GPIO73_H3"),
238 	PINCTRL_PIN(DB8500_PIN_J3, "GPIO74_J3"),
239 	PINCTRL_PIN(DB8500_PIN_H2, "GPIO75_H2"),
240 	PINCTRL_PIN(DB8500_PIN_J2, "GPIO76_J2"),
241 	PINCTRL_PIN(DB8500_PIN_H1, "GPIO77_H1"),
242 	PINCTRL_PIN(DB8500_PIN_F4, "GPIO78_F4"),
243 	PINCTRL_PIN(DB8500_PIN_E3, "GPIO79_E3"),
244 	PINCTRL_PIN(DB8500_PIN_E4, "GPIO80_E4"),
245 	PINCTRL_PIN(DB8500_PIN_D2, "GPIO81_D2"),
246 	PINCTRL_PIN(DB8500_PIN_C1, "GPIO82_C1"),
247 	PINCTRL_PIN(DB8500_PIN_D3, "GPIO83_D3"),
248 	PINCTRL_PIN(DB8500_PIN_C2, "GPIO84_C2"),
249 	PINCTRL_PIN(DB8500_PIN_D5, "GPIO85_D5"),
250 	PINCTRL_PIN(DB8500_PIN_C6, "GPIO86_C6"),
251 	PINCTRL_PIN(DB8500_PIN_B3, "GPIO87_B3"),
252 	PINCTRL_PIN(DB8500_PIN_C4, "GPIO88_C4"),
253 	PINCTRL_PIN(DB8500_PIN_E6, "GPIO89_E6"),
254 	PINCTRL_PIN(DB8500_PIN_A3, "GPIO90_A3"),
255 	PINCTRL_PIN(DB8500_PIN_B6, "GPIO91_B6"),
256 	PINCTRL_PIN(DB8500_PIN_D6, "GPIO92_D6"),
257 	PINCTRL_PIN(DB8500_PIN_B7, "GPIO93_B7"),
258 	PINCTRL_PIN(DB8500_PIN_D7, "GPIO94_D7"),
259 	PINCTRL_PIN(DB8500_PIN_E8, "GPIO95_E8"),
260 	PINCTRL_PIN(DB8500_PIN_D8, "GPIO96_D8"),
261 	PINCTRL_PIN(DB8500_PIN_D9, "GPIO97_D9"),
262 	/* Hole */
263 	PINCTRL_PIN(DB8500_PIN_A5, "GPIO128_A5"),
264 	PINCTRL_PIN(DB8500_PIN_B4, "GPIO129_B4"),
265 	PINCTRL_PIN(DB8500_PIN_C8, "GPIO130_C8"),
266 	PINCTRL_PIN(DB8500_PIN_A12, "GPIO131_A12"),
267 	PINCTRL_PIN(DB8500_PIN_C10, "GPIO132_C10"),
268 	PINCTRL_PIN(DB8500_PIN_B10, "GPIO133_B10"),
269 	PINCTRL_PIN(DB8500_PIN_B9, "GPIO134_B9"),
270 	PINCTRL_PIN(DB8500_PIN_A9, "GPIO135_A9"),
271 	PINCTRL_PIN(DB8500_PIN_C7, "GPIO136_C7"),
272 	PINCTRL_PIN(DB8500_PIN_A7, "GPIO137_A7"),
273 	PINCTRL_PIN(DB8500_PIN_C5, "GPIO138_C5"),
274 	PINCTRL_PIN(DB8500_PIN_C9, "GPIO139_C9"),
275 	PINCTRL_PIN(DB8500_PIN_B11, "GPIO140_B11"),
276 	PINCTRL_PIN(DB8500_PIN_C12, "GPIO141_C12"),
277 	PINCTRL_PIN(DB8500_PIN_C11, "GPIO142_C11"),
278 	PINCTRL_PIN(DB8500_PIN_D12, "GPIO143_D12"),
279 	PINCTRL_PIN(DB8500_PIN_B13, "GPIO144_B13"),
280 	PINCTRL_PIN(DB8500_PIN_C13, "GPIO145_C13"),
281 	PINCTRL_PIN(DB8500_PIN_D13, "GPIO146_D13"),
282 	PINCTRL_PIN(DB8500_PIN_C15, "GPIO147_C15"),
283 	PINCTRL_PIN(DB8500_PIN_B16, "GPIO148_B16"),
284 	PINCTRL_PIN(DB8500_PIN_B14, "GPIO149_B14"),
285 	PINCTRL_PIN(DB8500_PIN_C14, "GPIO150_C14"),
286 	PINCTRL_PIN(DB8500_PIN_D17, "GPIO151_D17"),
287 	PINCTRL_PIN(DB8500_PIN_D16, "GPIO152_D16"),
288 	PINCTRL_PIN(DB8500_PIN_B17, "GPIO153_B17"),
289 	PINCTRL_PIN(DB8500_PIN_C16, "GPIO154_C16"),
290 	PINCTRL_PIN(DB8500_PIN_C19, "GPIO155_C19"),
291 	PINCTRL_PIN(DB8500_PIN_C17, "GPIO156_C17"),
292 	PINCTRL_PIN(DB8500_PIN_A18, "GPIO157_A18"),
293 	PINCTRL_PIN(DB8500_PIN_C18, "GPIO158_C18"),
294 	PINCTRL_PIN(DB8500_PIN_B19, "GPIO159_B19"),
295 	PINCTRL_PIN(DB8500_PIN_B20, "GPIO160_B20"),
296 	PINCTRL_PIN(DB8500_PIN_D21, "GPIO161_D21"),
297 	PINCTRL_PIN(DB8500_PIN_D20, "GPIO162_D20"),
298 	PINCTRL_PIN(DB8500_PIN_C20, "GPIO163_C20"),
299 	PINCTRL_PIN(DB8500_PIN_B21, "GPIO164_B21"),
300 	PINCTRL_PIN(DB8500_PIN_C21, "GPIO165_C21"),
301 	PINCTRL_PIN(DB8500_PIN_A22, "GPIO166_A22"),
302 	PINCTRL_PIN(DB8500_PIN_B24, "GPIO167_B24"),
303 	PINCTRL_PIN(DB8500_PIN_C22, "GPIO168_C22"),
304 	PINCTRL_PIN(DB8500_PIN_D22, "GPIO169_D22"),
305 	PINCTRL_PIN(DB8500_PIN_C23, "GPIO170_C23"),
306 	PINCTRL_PIN(DB8500_PIN_D23, "GPIO171_D23"),
307 	/* Hole */
308 	PINCTRL_PIN(DB8500_PIN_AJ27, "GPIO192_AJ27"),
309 	PINCTRL_PIN(DB8500_PIN_AH27, "GPIO193_AH27"),
310 	PINCTRL_PIN(DB8500_PIN_AF27, "GPIO194_AF27"),
311 	PINCTRL_PIN(DB8500_PIN_AG28, "GPIO195_AG28"),
312 	PINCTRL_PIN(DB8500_PIN_AG26, "GPIO196_AG26"),
313 	PINCTRL_PIN(DB8500_PIN_AH24, "GPIO197_AH24"),
314 	PINCTRL_PIN(DB8500_PIN_AG25, "GPIO198_AG25"),
315 	PINCTRL_PIN(DB8500_PIN_AH23, "GPIO199_AH23"),
316 	PINCTRL_PIN(DB8500_PIN_AH26, "GPIO200_AH26"),
317 	PINCTRL_PIN(DB8500_PIN_AF24, "GPIO201_AF24"),
318 	PINCTRL_PIN(DB8500_PIN_AF25, "GPIO202_AF25"),
319 	PINCTRL_PIN(DB8500_PIN_AE23, "GPIO203_AE23"),
320 	PINCTRL_PIN(DB8500_PIN_AF23, "GPIO204_AF23"),
321 	PINCTRL_PIN(DB8500_PIN_AG23, "GPIO205_AG23"),
322 	PINCTRL_PIN(DB8500_PIN_AG24, "GPIO206_AG24"),
323 	PINCTRL_PIN(DB8500_PIN_AJ23, "GPIO207_AJ23"),
324 	PINCTRL_PIN(DB8500_PIN_AH16, "GPIO208_AH16"),
325 	PINCTRL_PIN(DB8500_PIN_AG15, "GPIO209_AG15"),
326 	PINCTRL_PIN(DB8500_PIN_AJ15, "GPIO210_AJ15"),
327 	PINCTRL_PIN(DB8500_PIN_AG14, "GPIO211_AG14"),
328 	PINCTRL_PIN(DB8500_PIN_AF13, "GPIO212_AF13"),
329 	PINCTRL_PIN(DB8500_PIN_AG13, "GPIO213_AG13"),
330 	PINCTRL_PIN(DB8500_PIN_AH15, "GPIO214_AH15"),
331 	PINCTRL_PIN(DB8500_PIN_AH13, "GPIO215_AH13"),
332 	PINCTRL_PIN(DB8500_PIN_AG12, "GPIO216_AG12"),
333 	PINCTRL_PIN(DB8500_PIN_AH12, "GPIO217_AH12"),
334 	PINCTRL_PIN(DB8500_PIN_AH11, "GPIO218_AH11"),
335 	PINCTRL_PIN(DB8500_PIN_AG10, "GPIO219_AG10"),
336 	PINCTRL_PIN(DB8500_PIN_AH10, "GPIO220_AH10"),
337 	PINCTRL_PIN(DB8500_PIN_AJ11, "GPIO221_AJ11"),
338 	PINCTRL_PIN(DB8500_PIN_AJ9, "GPIO222_AJ9"),
339 	PINCTRL_PIN(DB8500_PIN_AH9, "GPIO223_AH9"),
340 	PINCTRL_PIN(DB8500_PIN_AG9, "GPIO224_AG9"),
341 	PINCTRL_PIN(DB8500_PIN_AG8, "GPIO225_AG8"),
342 	PINCTRL_PIN(DB8500_PIN_AF8, "GPIO226_AF8"),
343 	PINCTRL_PIN(DB8500_PIN_AH7, "GPIO227_AH7"),
344 	PINCTRL_PIN(DB8500_PIN_AJ6, "GPIO228_AJ6"),
345 	PINCTRL_PIN(DB8500_PIN_AG7, "GPIO229_AG7"),
346 	PINCTRL_PIN(DB8500_PIN_AF7, "GPIO230_AF7"),
347 	/* Hole */
348 	PINCTRL_PIN(DB8500_PIN_AF28, "GPIO256_AF28"),
349 	PINCTRL_PIN(DB8500_PIN_AE29, "GPIO257_AE29"),
350 	PINCTRL_PIN(DB8500_PIN_AD29, "GPIO258_AD29"),
351 	PINCTRL_PIN(DB8500_PIN_AC29, "GPIO259_AC29"),
352 	PINCTRL_PIN(DB8500_PIN_AD28, "GPIO260_AD28"),
353 	PINCTRL_PIN(DB8500_PIN_AD26, "GPIO261_AD26"),
354 	PINCTRL_PIN(DB8500_PIN_AE26, "GPIO262_AE26"),
355 	PINCTRL_PIN(DB8500_PIN_AG29, "GPIO263_AG29"),
356 	PINCTRL_PIN(DB8500_PIN_AE27, "GPIO264_AE27"),
357 	PINCTRL_PIN(DB8500_PIN_AD27, "GPIO265_AD27"),
358 	PINCTRL_PIN(DB8500_PIN_AC28, "GPIO266_AC28"),
359 	PINCTRL_PIN(DB8500_PIN_AC27, "GPIO267_AC27"),
360 };
361 
362 /*
363  * Read the pin group names like this:
364  * u0_a_1    = first groups of pins for uart0 on alt function a
365  * i2c2_b_2  = second group of pins for i2c2 on alt function b
366  *
367  * The groups are arranged as sets per altfunction column, so we can
368  * mux in one group at a time by selecting the same altfunction for them
369  * all. When functions require pins on different altfunctions, you need
370  * to combine several groups.
371  */
372 
373 /* Altfunction A column */
374 static const unsigned u0_a_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,
375 					DB8500_PIN_AH4, DB8500_PIN_AH3 };
376 static const unsigned u1rxtx_a_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };
377 static const unsigned u1ctsrts_a_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };
378 /* Image processor I2C line, this is driven by image processor firmware */
379 static const unsigned ipi2c_a_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };
380 static const unsigned ipi2c_a_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };
381 /* MSP0 can only be on these pins, but TXD and RXD can be flipped */
382 static const unsigned msp0txrx_a_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };
383 static const unsigned msp0tfstck_a_1_pins[] = { DB8500_PIN_AF3, DB8500_PIN_AE3 };
384 static const unsigned msp0rfsrck_a_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
385 /* Basic pins of the MMC/SD card 0 interface */
386 static const unsigned mc0_a_1_pins[] = { DB8500_PIN_AC2, /* MC0_CMDDIR */
387 					 DB8500_PIN_AC1, /* MC0_DAT0DIR */
388 					 DB8500_PIN_AB4, /* MC0_DAT2DIR */
389 					 DB8500_PIN_AA3, /* MC0_FBCLK */
390 					 DB8500_PIN_AA4, /* MC0_CLK */
391 					 DB8500_PIN_AB2, /* MC0_CMD */
392 					 DB8500_PIN_Y4,  /* MC0_DAT0 */
393 					 DB8500_PIN_Y2,  /* MC0_DAT1 */
394 					 DB8500_PIN_AA2, /* MC0_DAT2 */
395 					 DB8500_PIN_AA1  /* MC0_DAT3 */
396 };
397 /* MMC/SD card 0 interface without CMD/DAT0/DAT2 direction control */
398 static const unsigned mc0_a_2_pins[] = { DB8500_PIN_AA3, /* MC0_FBCLK */
399 					 DB8500_PIN_AA4, /* MC0_CLK */
400 					 DB8500_PIN_AB2, /* MC0_CMD */
401 					 DB8500_PIN_Y4,  /* MC0_DAT0 */
402 					 DB8500_PIN_Y2,  /* MC0_DAT1 */
403 					 DB8500_PIN_AA2, /* MC0_DAT2 */
404 					 DB8500_PIN_AA1  /* MC0_DAT3 */
405 };
406 /* Often only 4 bits are used, then these are not needed (only used for MMC) */
407 static const unsigned mc0_dat47_a_1_pins[] = { DB8500_PIN_W2, /* MC0_DAT4 */
408 					       DB8500_PIN_W3, /* MC0_DAT5 */
409 					       DB8500_PIN_V3, /* MC0_DAT6 */
410 					       DB8500_PIN_V2  /* MC0_DAT7 */
411 };
412 static const unsigned mc0dat31dir_a_1_pins[] = { DB8500_PIN_AB3 }; /* MC0_DAT31DIR */
413 /* MSP1 can only be on these pins, but TXD and RXD can be flipped */
414 static const unsigned msp1txrx_a_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };
415 static const unsigned msp1_a_1_pins[] = { DB8500_PIN_AE1, DB8500_PIN_AE2 };
416 /* LCD interface */
417 static const unsigned lcdb_a_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
418 					  DB8500_PIN_G3, DB8500_PIN_G2 };
419 static const unsigned lcdvsi0_a_1_pins[] = { DB8500_PIN_E1 };
420 static const unsigned lcdvsi1_a_1_pins[] = { DB8500_PIN_E2 };
421 static const unsigned lcd_d0_d7_a_1_pins[] = {
422 	DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3,
423 	DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1 };
424 /* D8 thru D11 often used as TVOUT lines */
425 static const unsigned lcd_d8_d11_a_1_pins[] = { DB8500_PIN_F4,
426 	DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2 };
427 static const unsigned lcd_d12_d15_a_1_pins[] = {
428 	DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5 };
429 static const unsigned lcd_d12_d23_a_1_pins[] = {
430 	DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5,
431 	DB8500_PIN_C6, DB8500_PIN_B3, DB8500_PIN_C4, DB8500_PIN_E6,
432 	DB8500_PIN_A3, DB8500_PIN_B6, DB8500_PIN_D6, DB8500_PIN_B7 };
433 static const unsigned kp_a_1_pins[] = { DB8500_PIN_D7, DB8500_PIN_E8,
434 	DB8500_PIN_D8, DB8500_PIN_D9 };
435 static const unsigned kpskaskb_a_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16 };
436 static const unsigned kp_a_2_pins[] = {
437 	DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
438 	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
439 	DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
440 	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
441 /* MC2 has 8 data lines and no direction control, so only for (e)MMC */
442 static const unsigned mc2_a_1_pins[] = { DB8500_PIN_A5, DB8500_PIN_B4,
443 	DB8500_PIN_C8, DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10,
444 	DB8500_PIN_B9, DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7,
445 	DB8500_PIN_C5 };
446 /* MC2 without the feedback clock */
447 static const unsigned mc2_a_2_pins[] = { DB8500_PIN_A5, DB8500_PIN_B4,
448 	DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10, DB8500_PIN_B9,
449 	DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7, DB8500_PIN_C5 };
450 static const unsigned ssp1_a_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,
451 					  DB8500_PIN_C12, DB8500_PIN_C11 };
452 static const unsigned ssp0_a_1_pins[] = { DB8500_PIN_D12, DB8500_PIN_B13,
453 					  DB8500_PIN_C13, DB8500_PIN_D13 };
454 static const unsigned i2c0_a_1_pins[] = { DB8500_PIN_C15, DB8500_PIN_B16 };
455 /*
456  * Image processor GPIO pins are named "ipgpio" and have their own
457  * numberspace
458  */
459 static const unsigned ipgpio0_a_1_pins[] = { DB8500_PIN_B14 };
460 static const unsigned ipgpio1_a_1_pins[] = { DB8500_PIN_C14 };
461 /* Three modem pins named RF_PURn, MODEM_STATE and MODEM_PWREN */
462 static const unsigned modem_a_1_pins[] = { DB8500_PIN_D22, DB8500_PIN_C23,
463 					   DB8500_PIN_D23 };
464 /*
465  * This MSP cannot switch RX and TX, SCK in a separate group since this
466  * seems to be optional.
467  */
468 static const unsigned msp2sck_a_1_pins[] = { DB8500_PIN_AJ27 };
469 static const unsigned msp2_a_1_pins[] = { DB8500_PIN_AH27, DB8500_PIN_AF27,
470 					  DB8500_PIN_AG28, DB8500_PIN_AG26 };
471 static const unsigned mc4_a_1_pins[] = { DB8500_PIN_AH24, DB8500_PIN_AG25,
472 	DB8500_PIN_AH23, DB8500_PIN_AH26, DB8500_PIN_AF24, DB8500_PIN_AF25,
473 	DB8500_PIN_AE23, DB8500_PIN_AF23, DB8500_PIN_AG23, DB8500_PIN_AG24,
474 	DB8500_PIN_AJ23 };
475 /* MC1 has only 4 data pins, designed for SD or SDIO exclusively */
476 static const unsigned mc1_a_1_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AG15,
477 	DB8500_PIN_AJ15, DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13,
478 	DB8500_PIN_AH15 };
479 static const unsigned mc1_a_2_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AJ15,
480 	DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13, DB8500_PIN_AH15 };
481 static const unsigned mc1dir_a_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
482 	DB8500_PIN_AH12, DB8500_PIN_AH11 };
483 static const unsigned hsir_a_1_pins[] = { DB8500_PIN_AG10, DB8500_PIN_AH10,
484 	DB8500_PIN_AJ11 };
485 static const unsigned hsit_a_1_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9,
486 	DB8500_PIN_AG9, DB8500_PIN_AG8, DB8500_PIN_AF8 };
487 static const unsigned hsit_a_2_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9,
488 	DB8500_PIN_AG9, DB8500_PIN_AG8 };
489 static const unsigned clkout1_a_1_pins[] = { DB8500_PIN_AH7 };
490 static const unsigned clkout1_a_2_pins[] = { DB8500_PIN_AG7 };
491 static const unsigned clkout2_a_1_pins[] = { DB8500_PIN_AJ6 };
492 static const unsigned clkout2_a_2_pins[] = { DB8500_PIN_AF7 };
493 static const unsigned usb_a_1_pins[] = { DB8500_PIN_AF28, DB8500_PIN_AE29,
494 	DB8500_PIN_AD29, DB8500_PIN_AC29, DB8500_PIN_AD28, DB8500_PIN_AD26,
495 	DB8500_PIN_AE26, DB8500_PIN_AG29, DB8500_PIN_AE27, DB8500_PIN_AD27,
496 	DB8500_PIN_AC28, DB8500_PIN_AC27 };
497 
498 /* Altfunction B column */
499 static const unsigned trig_b_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3 };
500 static const unsigned i2c4_b_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };
501 static const unsigned i2c1_b_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };
502 static const unsigned i2c2_b_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };
503 static const unsigned i2c2_b_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };
504 static const unsigned msp0txrx_b_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };
505 static const unsigned i2c1_b_2_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
506 /* Just RX and TX for UART2 */
507 static const unsigned u2rxtx_b_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1 };
508 static const unsigned uartmodtx_b_1_pins[] = { DB8500_PIN_AB4 };
509 static const unsigned msp0sck_b_1_pins[] = { DB8500_PIN_AB3 };
510 static const unsigned uartmodrx_b_1_pins[] = { DB8500_PIN_AA3 };
511 static const unsigned stmmod_b_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4,
512 	DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
513 static const unsigned uartmodrx_b_2_pins[] = { DB8500_PIN_AB2 };
514 static const unsigned spi3_b_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3,
515 					  DB8500_PIN_V3, DB8500_PIN_V2 };
516 static const unsigned msp1txrx_b_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };
517 static const unsigned kp_b_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
518 	DB8500_PIN_G3, DB8500_PIN_G2, DB8500_PIN_E1, DB8500_PIN_E2,
519 	DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3,
520 	DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1,
521 	DB8500_PIN_F4, DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2,
522 	DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5 };
523 static const unsigned kp_b_2_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
524 	DB8500_PIN_G3, DB8500_PIN_G2, DB8500_PIN_F4, DB8500_PIN_E3};
525 static const unsigned sm_b_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
526 	DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
527 	DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8,
528 	DB8500_PIN_D9, DB8500_PIN_A5, DB8500_PIN_B4, DB8500_PIN_C8,
529 	DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10, DB8500_PIN_B9,
530 	DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7, DB8500_PIN_C5,
531 	DB8500_PIN_C9 };
532 /* This chip select pin can be "ps0" in alt C so have it separately */
533 static const unsigned smcs0_b_1_pins[] = { DB8500_PIN_E8 };
534 /* This chip select pin can be "ps1" in alt C so have it separately */
535 static const unsigned smcs1_b_1_pins[] = { DB8500_PIN_B14 };
536 static const unsigned ipgpio7_b_1_pins[] = { DB8500_PIN_B11 };
537 static const unsigned ipgpio2_b_1_pins[] = { DB8500_PIN_C12 };
538 static const unsigned ipgpio3_b_1_pins[] = { DB8500_PIN_C11 };
539 static const unsigned lcdaclk_b_1_pins[] = { DB8500_PIN_C14 };
540 static const unsigned lcda_b_1_pins[] = { DB8500_PIN_D22,
541 	DB8500_PIN_C23, DB8500_PIN_D23 };
542 static const unsigned lcd_b_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
543 	DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
544 	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
545 	DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
546 	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
547 static const unsigned lcd_d16_d23_b_1_pins[] = {
548 	DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
549 	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
550 static const unsigned ddrtrig_b_1_pins[] = { DB8500_PIN_AJ27 };
551 static const unsigned pwl_b_1_pins[] = { DB8500_PIN_AF25 };
552 static const unsigned spi1_b_1_pins[] = { DB8500_PIN_AG15, DB8500_PIN_AF13,
553 					  DB8500_PIN_AG13, DB8500_PIN_AH15 };
554 static const unsigned mc3_b_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
555 	DB8500_PIN_AH12, DB8500_PIN_AH11, DB8500_PIN_AG10, DB8500_PIN_AH10,
556 	DB8500_PIN_AJ11, DB8500_PIN_AJ9, DB8500_PIN_AH9, DB8500_PIN_AG9,
557 	DB8500_PIN_AG8 };
558 static const unsigned pwl_b_2_pins[] = { DB8500_PIN_AF8 };
559 static const unsigned pwl_b_3_pins[] = { DB8500_PIN_AG7 };
560 static const unsigned pwl_b_4_pins[] = { DB8500_PIN_AF7 };
561 
562 /* Altfunction C column */
563 static const unsigned ipjtag_c_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,
564 	DB8500_PIN_AH4, DB8500_PIN_AH3, DB8500_PIN_AH6 };
565 static const unsigned ipgpio6_c_1_pins[] = { DB8500_PIN_AG6 };
566 static const unsigned ipgpio0_c_1_pins[] = { DB8500_PIN_AF6 };
567 static const unsigned ipgpio1_c_1_pins[] = { DB8500_PIN_AG5 };
568 static const unsigned ipgpio3_c_1_pins[] = { DB8500_PIN_AF5 };
569 static const unsigned ipgpio2_c_1_pins[] = { DB8500_PIN_AG4 };
570 static const unsigned slim0_c_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
571 /* Optional 4-bit Memory Stick interface */
572 static const unsigned ms_c_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1,
573 	DB8500_PIN_AB3, DB8500_PIN_AA3, DB8500_PIN_AA4, DB8500_PIN_AB2,
574 	DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
575 static const unsigned iptrigout_c_1_pins[] = { DB8500_PIN_AB4 };
576 static const unsigned u2rxtx_c_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3 };
577 static const unsigned u2ctsrts_c_1_pins[] = { DB8500_PIN_V3, DB8500_PIN_V2 };
578 static const unsigned u0_c_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AE1,
579 					DB8500_PIN_AE2, DB8500_PIN_AG2 };
580 static const unsigned ipgpio4_c_1_pins[] = { DB8500_PIN_F3 };
581 static const unsigned ipgpio5_c_1_pins[] = { DB8500_PIN_F1 };
582 static const unsigned ipgpio6_c_2_pins[] = { DB8500_PIN_G3 };
583 static const unsigned ipgpio7_c_1_pins[] = { DB8500_PIN_G2 };
584 static const unsigned smcleale_c_1_pins[] = { DB8500_PIN_E1, DB8500_PIN_E2 };
585 static const unsigned stmape_c_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
586 	DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3 };
587 static const unsigned u2rxtx_c_2_pins[] = { DB8500_PIN_H2, DB8500_PIN_J2 };
588 static const unsigned ipgpio2_c_2_pins[] = { DB8500_PIN_F4 };
589 static const unsigned ipgpio3_c_2_pins[] = { DB8500_PIN_E3 };
590 static const unsigned ipgpio4_c_2_pins[] = { DB8500_PIN_E4 };
591 static const unsigned ipgpio5_c_2_pins[] = { DB8500_PIN_D2 };
592 static const unsigned mc5_c_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
593 	DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
594 	DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8,
595 	DB8500_PIN_D9 };
596 static const unsigned mc2rstn_c_1_pins[] = { DB8500_PIN_C8 };
597 static const unsigned kp_c_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,
598 	DB8500_PIN_C12, DB8500_PIN_C11, DB8500_PIN_D17, DB8500_PIN_D16,
599 	DB8500_PIN_C23, DB8500_PIN_D23 };
600 static const unsigned smps0_c_1_pins[] = { DB8500_PIN_E8 };
601 static const unsigned smps1_c_1_pins[] = { DB8500_PIN_B14 };
602 static const unsigned u2rxtx_c_3_pins[] = { DB8500_PIN_B17, DB8500_PIN_C16 };
603 static const unsigned stmape_c_2_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17,
604 	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19 };
605 static const unsigned uartmodrx_c_1_pins[] = { DB8500_PIN_D21 };
606 static const unsigned uartmodtx_c_1_pins[] = { DB8500_PIN_D20 };
607 static const unsigned stmmod_c_1_pins[] = { DB8500_PIN_C20, DB8500_PIN_B21,
608 	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24 };
609 static const unsigned usbsim_c_1_pins[] = { DB8500_PIN_D22 };
610 static const unsigned mc4rstn_c_1_pins[] = { DB8500_PIN_AF25 };
611 static const unsigned clkout1_c_1_pins[] = { DB8500_PIN_AH13 };
612 static const unsigned clkout2_c_1_pins[] = { DB8500_PIN_AH12 };
613 static const unsigned i2c3_c_1_pins[] = { DB8500_PIN_AG12, DB8500_PIN_AH11 };
614 static const unsigned spi0_c_1_pins[] = { DB8500_PIN_AH10, DB8500_PIN_AH9,
615 					  DB8500_PIN_AG9, DB8500_PIN_AG8 };
616 static const unsigned usbsim_c_2_pins[] = { DB8500_PIN_AF8 };
617 static const unsigned i2c3_c_2_pins[] = { DB8500_PIN_AG7, DB8500_PIN_AF7 };
618 
619 /* Other C1 column */
620 static const unsigned u2rx_oc1_1_pins[] = { DB8500_PIN_AB2 };
621 static const unsigned stmape_oc1_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4,
622 	DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
623 static const unsigned remap0_oc1_1_pins[] = { DB8500_PIN_E1 };
624 static const unsigned remap1_oc1_1_pins[] = { DB8500_PIN_E2 };
625 static const unsigned ptma9_oc1_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
626 	DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H2,
627 	DB8500_PIN_J2, DB8500_PIN_H1 };
628 static const unsigned kp_oc1_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
629 	DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
630 	DB8500_PIN_D6, DB8500_PIN_B7 };
631 static const unsigned rf_oc1_1_pins[] = { DB8500_PIN_D8, DB8500_PIN_D9 };
632 static const unsigned hxclk_oc1_1_pins[] = { DB8500_PIN_D16 };
633 static const unsigned uartmodrx_oc1_1_pins[] = { DB8500_PIN_B17 };
634 static const unsigned uartmodtx_oc1_1_pins[] = { DB8500_PIN_C16 };
635 static const unsigned stmmod_oc1_1_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17,
636 	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19 };
637 static const unsigned hxgpio_oc1_1_pins[] = { DB8500_PIN_D21, DB8500_PIN_D20,
638 	DB8500_PIN_C20, DB8500_PIN_B21, DB8500_PIN_C21, DB8500_PIN_A22,
639 	DB8500_PIN_B24, DB8500_PIN_C22 };
640 static const unsigned rf_oc1_2_pins[] = { DB8500_PIN_C23, DB8500_PIN_D23 };
641 static const unsigned spi2_oc1_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
642 	DB8500_PIN_AH12, DB8500_PIN_AH11 };
643 static const unsigned spi2_oc1_2_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AH12,
644 	DB8500_PIN_AH11 };
645 
646 /* Other C2 column */
647 static const unsigned sbag_oc2_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_AB2,
648 	DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
649 static const unsigned etmr4_oc2_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
650 	DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H2,
651 	DB8500_PIN_J2, DB8500_PIN_H1 };
652 static const unsigned ptma9_oc2_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
653 	DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
654 	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
655 	DB8500_PIN_D21, DB8500_PIN_D20,	DB8500_PIN_C20, DB8500_PIN_B21,
656 	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
657 
658 /* Other C3 column */
659 static const unsigned stmmod_oc3_1_pins[] = { DB8500_PIN_AB2, DB8500_PIN_W2,
660 	DB8500_PIN_W3, DB8500_PIN_V3, DB8500_PIN_V2 };
661 static const unsigned stmmod_oc3_2_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
662 	DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3 };
663 static const unsigned uartmodrx_oc3_1_pins[] = { DB8500_PIN_H2 };
664 static const unsigned uartmodtx_oc3_1_pins[] = { DB8500_PIN_J2 };
665 static const unsigned etmr4_oc3_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
666 	DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
667 	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
668 	DB8500_PIN_D21, DB8500_PIN_D20,	DB8500_PIN_C20, DB8500_PIN_B21,
669 	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
670 
671 /* Other C4 column */
672 static const unsigned sbag_oc4_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
673 	DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H1 };
674 static const unsigned hwobs_oc4_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
675 	DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
676 	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
677 	DB8500_PIN_D21, DB8500_PIN_D20,	DB8500_PIN_C20, DB8500_PIN_B21,
678 	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
679 
680 static const struct nmk_pingroup nmk_db8500_groups[] = {
681 	/* Altfunction A column */
682 	NMK_PIN_GROUP(u0_a_1, NMK_GPIO_ALT_A),
683 	NMK_PIN_GROUP(u1rxtx_a_1, NMK_GPIO_ALT_A),
684 	NMK_PIN_GROUP(u1ctsrts_a_1, NMK_GPIO_ALT_A),
685 	NMK_PIN_GROUP(ipi2c_a_1, NMK_GPIO_ALT_A),
686 	NMK_PIN_GROUP(ipi2c_a_2, NMK_GPIO_ALT_A),
687 	NMK_PIN_GROUP(msp0txrx_a_1, NMK_GPIO_ALT_A),
688 	NMK_PIN_GROUP(msp0tfstck_a_1, NMK_GPIO_ALT_A),
689 	NMK_PIN_GROUP(msp0rfsrck_a_1, NMK_GPIO_ALT_A),
690 	NMK_PIN_GROUP(mc0_a_1, NMK_GPIO_ALT_A),
691 	NMK_PIN_GROUP(mc0_a_2, NMK_GPIO_ALT_A),
692 	NMK_PIN_GROUP(mc0_dat47_a_1, NMK_GPIO_ALT_A),
693 	NMK_PIN_GROUP(mc0dat31dir_a_1, NMK_GPIO_ALT_A),
694 	NMK_PIN_GROUP(msp1txrx_a_1, NMK_GPIO_ALT_A),
695 	NMK_PIN_GROUP(msp1_a_1, NMK_GPIO_ALT_A),
696 	NMK_PIN_GROUP(lcdb_a_1, NMK_GPIO_ALT_A),
697 	NMK_PIN_GROUP(lcdvsi0_a_1, NMK_GPIO_ALT_A),
698 	NMK_PIN_GROUP(lcdvsi1_a_1, NMK_GPIO_ALT_A),
699 	NMK_PIN_GROUP(lcd_d0_d7_a_1, NMK_GPIO_ALT_A),
700 	NMK_PIN_GROUP(lcd_d8_d11_a_1, NMK_GPIO_ALT_A),
701 	NMK_PIN_GROUP(lcd_d12_d15_a_1, NMK_GPIO_ALT_A),
702 	NMK_PIN_GROUP(lcd_d12_d23_a_1, NMK_GPIO_ALT_A),
703 	NMK_PIN_GROUP(kp_a_1, NMK_GPIO_ALT_A),
704 	NMK_PIN_GROUP(kpskaskb_a_1, NMK_GPIO_ALT_A),
705 	NMK_PIN_GROUP(mc2_a_1, NMK_GPIO_ALT_A),
706 	NMK_PIN_GROUP(mc2_a_2, NMK_GPIO_ALT_A),
707 	NMK_PIN_GROUP(ssp1_a_1, NMK_GPIO_ALT_A),
708 	NMK_PIN_GROUP(ssp0_a_1, NMK_GPIO_ALT_A),
709 	NMK_PIN_GROUP(i2c0_a_1, NMK_GPIO_ALT_A),
710 	NMK_PIN_GROUP(ipgpio0_a_1, NMK_GPIO_ALT_A),
711 	NMK_PIN_GROUP(ipgpio1_a_1, NMK_GPIO_ALT_A),
712 	NMK_PIN_GROUP(modem_a_1, NMK_GPIO_ALT_A),
713 	NMK_PIN_GROUP(kp_a_2, NMK_GPIO_ALT_A),
714 	NMK_PIN_GROUP(msp2sck_a_1, NMK_GPIO_ALT_A),
715 	NMK_PIN_GROUP(msp2_a_1, NMK_GPIO_ALT_A),
716 	NMK_PIN_GROUP(mc4_a_1, NMK_GPIO_ALT_A),
717 	NMK_PIN_GROUP(mc1_a_1, NMK_GPIO_ALT_A),
718 	NMK_PIN_GROUP(mc1_a_2, NMK_GPIO_ALT_A),
719 	NMK_PIN_GROUP(mc1dir_a_1, NMK_GPIO_ALT_A),
720 	NMK_PIN_GROUP(hsir_a_1, NMK_GPIO_ALT_A),
721 	NMK_PIN_GROUP(hsit_a_1, NMK_GPIO_ALT_A),
722 	NMK_PIN_GROUP(hsit_a_2, NMK_GPIO_ALT_A),
723 	NMK_PIN_GROUP(clkout1_a_1, NMK_GPIO_ALT_A),
724 	NMK_PIN_GROUP(clkout1_a_2, NMK_GPIO_ALT_A),
725 	NMK_PIN_GROUP(clkout2_a_1, NMK_GPIO_ALT_A),
726 	NMK_PIN_GROUP(clkout2_a_2, NMK_GPIO_ALT_A),
727 	NMK_PIN_GROUP(usb_a_1, NMK_GPIO_ALT_A),
728 	/* Altfunction B column */
729 	NMK_PIN_GROUP(trig_b_1, NMK_GPIO_ALT_B),
730 	NMK_PIN_GROUP(i2c4_b_1, NMK_GPIO_ALT_B),
731 	NMK_PIN_GROUP(i2c1_b_1, NMK_GPIO_ALT_B),
732 	NMK_PIN_GROUP(i2c2_b_1, NMK_GPIO_ALT_B),
733 	NMK_PIN_GROUP(i2c2_b_2, NMK_GPIO_ALT_B),
734 	NMK_PIN_GROUP(msp0txrx_b_1, NMK_GPIO_ALT_B),
735 	NMK_PIN_GROUP(i2c1_b_2, NMK_GPIO_ALT_B),
736 	NMK_PIN_GROUP(u2rxtx_b_1, NMK_GPIO_ALT_B),
737 	NMK_PIN_GROUP(uartmodtx_b_1, NMK_GPIO_ALT_B),
738 	NMK_PIN_GROUP(msp0sck_b_1, NMK_GPIO_ALT_B),
739 	NMK_PIN_GROUP(uartmodrx_b_1, NMK_GPIO_ALT_B),
740 	NMK_PIN_GROUP(stmmod_b_1, NMK_GPIO_ALT_B),
741 	NMK_PIN_GROUP(uartmodrx_b_2, NMK_GPIO_ALT_B),
742 	NMK_PIN_GROUP(spi3_b_1, NMK_GPIO_ALT_B),
743 	NMK_PIN_GROUP(msp1txrx_b_1, NMK_GPIO_ALT_B),
744 	NMK_PIN_GROUP(kp_b_1, NMK_GPIO_ALT_B),
745 	NMK_PIN_GROUP(kp_b_2, NMK_GPIO_ALT_B),
746 	NMK_PIN_GROUP(sm_b_1, NMK_GPIO_ALT_B),
747 	NMK_PIN_GROUP(smcs0_b_1, NMK_GPIO_ALT_B),
748 	NMK_PIN_GROUP(smcs1_b_1, NMK_GPIO_ALT_B),
749 	NMK_PIN_GROUP(ipgpio7_b_1, NMK_GPIO_ALT_B),
750 	NMK_PIN_GROUP(ipgpio2_b_1, NMK_GPIO_ALT_B),
751 	NMK_PIN_GROUP(ipgpio3_b_1, NMK_GPIO_ALT_B),
752 	NMK_PIN_GROUP(lcdaclk_b_1, NMK_GPIO_ALT_B),
753 	NMK_PIN_GROUP(lcda_b_1, NMK_GPIO_ALT_B),
754 	NMK_PIN_GROUP(lcd_b_1, NMK_GPIO_ALT_B),
755 	NMK_PIN_GROUP(lcd_d16_d23_b_1, NMK_GPIO_ALT_B),
756 	NMK_PIN_GROUP(ddrtrig_b_1, NMK_GPIO_ALT_B),
757 	NMK_PIN_GROUP(pwl_b_1, NMK_GPIO_ALT_B),
758 	NMK_PIN_GROUP(spi1_b_1, NMK_GPIO_ALT_B),
759 	NMK_PIN_GROUP(mc3_b_1, NMK_GPIO_ALT_B),
760 	NMK_PIN_GROUP(pwl_b_2, NMK_GPIO_ALT_B),
761 	NMK_PIN_GROUP(pwl_b_3, NMK_GPIO_ALT_B),
762 	NMK_PIN_GROUP(pwl_b_4, NMK_GPIO_ALT_B),
763 	/* Altfunction C column */
764 	NMK_PIN_GROUP(ipjtag_c_1, NMK_GPIO_ALT_C),
765 	NMK_PIN_GROUP(ipgpio6_c_1, NMK_GPIO_ALT_C),
766 	NMK_PIN_GROUP(ipgpio0_c_1, NMK_GPIO_ALT_C),
767 	NMK_PIN_GROUP(ipgpio1_c_1, NMK_GPIO_ALT_C),
768 	NMK_PIN_GROUP(ipgpio3_c_1, NMK_GPIO_ALT_C),
769 	NMK_PIN_GROUP(ipgpio2_c_1, NMK_GPIO_ALT_C),
770 	NMK_PIN_GROUP(slim0_c_1, NMK_GPIO_ALT_C),
771 	NMK_PIN_GROUP(ms_c_1, NMK_GPIO_ALT_C),
772 	NMK_PIN_GROUP(iptrigout_c_1, NMK_GPIO_ALT_C),
773 	NMK_PIN_GROUP(u2rxtx_c_1, NMK_GPIO_ALT_C),
774 	NMK_PIN_GROUP(u2ctsrts_c_1, NMK_GPIO_ALT_C),
775 	NMK_PIN_GROUP(u0_c_1, NMK_GPIO_ALT_C),
776 	NMK_PIN_GROUP(ipgpio4_c_1, NMK_GPIO_ALT_C),
777 	NMK_PIN_GROUP(ipgpio5_c_1, NMK_GPIO_ALT_C),
778 	NMK_PIN_GROUP(ipgpio6_c_2, NMK_GPIO_ALT_C),
779 	NMK_PIN_GROUP(ipgpio7_c_1, NMK_GPIO_ALT_C),
780 	NMK_PIN_GROUP(smcleale_c_1, NMK_GPIO_ALT_C),
781 	NMK_PIN_GROUP(stmape_c_1, NMK_GPIO_ALT_C),
782 	NMK_PIN_GROUP(u2rxtx_c_2, NMK_GPIO_ALT_C),
783 	NMK_PIN_GROUP(ipgpio2_c_2, NMK_GPIO_ALT_C),
784 	NMK_PIN_GROUP(ipgpio3_c_2, NMK_GPIO_ALT_C),
785 	NMK_PIN_GROUP(ipgpio4_c_2, NMK_GPIO_ALT_C),
786 	NMK_PIN_GROUP(ipgpio5_c_2, NMK_GPIO_ALT_C),
787 	NMK_PIN_GROUP(mc5_c_1, NMK_GPIO_ALT_C),
788 	NMK_PIN_GROUP(mc2rstn_c_1, NMK_GPIO_ALT_C),
789 	NMK_PIN_GROUP(kp_c_1, NMK_GPIO_ALT_C),
790 	NMK_PIN_GROUP(smps0_c_1, NMK_GPIO_ALT_C),
791 	NMK_PIN_GROUP(smps1_c_1, NMK_GPIO_ALT_C),
792 	NMK_PIN_GROUP(u2rxtx_c_3, NMK_GPIO_ALT_C),
793 	NMK_PIN_GROUP(stmape_c_2, NMK_GPIO_ALT_C),
794 	NMK_PIN_GROUP(uartmodrx_c_1, NMK_GPIO_ALT_C),
795 	NMK_PIN_GROUP(uartmodtx_c_1, NMK_GPIO_ALT_C),
796 	NMK_PIN_GROUP(stmmod_c_1, NMK_GPIO_ALT_C),
797 	NMK_PIN_GROUP(usbsim_c_1, NMK_GPIO_ALT_C),
798 	NMK_PIN_GROUP(mc4rstn_c_1, NMK_GPIO_ALT_C),
799 	NMK_PIN_GROUP(clkout1_c_1, NMK_GPIO_ALT_C),
800 	NMK_PIN_GROUP(clkout2_c_1, NMK_GPIO_ALT_C),
801 	NMK_PIN_GROUP(i2c3_c_1, NMK_GPIO_ALT_C),
802 	NMK_PIN_GROUP(spi0_c_1, NMK_GPIO_ALT_C),
803 	NMK_PIN_GROUP(usbsim_c_2, NMK_GPIO_ALT_C),
804 	NMK_PIN_GROUP(i2c3_c_2, NMK_GPIO_ALT_C),
805 	/* Other alt C1 column */
806 	NMK_PIN_GROUP(u2rx_oc1_1, NMK_GPIO_ALT_C1),
807 	NMK_PIN_GROUP(stmape_oc1_1, NMK_GPIO_ALT_C1),
808 	NMK_PIN_GROUP(remap0_oc1_1, NMK_GPIO_ALT_C1),
809 	NMK_PIN_GROUP(remap1_oc1_1, NMK_GPIO_ALT_C1),
810 	NMK_PIN_GROUP(ptma9_oc1_1, NMK_GPIO_ALT_C1),
811 	NMK_PIN_GROUP(kp_oc1_1, NMK_GPIO_ALT_C1),
812 	NMK_PIN_GROUP(rf_oc1_1, NMK_GPIO_ALT_C1),
813 	NMK_PIN_GROUP(hxclk_oc1_1, NMK_GPIO_ALT_C1),
814 	NMK_PIN_GROUP(uartmodrx_oc1_1, NMK_GPIO_ALT_C1),
815 	NMK_PIN_GROUP(uartmodtx_oc1_1, NMK_GPIO_ALT_C1),
816 	NMK_PIN_GROUP(stmmod_oc1_1, NMK_GPIO_ALT_C1),
817 	NMK_PIN_GROUP(hxgpio_oc1_1, NMK_GPIO_ALT_C1),
818 	NMK_PIN_GROUP(rf_oc1_2, NMK_GPIO_ALT_C1),
819 	NMK_PIN_GROUP(spi2_oc1_1, NMK_GPIO_ALT_C1),
820 	NMK_PIN_GROUP(spi2_oc1_2, NMK_GPIO_ALT_C1),
821 	/* Other alt C2 column */
822 	NMK_PIN_GROUP(sbag_oc2_1, NMK_GPIO_ALT_C2),
823 	NMK_PIN_GROUP(etmr4_oc2_1, NMK_GPIO_ALT_C2),
824 	NMK_PIN_GROUP(ptma9_oc2_1, NMK_GPIO_ALT_C2),
825 	/* Other alt C3 column */
826 	NMK_PIN_GROUP(stmmod_oc3_1, NMK_GPIO_ALT_C3),
827 	NMK_PIN_GROUP(stmmod_oc3_2, NMK_GPIO_ALT_C3),
828 	NMK_PIN_GROUP(uartmodrx_oc3_1, NMK_GPIO_ALT_C3),
829 	NMK_PIN_GROUP(uartmodtx_oc3_1, NMK_GPIO_ALT_C3),
830 	NMK_PIN_GROUP(etmr4_oc3_1, NMK_GPIO_ALT_C3),
831 	/* Other alt C4 column */
832 	NMK_PIN_GROUP(sbag_oc4_1, NMK_GPIO_ALT_C4),
833 	NMK_PIN_GROUP(hwobs_oc4_1, NMK_GPIO_ALT_C4),
834 };
835 
836 /* We use this macro to define the groups applicable to a function */
837 #define DB8500_FUNC_GROUPS(a, b...)	   \
838 static const char * const a##_groups[] = { b };
839 
840 DB8500_FUNC_GROUPS(u0, "u0_a_1", "u0_c_1");
841 DB8500_FUNC_GROUPS(u1, "u1rxtx_a_1", "u1ctsrts_a_1");
842 /*
843  * UART2 can be muxed out with just RX/TX in four places, CTS+RTS is however
844  * only available on two pins in alternative function C
845  */
846 DB8500_FUNC_GROUPS(u2, "u2rxtx_b_1", "u2rxtx_c_1", "u2ctsrts_c_1",
847 		   "u2rxtx_c_2", "u2rxtx_c_3", "u2rx_oc1_1");
848 DB8500_FUNC_GROUPS(ipi2c, "ipi2c_a_1", "ipi2c_a_2");
849 /*
850  * MSP0 can only be on a certain set of pins, but the TX/RX pins can be
851  * switched around by selecting the altfunction A or B. The SCK pin is
852  * only available on the altfunction B.
853  */
854 DB8500_FUNC_GROUPS(msp0, "msp0txrx_a_1", "msp0tfstck_a_1", "msp0rfstck_a_1",
855 		   "msp0txrx_b_1", "msp0sck_b_1");
856 DB8500_FUNC_GROUPS(mc0, "mc0_a_1", "mc0_a_2", "mc0_dat47_a_1", "mc0dat31dir_a_1");
857 /* MSP0 can swap RX/TX like MSP0 but has no SCK pin available */
858 DB8500_FUNC_GROUPS(msp1, "msp1txrx_a_1", "msp1_a_1", "msp1txrx_b_1");
859 DB8500_FUNC_GROUPS(lcdb, "lcdb_a_1");
860 DB8500_FUNC_GROUPS(lcd, "lcdvsi0_a_1", "lcdvsi1_a_1", "lcd_d0_d7_a_1",
861 		   "lcd_d8_d11_a_1", "lcd_d12_d15_a_1", "lcd_d12_d23_a_1", "lcd_b_1",
862 		   "lcd_d16_d23_b_1");
863 DB8500_FUNC_GROUPS(kp, "kp_a_1", "kp_a_2", "kp_b_1", "kp_b_2", "kp_c_1", "kp_oc1_1");
864 DB8500_FUNC_GROUPS(mc2, "mc2_a_1", "mc2_a_2", "mc2rstn_c_1");
865 DB8500_FUNC_GROUPS(ssp1, "ssp1_a_1");
866 DB8500_FUNC_GROUPS(ssp0, "ssp0_a_1");
867 DB8500_FUNC_GROUPS(i2c0, "i2c0_a_1");
868 /* The image processor has 8 GPIO pins that can be muxed out */
869 DB8500_FUNC_GROUPS(ipgpio, "ipgpio0_a_1", "ipgpio1_a_1", "ipgpio7_b_1",
870 	"ipgpio2_b_1", "ipgpio3_b_1", "ipgpio6_c_1", "ipgpio0_c_1",
871 	"ipgpio1_c_1", "ipgpio3_c_1", "ipgpio2_c_1", "ipgpio4_c_1",
872 	"ipgpio5_c_1", "ipgpio6_c_2", "ipgpio7_c_1", "ipgpio2_c_2",
873 	"ipgpio3_c_2", "ipgpio4_c_2", "ipgpio5_c_2");
874 /* MSP2 can not invert the RX/TX pins but has the optional SCK pin */
875 DB8500_FUNC_GROUPS(msp2, "msp2sck_a_1", "msp2_a_1");
876 DB8500_FUNC_GROUPS(mc4, "mc4_a_1", "mc4rstn_c_1");
877 DB8500_FUNC_GROUPS(mc1, "mc1_a_1", "mc1_a_2", "mc1dir_a_1");
878 DB8500_FUNC_GROUPS(hsi, "hsir_a_1", "hsit_a_1", "hsit_a_2");
879 DB8500_FUNC_GROUPS(clkout, "clkout1_a_1", "clkout1_a_2", "clkout1_c_1",
880 		"clkout2_a_1", "clkout2_a_2", "clkout2_c_1");
881 DB8500_FUNC_GROUPS(usb, "usb_a_1");
882 DB8500_FUNC_GROUPS(trig, "trig_b_1");
883 DB8500_FUNC_GROUPS(i2c4, "i2c4_b_1");
884 DB8500_FUNC_GROUPS(i2c1, "i2c1_b_1", "i2c1_b_2");
885 DB8500_FUNC_GROUPS(i2c2, "i2c2_b_1", "i2c2_b_2");
886 /*
887  * The modem UART can output its RX and TX pins in some different places,
888  * so select one of each.
889  */
890 DB8500_FUNC_GROUPS(uartmod, "uartmodtx_b_1", "uartmodrx_b_1", "uartmodrx_b_2",
891 		"uartmodrx_c_1", "uartmod_tx_c_1", "uartmodrx_oc1_1",
892 		"uartmodtx_oc1_1", "uartmodrx_oc3_1", "uartmodtx_oc3_1");
893 DB8500_FUNC_GROUPS(stmmod, "stmmod_b_1", "stmmod_c_1", "stmmod_oc1_1",
894 		"stmmod_oc3_1", "stmmod_oc3_2");
895 DB8500_FUNC_GROUPS(spi3, "spi3_b_1");
896 /* Select between CS0 on alt B or PS1 on alt C */
897 DB8500_FUNC_GROUPS(sm, "sm_b_1", "smcs0_b_1", "smcs1_b_1", "smcleale_c_1",
898 		   "smps0_c_1", "smps1_c_1");
899 DB8500_FUNC_GROUPS(lcda, "lcdaclk_b_1", "lcda_b_1");
900 DB8500_FUNC_GROUPS(ddrtrig, "ddrtrig_b_1");
901 DB8500_FUNC_GROUPS(pwl, "pwl_b_1", "pwl_b_2", "pwl_b_3", "pwl_b_4");
902 DB8500_FUNC_GROUPS(spi1, "spi1_b_1");
903 DB8500_FUNC_GROUPS(mc3, "mc3_b_1");
904 DB8500_FUNC_GROUPS(ipjtag, "ipjtag_c_1");
905 DB8500_FUNC_GROUPS(slim0, "slim0_c_1");
906 DB8500_FUNC_GROUPS(ms, "ms_c_1");
907 DB8500_FUNC_GROUPS(iptrigout, "iptrigout_c_1");
908 DB8500_FUNC_GROUPS(stmape, "stmape_c_1", "stmape_c_2", "stmape_oc1_1");
909 DB8500_FUNC_GROUPS(mc5, "mc5_c_1");
910 DB8500_FUNC_GROUPS(usbsim, "usbsim_c_1", "usbsim_c_2");
911 DB8500_FUNC_GROUPS(i2c3, "i2c3_c_1", "i2c3_c_2");
912 DB8500_FUNC_GROUPS(spi0, "spi0_c_1");
913 DB8500_FUNC_GROUPS(spi2, "spi2_oc1_1", "spi2_oc1_2");
914 DB8500_FUNC_GROUPS(remap, "remap0_oc1_1", "remap1_oc1_1");
915 DB8500_FUNC_GROUPS(sbag, "sbag_oc2_1", "sbag_oc4_1");
916 DB8500_FUNC_GROUPS(ptm, "ptma9_oc1_1", "ptma9_oc2_1");
917 DB8500_FUNC_GROUPS(rf, "rf_oc1_1", "rf_oc1_2");
918 DB8500_FUNC_GROUPS(hx, "hxclk_oc1_1", "hxgpio_oc1_1");
919 DB8500_FUNC_GROUPS(etm, "etmr4_oc2_1", "etmr4_oc3_1");
920 DB8500_FUNC_GROUPS(hwobs, "hwobs_oc4_1");
921 #define FUNCTION(fname)					\
922 	{						\
923 		.name = #fname,				\
924 		.groups = fname##_groups,		\
925 		.ngroups = ARRAY_SIZE(fname##_groups),	\
926 	}
927 
928 static const struct nmk_function nmk_db8500_functions[] = {
929 	FUNCTION(u0),
930 	FUNCTION(u1),
931 	FUNCTION(u2),
932 	FUNCTION(ipi2c),
933 	FUNCTION(msp0),
934 	FUNCTION(mc0),
935 	FUNCTION(msp1),
936 	FUNCTION(lcdb),
937 	FUNCTION(lcd),
938 	FUNCTION(kp),
939 	FUNCTION(mc2),
940 	FUNCTION(ssp1),
941 	FUNCTION(ssp0),
942 	FUNCTION(i2c0),
943 	FUNCTION(ipgpio),
944 	FUNCTION(msp2),
945 	FUNCTION(mc4),
946 	FUNCTION(mc1),
947 	FUNCTION(hsi),
948 	FUNCTION(clkout),
949 	FUNCTION(usb),
950 	FUNCTION(trig),
951 	FUNCTION(i2c4),
952 	FUNCTION(i2c1),
953 	FUNCTION(i2c2),
954 	FUNCTION(uartmod),
955 	FUNCTION(stmmod),
956 	FUNCTION(spi3),
957 	FUNCTION(sm),
958 	FUNCTION(lcda),
959 	FUNCTION(ddrtrig),
960 	FUNCTION(pwl),
961 	FUNCTION(spi1),
962 	FUNCTION(mc3),
963 	FUNCTION(ipjtag),
964 	FUNCTION(slim0),
965 	FUNCTION(ms),
966 	FUNCTION(iptrigout),
967 	FUNCTION(stmape),
968 	FUNCTION(mc5),
969 	FUNCTION(usbsim),
970 	FUNCTION(i2c3),
971 	FUNCTION(spi0),
972 	FUNCTION(spi2),
973 	FUNCTION(remap),
974 	FUNCTION(sbag),
975 	FUNCTION(ptm),
976 	FUNCTION(rf),
977 	FUNCTION(hx),
978 	FUNCTION(etm),
979 	FUNCTION(hwobs),
980 };
981 
982 static const struct prcm_gpiocr_altcx_pin_desc db8500_altcx_pins[] = {
983 	PRCM_GPIOCR_ALTCX(23,	true, PRCM_IDX_GPIOCR1, 9,	/* STMAPE_CLK_a */
984 				true, PRCM_IDX_GPIOCR1, 7,	/* SBAG_CLK_a */
985 				false, 0, 0,
986 				false, 0, 0
987 	),
988 	PRCM_GPIOCR_ALTCX(24,	true, PRCM_IDX_GPIOCR1, 9,	/* STMAPE or U2_RXD ??? */
989 				true, PRCM_IDX_GPIOCR1, 7,	/* SBAG_VAL_a */
990 				true, PRCM_IDX_GPIOCR1, 10,	/* STM_MOD_CMD0 */
991 				false, 0, 0
992 	),
993 	PRCM_GPIOCR_ALTCX(25,	true, PRCM_IDX_GPIOCR1, 9,	/* STMAPE_DAT_a[0] */
994 				true, PRCM_IDX_GPIOCR1, 7,	/* SBAG_D_a[0] */
995 				false, 0, 0,
996 				false, 0, 0
997 	),
998 	PRCM_GPIOCR_ALTCX(26,	true, PRCM_IDX_GPIOCR1, 9,	/* STMAPE_DAT_a[1] */
999 				true, PRCM_IDX_GPIOCR1, 7,	/* SBAG_D_a[1] */
1000 				false, 0, 0,
1001 				false, 0, 0
1002 	),
1003 	PRCM_GPIOCR_ALTCX(27,	true, PRCM_IDX_GPIOCR1, 9,	/* STMAPE_DAT_a[2] */
1004 				true, PRCM_IDX_GPIOCR1, 7,	/* SBAG_D_a[2] */
1005 				false, 0, 0,
1006 				false, 0, 0
1007 	),
1008 	PRCM_GPIOCR_ALTCX(28,	true, PRCM_IDX_GPIOCR1, 9,	/* STMAPE_DAT_a[3] */
1009 				true, PRCM_IDX_GPIOCR1, 7,	/* SBAG_D_a[3] */
1010 				false, 0, 0,
1011 				false, 0, 0
1012 	),
1013 	PRCM_GPIOCR_ALTCX(29,	false, 0, 0,
1014 				false, 0, 0,
1015 				true, PRCM_IDX_GPIOCR1, 10,	/* STM_MOD_CMD0 */
1016 				false, 0, 0
1017 	),
1018 	PRCM_GPIOCR_ALTCX(30,	false, 0, 0,
1019 				false, 0, 0,
1020 				true, PRCM_IDX_GPIOCR1, 10,	/* STM_MOD_CMD0 */
1021 				false, 0, 0
1022 	),
1023 	PRCM_GPIOCR_ALTCX(31,	false, 0, 0,
1024 				false, 0, 0,
1025 				true, PRCM_IDX_GPIOCR1, 10,	/* STM_MOD_CMD0 */
1026 				false, 0, 0
1027 	),
1028 	PRCM_GPIOCR_ALTCX(32,	false, 0, 0,
1029 				false, 0, 0,
1030 				true, PRCM_IDX_GPIOCR1, 10,	/* STM_MOD_CMD0 */
1031 				false, 0, 0
1032 	),
1033 	PRCM_GPIOCR_ALTCX(68,	true, PRCM_IDX_GPIOCR1, 18,	/* REMAP_SELECT_ON */
1034 				false, 0, 0,
1035 				false, 0, 0,
1036 				false, 0, 0
1037 	),
1038 	PRCM_GPIOCR_ALTCX(69,	true, PRCM_IDX_GPIOCR1, 18,	/* REMAP_SELECT_ON */
1039 				false, 0, 0,
1040 				false, 0, 0,
1041 				false, 0, 0
1042 	),
1043 	PRCM_GPIOCR_ALTCX(70,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D23 */
1044 				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
1045 				true, PRCM_IDX_GPIOCR1, 11,	/* STM_MOD_CMD1 */
1046 				true, PRCM_IDX_GPIOCR1, 8	/* SBAG_CLK */
1047 	),
1048 	PRCM_GPIOCR_ALTCX(71,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D22 */
1049 				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
1050 				true, PRCM_IDX_GPIOCR1, 11,	/* STM_MOD_CMD1 */
1051 				true, PRCM_IDX_GPIOCR1, 8	/* SBAG_D3 */
1052 	),
1053 	PRCM_GPIOCR_ALTCX(72,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D21 */
1054 				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
1055 				true, PRCM_IDX_GPIOCR1, 11,	/* STM_MOD_CMD1 */
1056 				true, PRCM_IDX_GPIOCR1, 8	/* SBAG_D2 */
1057 	),
1058 	PRCM_GPIOCR_ALTCX(73,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D20 */
1059 				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
1060 				true, PRCM_IDX_GPIOCR1, 11,	/* STM_MOD_CMD1 */
1061 				true, PRCM_IDX_GPIOCR1, 8	/* SBAG_D1 */
1062 	),
1063 	PRCM_GPIOCR_ALTCX(74,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D19 */
1064 				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
1065 				true, PRCM_IDX_GPIOCR1, 11,	/* STM_MOD_CMD1 */
1066 				true, PRCM_IDX_GPIOCR1, 8	/* SBAG_D0 */
1067 	),
1068 	PRCM_GPIOCR_ALTCX(75,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D18 */
1069 				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
1070 				true, PRCM_IDX_GPIOCR1, 0,	/* DBG_UARTMOD_CMD0 */
1071 				false, 0, 0
1072 	),
1073 	PRCM_GPIOCR_ALTCX(76,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D17 */
1074 				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
1075 				true, PRCM_IDX_GPIOCR1, 0,	/* DBG_UARTMOD_CMD0 */
1076 				false, 0, 0
1077 	),
1078 	PRCM_GPIOCR_ALTCX(77,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D16 */
1079 				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
1080 				false, 0, 0,
1081 				true, PRCM_IDX_GPIOCR1, 8	/* SBAG_VAL */
1082 	),
1083 	PRCM_GPIOCR_ALTCX(86,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_O3 */
1084 				false, 0, 0,
1085 				false, 0, 0,
1086 				false, 0, 0
1087 	),
1088 	PRCM_GPIOCR_ALTCX(87,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_O2 */
1089 				false, 0, 0,
1090 				false, 0, 0,
1091 				false, 0, 0
1092 	),
1093 	PRCM_GPIOCR_ALTCX(88,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_I3 */
1094 				false, 0, 0,
1095 				false, 0, 0,
1096 				false, 0, 0
1097 	),
1098 	PRCM_GPIOCR_ALTCX(89,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_I2 */
1099 				false, 0, 0,
1100 				false, 0, 0,
1101 				false, 0, 0
1102 	),
1103 	PRCM_GPIOCR_ALTCX(90,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_O1 */
1104 				false, 0, 0,
1105 				false, 0, 0,
1106 				false, 0, 0
1107 	),
1108 	PRCM_GPIOCR_ALTCX(91,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_O0 */
1109 				false, 0, 0,
1110 				false, 0, 0,
1111 				false, 0, 0
1112 	),
1113 	PRCM_GPIOCR_ALTCX(92,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_I1 */
1114 				false, 0, 0,
1115 				false, 0, 0,
1116 				false, 0, 0
1117 	),
1118 	PRCM_GPIOCR_ALTCX(93,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_I0 */
1119 				false, 0, 0,
1120 				false, 0, 0,
1121 				false, 0, 0
1122 	),
1123 	PRCM_GPIOCR_ALTCX(96,	true, PRCM_IDX_GPIOCR2, 3,	/* RF_INT */
1124 				false, 0, 0,
1125 				false, 0, 0,
1126 				false, 0, 0
1127 	),
1128 	PRCM_GPIOCR_ALTCX(97,	true, PRCM_IDX_GPIOCR2, 1,	/* RF_CTRL */
1129 				false, 0, 0,
1130 				false, 0, 0,
1131 				false, 0, 0
1132 	),
1133 	PRCM_GPIOCR_ALTCX(151,	false, 0, 0,
1134 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_CTL */
1135 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1136 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS17 */
1137 	),
1138 	PRCM_GPIOCR_ALTCX(152,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_CLK */
1139 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_CLK */
1140 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1141 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS16 */
1142 	),
1143 	PRCM_GPIOCR_ALTCX(153,	true, PRCM_IDX_GPIOCR1, 1,	/* UARTMOD_CMD1 */
1144 				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D15 */
1145 				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
1146 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS15 */
1147 	),
1148 	PRCM_GPIOCR_ALTCX(154,	true, PRCM_IDX_GPIOCR1, 1,	/* UARTMOD_CMD1 */
1149 				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D14 */
1150 				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
1151 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS14 */
1152 	),
1153 	PRCM_GPIOCR_ALTCX(155,	true, PRCM_IDX_GPIOCR1, 13,	/* STM_MOD_CMD2 */
1154 				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D13 */
1155 				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
1156 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS13 */
1157 	),
1158 	PRCM_GPIOCR_ALTCX(156,	true, PRCM_IDX_GPIOCR1, 13,	/* STM_MOD_CMD2 */
1159 				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D12 */
1160 				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
1161 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS12 */
1162 	),
1163 	PRCM_GPIOCR_ALTCX(157,	true, PRCM_IDX_GPIOCR1, 13,	/* STM_MOD_CMD2 */
1164 				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D11 */
1165 				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
1166 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS11 */
1167 	),
1168 	PRCM_GPIOCR_ALTCX(158,	true, PRCM_IDX_GPIOCR1, 13,	/* STM_MOD_CMD2 */
1169 				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D10 */
1170 				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
1171 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS10 */
1172 	),
1173 	PRCM_GPIOCR_ALTCX(159,	true, PRCM_IDX_GPIOCR1, 13,	/* STM_MOD_CMD2 */
1174 				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D9 */
1175 				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
1176 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS9 */
1177 	),
1178 	PRCM_GPIOCR_ALTCX(160,	false, 0, 0,
1179 				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D8 */
1180 				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
1181 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS8 */
1182 	),
1183 	PRCM_GPIOCR_ALTCX(161,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO7 */
1184 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D7 */
1185 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1186 				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS7 */
1187 	),
1188 	PRCM_GPIOCR_ALTCX(162,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO6 */
1189 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D6 */
1190 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1191 				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS6 */
1192 	),
1193 	PRCM_GPIOCR_ALTCX(163,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO5 */
1194 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D5 */
1195 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1196 				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS5 */
1197 	),
1198 	PRCM_GPIOCR_ALTCX(164,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO4 */
1199 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D4 */
1200 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1201 				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS4 */
1202 	),
1203 	PRCM_GPIOCR_ALTCX(165,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO3 */
1204 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D3 */
1205 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1206 				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS3 */
1207 	),
1208 	PRCM_GPIOCR_ALTCX(166,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO2 */
1209 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D2 */
1210 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1211 				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS2 */
1212 	),
1213 	PRCM_GPIOCR_ALTCX(167,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO1 */
1214 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D1 */
1215 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1216 				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS1 */
1217 	),
1218 	PRCM_GPIOCR_ALTCX(168,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO0 */
1219 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D0 */
1220 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1221 				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS0 */
1222 	),
1223 	PRCM_GPIOCR_ALTCX(170,	true, PRCM_IDX_GPIOCR2, 2,	/* RF_INT */
1224 				false, 0, 0,
1225 				false, 0, 0,
1226 				false, 0, 0
1227 	),
1228 	PRCM_GPIOCR_ALTCX(171,	true, PRCM_IDX_GPIOCR2, 0,	/* RF_CTRL */
1229 				false, 0, 0,
1230 				false, 0, 0,
1231 				false, 0, 0
1232 	),
1233 	PRCM_GPIOCR_ALTCX(215,	true, PRCM_IDX_GPIOCR1, 23,	/* SPI2_TXD */
1234 				false, 0, 0,
1235 				false, 0, 0,
1236 				false, 0, 0
1237 	),
1238 	PRCM_GPIOCR_ALTCX(216,	true, PRCM_IDX_GPIOCR1, 23,	/* SPI2_FRM */
1239 				false, 0, 0,
1240 				false, 0, 0,
1241 				false, 0, 0
1242 	),
1243 	PRCM_GPIOCR_ALTCX(217,	true, PRCM_IDX_GPIOCR1, 23,	/* SPI2_CLK */
1244 				false, 0, 0,
1245 				false, 0, 0,
1246 				false, 0, 0
1247 	),
1248 	PRCM_GPIOCR_ALTCX(218,	true, PRCM_IDX_GPIOCR1, 23,	/* SPI2_RXD */
1249 				false, 0, 0,
1250 				false, 0, 0,
1251 				false, 0, 0
1252 	),
1253 };
1254 
1255 static const u16 db8500_prcm_gpiocr_regs[] = {
1256 	[PRCM_IDX_GPIOCR1] = 0x138,
1257 	[PRCM_IDX_GPIOCR2] = 0x574,
1258 };
1259 
1260 static const struct nmk_pinctrl_soc_data nmk_db8500_soc = {
1261 	.pins = nmk_db8500_pins,
1262 	.npins = ARRAY_SIZE(nmk_db8500_pins),
1263 	.functions = nmk_db8500_functions,
1264 	.nfunctions = ARRAY_SIZE(nmk_db8500_functions),
1265 	.groups = nmk_db8500_groups,
1266 	.ngroups = ARRAY_SIZE(nmk_db8500_groups),
1267 	.altcx_pins = db8500_altcx_pins,
1268 	.npins_altcx = ARRAY_SIZE(db8500_altcx_pins),
1269 	.prcm_gpiocr_registers = db8500_prcm_gpiocr_regs,
1270 };
1271 
nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data ** soc)1272 void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc)
1273 {
1274 	*soc = &nmk_db8500_soc;
1275 }
1276