Searched defs:CSR_MHPMEVENT28 (Results 1 – 2 of 2) sorted by relevance
| /openbmc/u-boot/arch/riscv/include/asm/ | ||
| H A D | encoding.h | 220 #define CSR_MHPMEVENT28 0x33c macro |
| /openbmc/qemu/target/riscv/ | ||
| H A D | cpu_bits.h | 432 #define CSR_MHPMEVENT28 0x33c macro |