Home
last modified time | relevance | path

Searched defs:CSR_MHPMEVENT16 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h208 #define CSR_MHPMEVENT16 0x330 macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h417 #define CSR_MHPMEVENT16 0x330 macro