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Searched defs:CSR_HPMCOUNTER5 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h326 #define CSR_HPMCOUNTER5 0xc05 macro
/openbmc/linux/arch/riscv/include/asm/
H A Dcsr.h212 #define CSR_HPMCOUNTER5 0xc05 macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h78 #define CSR_HPMCOUNTER5 0xc05 macro