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Searched defs:CSR_HPMCOUNTER27 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h348 #define CSR_HPMCOUNTER27 0xc1b macro
/openbmc/linux/arch/riscv/include/asm/
H A Dcsr.h234 #define CSR_HPMCOUNTER27 0xc1b macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h100 #define CSR_HPMCOUNTER27 0xc1b macro