xref: /openbmc/linux/sound/soc/codecs/cs4234.h (revision d4edae9c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * ALSA SoC Audio driver for CS4234 codec
4  *
5  * Copyright (C) 2020 Cirrus Logic, Inc. and
6  *                    Cirrus Logic International Semiconductor Ltd.
7  */
8 
9 #ifndef CS4234_H
10 #define CS4234_H
11 
12 #define CS4234_DEVID_AB			0x01
13 #define CS4234_DEVID_CD			0x02
14 #define CS4234_DEVID_EF			0x03
15 #define CS4234_REVID			0x05
16 
17 #define CS4234_CLOCK_SP			0x06
18 #define CS4234_BASE_RATE_MASK		0xC0
19 #define CS4234_BASE_RATE_SHIFT		6
20 #define CS4234_SPEED_MODE_MASK		0x30
21 #define CS4234_SPEED_MODE_SHIFT		4
22 #define CS4234_MCLK_RATE_MASK		0x0E
23 #define CS4234_MCLK_RATE_SHIFT		1
24 
25 #define CS4234_SAMPLE_WIDTH		0x07
26 #define CS4234_SDOUTX_SW_MASK		0xC0
27 #define CS4234_SDOUTX_SW_SHIFT		6
28 #define CS4234_INPUT_SW_MASK		0x30
29 #define CS4234_INPUT_SW_SHIFT		4
30 #define CS4234_LOW_LAT_SW_MASK		0x0C
31 #define CS4234_LOW_LAT_SW_SHIFT		2
32 #define CS4234_DAC5_SW_MASK		0x03
33 #define CS4234_DAC5_SW_SHIFT		0
34 
35 #define CS4234_SP_CTRL			0x08
36 #define CS4234_INVT_SCLK_MASK		0x80
37 #define CS4234_INVT_SCLK_SHIFT		7
38 #define CS4234_DAC5_SRC_MASK		0x70
39 #define CS4234_DAC5_SRC_SHIFT		4
40 #define CS4234_SP_FORMAT_MASK		0x0C
41 #define CS4234_SP_FORMAT_SHIFT		2
42 #define CS4234_SDO_CHAIN_MASK		0x02
43 #define CS4234_SDO_CHAIN_SHIFT		1
44 #define CS4234_MST_SLV_MASK		0x01
45 #define CS4234_MST_SLV_SHIFT		0
46 
47 #define CS4234_SP_DATA_SEL		0x09
48 #define CS4234_DAC14_SRC_MASK		0x38
49 #define CS4234_DAC14_SRC_SHIFT		3
50 #define CS4234_LL_SRC_MASK		0x07
51 #define CS4234_LL_SRC_SHIFT		0
52 
53 #define CS4234_SDIN1_MASK1		0x0A
54 #define CS4234_SDIN1_MASK2		0x0B
55 #define CS4234_SDIN2_MASK1		0x0C
56 #define CS4234_SDIN2_MASK2		0x0D
57 
58 #define CS4234_TPS_CTRL			0x0E
59 #define CS4234_TPS_MODE_MASK		0x80
60 #define CS4234_TPS_MODE_SHIFT		7
61 #define CS4234_TPS_OFST_MASK		0x70
62 #define CS4234_TPS_OFST_SHIFT		4
63 #define CS4234_GRP_DELAY_MASK		0x0F
64 #define CS4234_GRP_DELAY_SHIFT		0
65 
66 #define CS4234_ADC_CTRL1		0x0F
67 #define CS4234_VA_SEL_MASK		0x20
68 #define CS4234_VA_SEL_SHIFT		5
69 #define CS4234_ENA_HPF_MASK		0x10
70 #define CS4234_ENA_HPF_SHIFT		4
71 #define CS4234_INV_ADC_MASK		0x0F
72 #define CS4234_INV_ADC4_MASK		0x08
73 #define CS4234_INV_ADC4_SHIFT		3
74 #define CS4234_INV_ADC3_MASK		0x04
75 #define CS4234_INV_ADC3_SHIFT		2
76 #define CS4234_INV_ADC2_MASK		0x02
77 #define CS4234_INV_ADC2_SHIFT		1
78 #define CS4234_INV_ADC1_MASK		0x01
79 #define CS4234_INV_ADC1_SHIFT		0
80 
81 #define CS4234_ADC_CTRL2		0x10
82 #define CS4234_MUTE_ADC4_MASK		0x80
83 #define CS4234_MUTE_ADC4_SHIFT		7
84 #define CS4234_MUTE_ADC3_MASK		0x40
85 #define CS4234_MUTE_ADC3_SHIFT		6
86 #define CS4234_MUTE_ADC2_MASK		0x20
87 #define CS4234_MUTE_ADC2_SHIFT		5
88 #define CS4234_MUTE_ADC1_MASK		0x10
89 #define CS4234_MUTE_ADC1_SHIFT		4
90 #define CS4234_PDN_ADC4_MASK		0x08
91 #define CS4234_PDN_ADC4_SHIFT		3
92 #define CS4234_PDN_ADC3_MASK		0x04
93 #define CS4234_PDN_ADC3_SHIFT		2
94 #define CS4234_PDN_ADC2_MASK		0x02
95 #define CS4234_PDN_ADC2_SHIFT		1
96 #define CS4234_PDN_ADC1_MASK		0x01
97 #define CS4234_PDN_ADC1_SHIFT		0
98 
99 #define CS4234_LOW_LAT_CTRL1		0x11
100 #define CS4234_LL_NG_MASK		0xE0
101 #define CS4234_LL_NG_SHIFT		5
102 #define CS4234_INV_LL_MASK		0x0F
103 #define CS4234_INV_LL4_MASK		0x08
104 #define CS4234_INV_LL4_SHIFT		3
105 #define CS4234_INV_LL3_MASK		0x04
106 #define CS4234_INV_LL3_SHIFT		2
107 #define CS4234_INV_LL2_MASK		0x02
108 #define CS4234_INV_LL2_SHIFT		1
109 #define CS4234_INV_LL1_MASK		0x01
110 #define CS4234_INV_LL1_SHIFT		0
111 
112 #define CS4234_DAC_CTRL1		0x12
113 #define CS4234_DAC14_NG_MASK		0xE0
114 #define CS4234_DAC14_NG_SHIFT		5
115 #define CS4234_DAC14_DE_MASK		0x10
116 #define CS4234_DAC14_DE_SHIFT		4
117 #define CS4234_DAC5_DE_MASK		0x08
118 #define CS4234_DAC5_DE_SHIFT		3
119 #define CS4234_DAC5_MVC_MASK		0x04
120 #define CS4234_DAC5_MVC_SHIFT		2
121 #define CS4234_DAC5_CFG_FLTR_MASK	0x03
122 #define CS4234_DAC5_CFG_FLTR_SHIFT	0
123 
124 #define CS4234_DAC_CTRL2		0x13
125 #define CS4234_DAC5_NG_MASK		0xE0
126 #define CS4234_DAC5_NG_SHIFT		5
127 #define CS4234_INV_DAC_MASK		0x1F
128 #define CS4234_INV_DAC5_MASK		0x10
129 #define CS4234_INV_DAC5_SHIFT		4
130 #define CS4234_INV_DAC4_MASK		0x08
131 #define CS4234_INV_DAC4_SHIFT		3
132 #define CS4234_INV_DAC3_MASK		0x04
133 #define CS4234_INV_DAC3_SHIFT		2
134 #define CS4234_INV_DAC2_MASK		0x02
135 #define CS4234_INV_DAC2_SHIFT		1
136 #define CS4234_INV_DAC1_MASK		0x01
137 #define CS4234_INV_DAC1_SHIFT		0
138 
139 #define CS4234_DAC_CTRL3		0x14
140 #define CS4234_DAC5_ATT_MASK		0x80
141 #define CS4234_DAC5_ATT_SHIFT		7
142 #define CS4234_DAC14_ATT_MASK		0x40
143 #define CS4234_DAC14_ATT_SHIFT		6
144 #define CS4234_MUTE_LL_MASK		0x20
145 #define CS4234_MUTE_LL_SHIFT		5
146 #define CS4234_MUTE_DAC5_MASK		0x10
147 #define CS4234_MUTE_DAC5_SHIFT		4
148 #define CS4234_MUTE_DAC4_MASK		0x08
149 #define CS4234_MUTE_DAC4_SHIFT		3
150 #define CS4234_MUTE_DAC3_MASK		0x04
151 #define CS4234_MUTE_DAC3_SHIFT		2
152 #define CS4234_MUTE_DAC2_MASK		0x02
153 #define CS4234_MUTE_DAC2_SHIFT		1
154 #define CS4234_MUTE_DAC1_MASK		0x01
155 #define CS4234_MUTE_DAC1_SHIFT		0
156 
157 #define CS4234_DAC_CTRL4		0x15
158 #define CS4234_VQ_RAMP_MASK		0x80
159 #define CS4234_VQ_RAMP_SHIFT		7
160 #define CS4234_TPS_GAIN_MASK		0x40
161 #define CS4234_TPS_GAIN_SHIFT		6
162 #define CS4234_PDN_DAC5_MASK		0x10
163 #define CS4234_PDN_DAC5_SHIFT		4
164 #define CS4234_PDN_DAC4_MASK		0x08
165 #define CS4234_PDN_DAC4_SHIFT		3
166 #define CS4234_PDN_DAC3_MASK		0x04
167 #define CS4234_PDN_DAC3_SHIFT		2
168 #define CS4234_PDN_DAC2_MASK		0x02
169 #define CS4234_PDN_DAC2_SHIFT		1
170 #define CS4234_PDN_DAC1_MASK		0x01
171 #define CS4234_PDN_DAC1_SHIFT		0
172 
173 #define CS4234_VOLUME_MODE		0x16
174 #define CS4234_MUTE_DELAY_MASK		0xC0
175 #define CS4234_MUTE_DELAY_SHIFT		6
176 #define CS4234_MIN_DELAY_MASK		0x38
177 #define CS4234_MIN_DELAY_SHIFT		3
178 #define CS4234_MAX_DELAY_MASK		0x07
179 #define CS4234_MAX_DELAY_SHIFT		0
180 
181 #define CS4234_MASTER_VOL		0x17
182 #define CS4234_DAC1_VOL			0x18
183 #define CS4234_DAC2_VOL			0x19
184 #define CS4234_DAC3_VOL			0x1A
185 #define CS4234_DAC4_VOL			0x1B
186 #define CS4234_DAC5_VOL			0x1C
187 
188 #define CS4234_INT_CTRL			0x1E
189 #define CS4234_INT_MODE_MASK		0x80
190 #define CS4234_INT_MODE_SHIFT		7
191 #define CS4234_INT_PIN_MASK		0x60
192 #define CS4234_INT_PIN_SHIFT		5
193 
194 #define CS4234_INT_MASK1		0x1F
195 #define CS4234_MSK_TST_MODE_MASK	0x80
196 #define CS4234_MSK_TST_MODE_ERR_SHIFT	7
197 #define CS4234_MSK_SP_ERR_MASK		0x40
198 #define CS4234_MSK_SP_ERR_SHIFT		6
199 #define CS4234_MSK_CLK_ERR_MASK		0x08
200 #define CS4234_MSK_CLK_ERR_SHIFT	5
201 #define CS4234_MSK_ADC4_OVFL_MASK	0x08
202 #define CS4234_MSK_ADC4_OVFL_SHIFT	3
203 #define CS4234_MSK_ADC3_OVFL_MASK	0x04
204 #define CS4234_MSK_ADC3_OVFL_SHIFT	2
205 #define CS4234_MSK_ADC2_OVFL_MASK	0x02
206 #define CS4234_MSK_ADC2_OVFL_SHIFT	1
207 #define CS4234_MSK_ADC1_OVFL_MASK	0x01
208 #define CS4234_MSK_ADC1_OVFL_SHIFT	0
209 
210 #define CS4234_INT_MASK2		0x20
211 #define CS4234_MSK_DAC5_CLIP_MASK	0x10
212 #define CS4234_MSK_DAC5_CLIP_SHIFT	4
213 #define CS4234_MSK_DAC4_CLIP_MASK	0x08
214 #define CS4234_MSK_DAC4_CLIP_SHIFT	3
215 #define CS4234_MSK_DAC3_CLIP_MASK	0x04
216 #define CS4234_MSK_DAC3_CLIP_SHIFT	2
217 #define CS4234_MSK_DAC2_CLIP_MASK	0x02
218 #define CS4234_MSK_DAC2_CLIP_SHIFT	1
219 #define CS4234_MSK_DAC1_CLIP_MASK	0x01
220 #define CS4234_MSK_DAC1_CLIP_SHIFT	0
221 
222 #define CS4234_INT_NOTIFY1		0x21
223 #define CS4234_TST_MODE_MASK		0x80
224 #define CS4234_TST_MODE_SHIFT		7
225 #define CS4234_SP_ERR_MASK		0x40
226 #define CS4234_SP_ERR_SHIFT		6
227 #define CS4234_CLK_MOD_ERR_MASK		0x08
228 #define CS4234_CLK_MOD_ERR_SHIFT	5
229 #define CS4234_ADC4_OVFL_MASK		0x08
230 #define CS4234_ADC4_OVFL_SHIFT		3
231 #define CS4234_ADC3_OVFL_MASK		0x04
232 #define CS4234_ADC3_OVFL_SHIFT		2
233 #define CS4234_ADC2_OVFL_MASK		0x02
234 #define CS4234_ADC2_OVFL_SHIFT		1
235 #define CS4234_ADC1_OVFL_MASK		0x01
236 #define CS4234_ADC1_OVFL_SHIFT		0
237 
238 #define CS4234_INT_NOTIFY2		0x22
239 #define CS4234_DAC5_CLIP_MASK		0x10
240 #define CS4234_DAC5_CLIP_SHIFT		4
241 #define CS4234_DAC4_CLIP_MASK		0x08
242 #define CS4234_DAC4_CLIP_SHIFT		3
243 #define CS4234_DAC3_CLIP_MASK		0x04
244 #define CS4234_DAC3_CLIP_SHIFT		2
245 #define CS4234_DAC2_CLIP_MASK		0x02
246 #define CS4234_DAC2_CLIP_SHIFT		1
247 #define CS4234_DAC1_CLIP_MASK		0x01
248 #define CS4234_DAC1_CLIP_SHIFT		0
249 
250 #define CS4234_MAX_REGISTER		CS4234_INT_NOTIFY2
251 
252 #define CS4234_SUPPORTED_ID		0x423400
253 #define CS4234_BOOT_TIME_US		3000
254 #define CS4234_HOLD_RESET_TIME_US	1000
255 #define CS4234_VQ_CHARGE_MS		1000
256 
257 #define CS4234_PCM_RATES	(SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
258 				 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \
259 				 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
260 
261 #define CS4234_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S18_3LE | \
262 			SNDRV_PCM_FMTBIT_S20_LE | SNDRV_PCM_FMTBIT_S24_LE | \
263 			SNDRV_PCM_FMTBIT_S24_3LE)
264 
265 enum cs4234_supplies {
266 	CS4234_SUPPLY_VA = 0,
267 	CS4234_SUPPLY_VL,
268 };
269 
270 enum cs4234_va_sel {
271 	CS4234_3V3 = 0,
272 	CS4234_5V,
273 };
274 
275 enum cs4234_sp_format {
276 	CS4234_LEFT_J = 0,
277 	CS4234_I2S,
278 	CS4234_TDM,
279 };
280 
281 enum cs4234_base_rate_advisory {
282 	CS4234_48K = 0,
283 	CS4234_44K1,
284 	CS4234_32K,
285 };
286 
287 #endif
288