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Searched defs:CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3341 #define CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK 0x3f00 macro
H A Dgfx_8_1_sh_mask.h4477 #define CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK 0x3f00 macro
H A Dgfx_8_0_sh_mask.h3955 #define CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK 0x3f00 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12906 #define CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK … macro
H A Dgc_9_1_sh_mask.h14210 #define CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK … macro
H A Dgc_9_2_1_sh_mask.h14075 #define CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK … macro
H A Dgc_9_4_3_sh_mask.h16439 #define CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK … macro
H A Dgc_9_4_2_sh_mask.h4007 #define CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK … macro
H A Dgc_11_0_0_sh_mask.h17387 #define CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK … macro
H A Dgc_10_1_0_sh_mask.h20321 #define CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK … macro
H A Dgc_11_0_3_sh_mask.h19626 #define CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK … macro
H A Dgc_10_3_0_sh_mask.h18475 #define CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK … macro