xref: /openbmc/u-boot/arch/arm/mach-davinci/Kconfig (revision fc82e768)
1if ARCH_DAVINCI
2
3choice
4	prompt "DaVinci board select"
5	optional
6
7config TARGET_IPAM390
8	bool "IPAM390 board"
9	select MACH_DAVINCI_DA850_EVM
10	select SOC_DA850
11	select SUPPORT_SPL
12
13config TARGET_DA850EVM
14	bool "DA850 EVM board"
15	select MACH_DAVINCI_DA850_EVM
16	select SOC_DA850
17	select SUPPORT_SPL
18
19config TARGET_EA20
20	bool "EA20 board"
21	select BOARD_LATE_INIT
22	select MACH_DAVINCI_DA850_EVM
23	select SOC_DA850
24
25config TARGET_OMAPL138_LCDK
26	bool "OMAPL138 LCDK"
27	select SOC_DA8XX
28	select SUPPORT_SPL
29
30config TARGET_CALIMAIN
31	bool "Calimain board"
32	select SOC_DA850
33
34config TARGET_LEGOEV3
35	bool "LEGO MINDSTORMS EV3"
36	select MACH_DAVINCI_DA850_EVM
37	select SOC_DA850
38
39endchoice
40
41config SYS_SOC
42	default "davinci"
43
44config DA850_LOWLEVEL
45	bool "Enable Lowlevel DA850 initialization"
46	depends on SOC_DA850
47
48config SYS_DA850_PLL_INIT
49	bool
50
51config SYS_DA850_DDR_INIT
52	bool
53
54config SOC_DA850
55	bool
56	select SOC_DA8XX
57
58config SOC_DA8XX
59	bool
60	select SYS_DA850_DDR_INIT if SUPPORT_SPL || DA850_LOWLEVEL
61	select SYS_DA850_PLL_INIT if SUPPORT_SPL || DA850_LOWLEVEL
62
63config MACH_DAVINCI_DA850_EVM
64	bool
65
66if SYS_DA850_PLL_INIT
67comment "DA850 PLL Initialization Parameters"
68
69config SYS_DV_CLKMODE
70	int "PLLCTL Clock Mode"
71	default 0
72	help
73	  Set PLLCTL Clock Mode bit as External Clock or On Chip oscillator
74
75config SYS_DA850_PLL0_POSTDIV
76	int "PLLC0 PLL Post-Divider"
77	default 1
78	help
79	  Value written to PLLC0 PLL Post-Divider Control Register
80
81config SYS_DA850_PLL0_PLLDIV1
82	hex "PLLC0 Divider 1"
83	default 0x8000
84	help
85	  Value written to PLLC0 Divider 1 register
86
87config SYS_DA850_PLL0_PLLDIV2
88	hex "PLLC0 Divider 2"
89	default 0x8001
90	help
91	  Value written to PLLC0 Divider 2 register
92
93config SYS_DA850_PLL0_PLLDIV3
94	hex "PLLC0 Divider 3"
95	default 0x8002
96	help
97	  Value written to PLLC0 Divider 3 register
98
99config SYS_DA850_PLL0_PLLDIV4
100	hex "PLLC0 Divider 4"
101	default 0x8003
102	help
103	  Value written to PLLC0 Divider 4 register
104
105config SYS_DA850_PLL0_PLLDIV5
106	hex "PLLC0 Divider 5"
107	default 0x8002
108	help
109	  Value written to PLLC0 Divider 5 register
110
111config SYS_DA850_PLL0_PLLDIV6
112	hex "PLLC0 Divider 6"
113	default 0x8000
114	help
115	  Value written to PLLC0 Divider 6 register
116
117config SYS_DA850_PLL0_PLLDIV7
118	hex "PLLC0 Divider 7"
119	default 0x8005
120	help
121	  Value written to PLLC0 Divider 7 register
122
123config SYS_DA850_PLL1_POSTDIV
124	hex "PLLC1 PLL Post-Divider"
125	default 1
126	help
127	  Value written to PLLC1 PLL Post-Divider Control Register
128
129config SYS_DA850_PLL1_PLLDIV1
130	hex "PLLC1 Divider 2"
131	default 0x8000
132	help
133	  Value written to PLLC1 Divider 1 register
134
135config SYS_DA850_PLL1_PLLDIV2
136	hex "PLLC1 Divider 2"
137	default 0x8001
138	help
139	  Value written to PLLC1 Divider 2 register
140
141config SYS_DA850_PLL1_PLLDIV3
142	hex "PLLC1 Divider 3"
143	default 0x8002
144	help
145	  Value written to PLLC1 Divider 3 register
146
147endif
148
149source "board/Barix/ipam390/Kconfig"
150source "board/davinci/da8xxevm/Kconfig"
151source "board/davinci/ea20/Kconfig"
152source "board/omicron/calimain/Kconfig"
153source "board/lego/ev3/Kconfig"
154
155config SPL_LDSCRIPT
156	default "board/$(BOARDDIR)/u-boot-spl-ipam390.lds" if TARGET_IPAM390
157	default "board/$(BOARDDIR)/u-boot-spl-da850evm.lds"
158
159endif
160