xref: /openbmc/linux/drivers/mtd/nand/raw/Kconfig (revision c22649e2)
1# SPDX-License-Identifier: GPL-2.0-only
2menuconfig MTD_RAW_NAND
3	tristate "Raw/Parallel NAND Device Support"
4	select MTD_NAND_CORE
5	select MTD_NAND_ECC
6	help
7	  This enables support for accessing all type of raw/parallel
8	  NAND flash devices. For further information see
9	  <http://www.linux-mtd.infradead.org/doc/nand.html>.
10
11if MTD_RAW_NAND
12
13comment "Raw/parallel NAND flash controllers"
14
15config MTD_NAND_DENALI
16	tristate
17
18config MTD_NAND_DENALI_PCI
19	tristate "Denali NAND controller on Intel Moorestown"
20	select MTD_NAND_DENALI
21	depends on PCI
22	help
23	  Enable the driver for NAND flash on Intel Moorestown, using the
24	  Denali NAND controller core.
25
26config MTD_NAND_DENALI_DT
27	tristate "Denali NAND controller as a DT device"
28	select MTD_NAND_DENALI
29	depends on HAS_DMA && HAVE_CLK && OF && HAS_IOMEM
30	help
31	  Enable the driver for NAND flash on platforms using a Denali NAND
32	  controller as a DT device.
33
34config MTD_NAND_AMS_DELTA
35	tristate "Amstrad E3 NAND controller"
36	depends on MACH_AMS_DELTA || COMPILE_TEST
37	default y
38	help
39	  Support for NAND flash on Amstrad E3 (Delta).
40
41config MTD_NAND_OMAP2
42	tristate "OMAP2, OMAP3, OMAP4 and Keystone NAND controller"
43	depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
44	depends on HAS_IOMEM
45	depends on OMAP_GPMC
46	help
47	  Support for NAND flash on Texas Instruments OMAP2, OMAP3, OMAP4
48	  and Keystone platforms.
49
50config MTD_NAND_OMAP_BCH
51	depends on MTD_NAND_OMAP2
52	bool "Support hardware based BCH error correction"
53	default n
54	select BCH
55	help
56	  This config enables the ELM hardware engine, which can be used to
57	  locate and correct errors when using BCH ECC scheme. This offloads
58	  the cpu from doing ECC error searching and correction. However some
59	  legacy OMAP families like OMAP2xxx, OMAP3xxx do not have ELM engine
60	  so this is optional for them.
61
62config MTD_NAND_OMAP_BCH_BUILD
63	def_tristate MTD_NAND_OMAP2 && MTD_NAND_OMAP_BCH
64
65config MTD_NAND_AU1550
66	tristate "Au1550/1200 NAND support"
67	depends on MIPS_ALCHEMY
68	help
69	  This enables the driver for the NAND flash controller on the
70	  AMD/Alchemy 1550 SOC.
71
72config MTD_NAND_NDFC
73	tristate "IBM/MCC 4xx NAND controller"
74	depends on 4xx
75	select MTD_NAND_ECC_SW_HAMMING
76	select MTD_NAND_ECC_SW_HAMMING_SMC
77	help
78	  NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs
79
80config MTD_NAND_S3C2410
81	tristate "Samsung S3C NAND controller"
82	depends on ARCH_S3C64XX
83	help
84	  This enables the NAND flash controller on the S3C24xx and S3C64xx
85	  SoCs
86
87	  No board specific support is done by this driver, each board
88	  must advertise a platform_device for the driver to attach.
89
90config MTD_NAND_S3C2410_DEBUG
91	bool "Samsung S3C NAND controller debug"
92	depends on MTD_NAND_S3C2410
93	help
94	  Enable debugging of the S3C NAND driver
95
96config MTD_NAND_S3C2410_CLKSTOP
97	bool "Samsung S3C NAND IDLE clock stop"
98	depends on MTD_NAND_S3C2410
99	default n
100	help
101	  Stop the clock to the NAND controller when there is no chip
102	  selected to save power. This will mean there is a small delay
103	  when the is NAND chip selected or released, but will save
104	  approximately 5mA of power when there is nothing happening.
105
106config MTD_NAND_SHARPSL
107	tristate "Sharp SL Series (C7xx + others) NAND controller"
108	depends on ARCH_PXA || COMPILE_TEST
109	depends on HAS_IOMEM
110
111config MTD_NAND_CAFE
112	tristate "OLPC CAFÉ NAND controller"
113	depends on PCI
114	select REED_SOLOMON
115	select REED_SOLOMON_DEC16
116	help
117	  Use NAND flash attached to the CAFÉ chip designed for the OLPC
118	  laptop.
119
120config MTD_NAND_CS553X
121	tristate "CS5535/CS5536 (AMD Geode companion) NAND controller"
122	depends on X86_32
123	depends on !UML && HAS_IOMEM
124	help
125	  The CS553x companion chips for the AMD Geode processor
126	  include NAND flash controllers with built-in hardware ECC
127	  capabilities; enabling this option will allow you to use
128	  these. The driver will check the MSRs to verify that the
129	  controller is enabled for NAND, and currently requires that
130	  the controller be in MMIO mode.
131
132	  If you say "m", the module will be called cs553x_nand.
133
134config MTD_NAND_ATMEL
135	tristate "Atmel AT91 NAND Flash/SmartMedia NAND controller"
136	depends on ARCH_AT91 || COMPILE_TEST
137	depends on HAS_IOMEM
138	select GENERIC_ALLOCATOR
139	select MFD_ATMEL_SMC
140	help
141	  Enables support for NAND Flash / Smart Media Card interface
142	  on Atmel AT91 processors.
143
144config MTD_NAND_ORION
145	tristate "Marvell Orion NAND controller"
146	depends on PLAT_ORION
147	help
148	  This enables the NAND flash controller on Orion machines.
149
150	  No board specific support is done by this driver, each board
151	  must advertise a platform_device for the driver to attach.
152
153config MTD_NAND_MARVELL
154	tristate "Marvell EBU NAND controller"
155	depends on PXA3xx || ARCH_MMP || PLAT_ORION || ARCH_MVEBU || \
156		   COMPILE_TEST
157	depends on HAS_IOMEM
158	help
159	  This enables the NAND flash controller driver for Marvell boards,
160	  including:
161	  - PXA3xx processors (NFCv1)
162	  - 32-bit Armada platforms (XP, 37x, 38x, 39x) (NFCv2)
163	  - 64-bit Aramda platforms (7k, 8k, ac5) (NFCv2)
164
165config MTD_NAND_SLC_LPC32XX
166	tristate "NXP LPC32xx SLC NAND controller"
167	depends on ARCH_LPC32XX || COMPILE_TEST
168	depends on HAS_IOMEM
169	help
170	  Enables support for NXP's LPC32XX SLC (i.e. for Single Level Cell
171	  chips) NAND controller. This is the default for the PHYTEC 3250
172	  reference board which contains a NAND256R3A2CZA6 chip.
173
174	  Please check the actual NAND chip connected and its support
175	  by the SLC NAND controller.
176
177config MTD_NAND_MLC_LPC32XX
178	tristate "NXP LPC32xx MLC NAND controller"
179	depends on ARCH_LPC32XX || COMPILE_TEST
180	depends on HAS_IOMEM
181	help
182	  Uses the LPC32XX MLC (i.e. for Multi Level Cell chips) NAND
183	  controller. This is the default for the WORK92105 controller
184	  board.
185
186	  Please check the actual NAND chip connected and its support
187	  by the MLC NAND controller.
188
189config MTD_NAND_PASEMI
190	tristate "PA Semi PWRficient NAND controller"
191	depends on PPC_PASEMI
192	help
193	  Enables support for NAND Flash interface on PA Semi PWRficient
194	  based boards
195
196source "drivers/mtd/nand/raw/brcmnand/Kconfig"
197
198config MTD_NAND_BCM47XXNFLASH
199	tristate "BCM4706 BCMA NAND controller"
200	depends on BCMA_NFLASH
201	depends on BCMA
202	help
203	  BCMA bus can have various flash memories attached, they are
204	  registered by bcma as platform devices. This enables driver for
205	  NAND flash memories. For now only BCM4706 is supported.
206
207config MTD_NAND_MPC5121_NFC
208	tristate "MPC5121 NAND controller"
209	depends on PPC_MPC512x
210	help
211	  This enables the driver for the NAND flash controller on the
212	  MPC5121 SoC.
213
214config MTD_NAND_GPMI_NAND
215	tristate "Freescale GPMI NAND controller"
216	depends on MXS_DMA
217	help
218	  Enables NAND Flash support for IMX23, IMX28 or IMX6.
219	  The GPMI controller is very powerful, with the help of BCH
220	  module, it can do the hardware ECC. The GPMI supports several
221	  NAND flashs at the same time.
222
223config MTD_NAND_FSL_ELBC
224	tristate "Freescale eLBC NAND controller"
225	depends on FSL_SOC
226	select FSL_LBC
227	help
228	  Various Freescale chips, including the 8313, include a NAND Flash
229	  Controller Module with built-in hardware ECC capabilities.
230	  Enabling this option will enable you to use this to control
231	  external NAND devices.
232
233config MTD_NAND_FSL_IFC
234	tristate "Freescale IFC NAND controller"
235	depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST
236	depends on HAS_IOMEM
237	depends on FSL_IFC
238	help
239	  Various Freescale chips e.g P1010, include a NAND Flash machine
240	  with built-in hardware ECC capabilities.
241	  Enabling this option will enable you to use this to control
242	  external NAND devices.
243
244config MTD_NAND_FSL_UPM
245	tristate "Freescale UPM NAND controller"
246	depends on PPC_83xx || PPC_85xx
247	select FSL_LBC
248	help
249	  Enables support for NAND Flash chips wired onto Freescale PowerPC
250	  processor localbus with User-Programmable Machine support.
251
252config MTD_NAND_VF610_NFC
253	tristate "Freescale VF610/MPC5125 NAND controller"
254	depends on (SOC_VF610 || COMPILE_TEST)
255	depends on HAS_IOMEM
256	help
257	  Enables support for NAND Flash Controller on some Freescale
258	  processors like the VF610, MPC5125, MCF54418 or Kinetis K70.
259	  The driver supports a maximum 2k page size. With 2k pages and
260	  64 bytes or more of OOB, hardware ECC with up to 32-bit error
261	  correction is supported. Hardware ECC is only enabled through
262	  device tree.
263
264config MTD_NAND_MXC
265	tristate "Freescale MXC NAND controller"
266	depends on ARCH_MXC || COMPILE_TEST
267	depends on HAS_IOMEM && OF
268	help
269	  This enables the driver for the NAND flash controller on the
270	  MXC processors.
271
272config MTD_NAND_SH_FLCTL
273	tristate "Renesas SuperH FLCTL NAND controller"
274	depends on SUPERH || COMPILE_TEST
275	depends on HAS_IOMEM
276	help
277	  Several Renesas SuperH CPU has FLCTL. This option enables support
278	  for NAND Flash using FLCTL.
279
280config MTD_NAND_DAVINCI
281	tristate "DaVinci/Keystone NAND controller"
282	depends on ARCH_DAVINCI || (ARCH_KEYSTONE && TI_AEMIF) || COMPILE_TEST
283	depends on HAS_IOMEM
284	help
285	  Enable the driver for NAND flash chips on Texas Instruments
286	  DaVinci/Keystone processors.
287
288config MTD_NAND_TXX9NDFMC
289	tristate "TXx9 NAND controller"
290	depends on SOC_TX4938 || COMPILE_TEST
291	depends on HAS_IOMEM
292	help
293	  This enables the NAND flash controller on the TXx9 SoCs.
294
295config MTD_NAND_SOCRATES
296	tristate "Socrates NAND controller"
297	depends on SOCRATES
298	help
299	  Enables support for NAND Flash chips wired onto Socrates board.
300
301source "drivers/mtd/nand/raw/ingenic/Kconfig"
302
303config MTD_NAND_FSMC
304	tristate "ST Micros FSMC NAND controller"
305	depends on OF && HAS_IOMEM
306	depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || COMPILE_TEST
307	help
308	  Enables support for NAND Flash chips on the ST Microelectronics
309	  Flexible Static Memory Controller (FSMC)
310
311config MTD_NAND_XWAY
312	bool "Lantiq XWAY NAND controller"
313	depends on LANTIQ && SOC_TYPE_XWAY
314	help
315	  Enables support for NAND Flash chips on Lantiq XWAY SoCs. NAND is attached
316	  to the External Bus Unit (EBU).
317
318config MTD_NAND_SUNXI
319	tristate "Allwinner NAND controller"
320	depends on ARCH_SUNXI || COMPILE_TEST
321	depends on HAS_IOMEM
322	help
323	  Enables support for NAND Flash chips on Allwinner SoCs.
324
325config MTD_NAND_HISI504
326	tristate "Hisilicon Hip04 NAND controller"
327	depends on ARCH_HISI || COMPILE_TEST
328	depends on HAS_IOMEM
329	help
330	  Enables support for NAND controller on Hisilicon SoC Hip04.
331
332config MTD_NAND_QCOM
333	tristate "QCOM NAND controller"
334	depends on ARCH_QCOM || COMPILE_TEST
335	depends on HAS_IOMEM
336	help
337	  Enables support for NAND flash chips on SoCs containing the EBI2 NAND
338	  controller. This controller is found on IPQ806x SoC.
339
340config MTD_NAND_MTK
341	tristate "MTK NAND controller"
342	depends on MTD_NAND_ECC_MEDIATEK
343	depends on ARCH_MEDIATEK || COMPILE_TEST
344	depends on HAS_IOMEM
345	help
346	  Enables support for NAND controller on MTK SoCs.
347	  This controller is found on mt27xx, mt81xx, mt65xx SoCs.
348
349config MTD_NAND_MXIC
350	tristate "Macronix raw NAND controller"
351	depends on HAS_IOMEM || COMPILE_TEST
352	help
353	  This selects the Macronix raw NAND controller driver.
354
355config MTD_NAND_TEGRA
356	tristate "NVIDIA Tegra NAND controller"
357	depends on ARCH_TEGRA || COMPILE_TEST
358	depends on HAS_IOMEM
359	help
360	  Enables support for NAND flash controller on NVIDIA Tegra SoC.
361	  The driver has been developed and tested on a Tegra 2 SoC. DMA
362	  support, raw read/write page as well as HW ECC read/write page
363	  is supported. Extra OOB bytes when using HW ECC are currently
364	  not supported.
365
366config MTD_NAND_STM32_FMC2
367	tristate "Support for NAND controller on STM32MP SoCs"
368	depends on ARCH_STM32 || COMPILE_TEST
369	select MFD_SYSCON
370	help
371	  Enables support for NAND Flash chips on SoCs containing the FMC2
372	  NAND controller. This controller is found on STM32MP SoCs.
373	  The controller supports a maximum 8k page size and supports
374	  a maximum 8-bit correction error per sector of 512 bytes.
375
376config MTD_NAND_MESON
377	tristate "Support for NAND controller on Amlogic's Meson SoCs"
378	depends on COMMON_CLK && (ARCH_MESON || COMPILE_TEST)
379	select MFD_SYSCON
380	help
381	  Enables support for NAND controller on Amlogic's Meson SoCs.
382	  This controller is found on Meson SoCs.
383
384config MTD_NAND_GPIO
385	tristate "GPIO assisted NAND controller"
386	depends on GPIOLIB || COMPILE_TEST
387	depends on HAS_IOMEM
388	help
389	  This enables a NAND flash driver where control signals are
390	  connected to GPIO pins, and commands and data are communicated
391	  via a memory mapped interface.
392
393config MTD_NAND_PLATFORM
394	tristate "Generic NAND controller"
395	depends on HAS_IOMEM
396	help
397	  This implements a generic NAND driver for on-SOC platform
398	  devices. You will need to provide platform-specific functions
399	  via platform_data.
400
401config MTD_NAND_CADENCE
402	tristate "Support Cadence NAND (HPNFC) controller"
403	depends on OF && HAS_IOMEM
404	help
405	  Enable the driver for NAND flash on platforms using a Cadence NAND
406	  controller.
407
408config MTD_NAND_ARASAN
409	tristate "Support for Arasan NAND flash controller"
410	depends on HAS_IOMEM && HAS_DMA
411	select BCH
412	help
413	  Enables the driver for the Arasan NAND flash controller on
414	  Zynq Ultrascale+ MPSoC.
415
416config MTD_NAND_INTEL_LGM
417	tristate "Support for NAND controller on Intel LGM SoC"
418	depends on OF
419	depends on HAS_IOMEM
420	help
421	  Enables support for NAND Flash chips on Intel's LGM SoC.
422	  NAND flash controller interfaced through the External Bus Unit.
423
424config MTD_NAND_ROCKCHIP
425	tristate "Rockchip NAND controller"
426	depends on ARCH_ROCKCHIP && HAS_IOMEM
427	help
428	  Enables support for NAND controller on Rockchip SoCs.
429	  There are four different versions of NAND FLASH Controllers,
430	  including:
431	    NFC v600: RK2928, RK3066, RK3188
432	    NFC v622: RK3036, RK3128
433	    NFC v800: RK3308, RV1108
434	    NFC v900: PX30, RK3326
435
436config MTD_NAND_PL35X
437	tristate "ARM PL35X NAND controller"
438	depends on OF
439	depends on PL353_SMC
440	help
441	  Enables support for PrimeCell SMC PL351 and PL353 NAND
442	  controller found on Zynq7000.
443
444config MTD_NAND_RENESAS
445	tristate "Renesas R-Car Gen3 & RZ/N1 NAND controller"
446	depends on ARCH_RENESAS || COMPILE_TEST
447	help
448	  Enables support for the NAND controller found on Renesas R-Car
449	  Gen3 and RZ/N1 SoC families.
450
451comment "Misc"
452
453config MTD_SM_COMMON
454	tristate
455	default n
456
457config MTD_NAND_NANDSIM
458	tristate "Support for NAND Flash Simulator"
459	help
460	  The simulator may simulate various NAND flash chips for the
461	  MTD nand layer.
462
463config MTD_NAND_RICOH
464	tristate "Ricoh xD card reader"
465	default n
466	depends on PCI
467	select MTD_SM_COMMON
468	help
469	  Enable support for Ricoh R5C852 xD card reader
470	  You also need to enable either
471	  NAND SSFDC (SmartMedia) read only translation layer' or new
472	  experimental, readwrite
473	  'SmartMedia/xD new translation layer'
474
475config MTD_NAND_DISKONCHIP
476	tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation)"
477	depends on HAS_IOMEM
478	select REED_SOLOMON
479	select REED_SOLOMON_DEC16
480	help
481	  This is a reimplementation of M-Systems DiskOnChip 2000,
482	  Millennium and Millennium Plus as a standard NAND device driver,
483	  as opposed to the earlier self-contained MTD device drivers.
484	  This should enable, among other things, proper JFFS2 operation on
485	  these devices.
486
487config MTD_NAND_DISKONCHIP_PROBE_ADVANCED
488	bool "Advanced detection options for DiskOnChip"
489	depends on MTD_NAND_DISKONCHIP
490	help
491	  This option allows you to specify nonstandard address at which to
492	  probe for a DiskOnChip, or to change the detection options.  You
493	  are unlikely to need any of this unless you are using LinuxBIOS.
494	  Say 'N'.
495
496config MTD_NAND_DISKONCHIP_PROBE_ADDRESS
497	hex "Physical address of DiskOnChip" if MTD_NAND_DISKONCHIP_PROBE_ADVANCED
498	depends on MTD_NAND_DISKONCHIP
499	default "0"
500	help
501	  By default, the probe for DiskOnChip devices will look for a
502	  DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.
503	  This option allows you to specify a single address at which to probe
504	  for the device, which is useful if you have other devices in that
505	  range which get upset when they are probed.
506
507	  (Note that on PowerPC, the normal probe will only check at
508	  0xE4000000.)
509
510	  Normally, you should leave this set to zero, to allow the probe at
511	  the normal addresses.
512
513config MTD_NAND_DISKONCHIP_PROBE_HIGH
514	bool "Probe high addresses"
515	depends on MTD_NAND_DISKONCHIP_PROBE_ADVANCED
516	help
517	  By default, the probe for DiskOnChip devices will look for a
518	  DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.
519	  This option changes to make it probe between 0xFFFC8000 and
520	  0xFFFEE000.  Unless you are using LinuxBIOS, this is unlikely to be
521	  useful to you.  Say 'N'.
522
523config MTD_NAND_DISKONCHIP_BBTWRITE
524	bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP"
525	depends on MTD_NAND_DISKONCHIP
526	help
527	  On DiskOnChip devices shipped with the INFTL filesystem (Millennium
528	  and 2000 TSOP/Alon), Linux reserves some space at the end of the
529	  device for the Bad Block Table (BBT).  If you have existing INFTL
530	  data on your device (created by non-Linux tools such as M-Systems'
531	  DOS drivers), your data might overlap the area Linux wants to use for
532	  the BBT.  If this is a concern for you, leave this option disabled and
533	  Linux will not write BBT data into this area.
534	  The downside of leaving this option disabled is that if bad blocks
535	  are detected by Linux, they will not be recorded in the BBT, which
536	  could cause future problems.
537	  Once you enable this option, new filesystems (INFTL or others, created
538	  in Linux or other operating systems) will not use the reserved area.
539	  The only reason not to enable this option is to prevent damage to
540	  preexisting filesystems.
541	  Even if you leave this disabled, you can enable BBT writes at module
542	  load time (assuming you build diskonchip as a module) with the module
543	  parameter "inftl_bbt_write=1".
544
545endif # MTD_RAW_NAND
546