1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2011 Andes Technology Corporation
4  * Nobuhiro Lin, Andes Technology Corporation <nobuhiro@andestech.com>
5  * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
6  */
7 
8 #ifndef __AG101_H
9 #define __AG101_H
10 
11 /* Hardware register bases */
12 
13 /* AHB Controller */
14 #define CONFIG_FTAHBC020S_BASE		0x90100000
15 /* Static Memory Controller (SRAM) */
16 #define CONFIG_FTSMC020_BASE		0x90200000
17 /* FTSDMC021 SDRAM Controller */
18 #define CONFIG_FTSDMC021_BASE		0x90300000
19 /* DMA Controller */
20 #define CONFIG_FTDMAC020_BASE		0x90400000
21 /* AHB-to-APB Bridge */
22 #define CONFIG_FTAPBBRG020S_01_BASE	0x90500000
23 /* LCD Controller */
24 #define CONFIG_FTLCDC100_BASE		0x90600000
25 /* Reserved */
26 #define CONFIG_RESERVED_01_BASE		0x90700000
27 /* Reserved */
28 #define CONFIG_RESERVED_02_BASE		0x90800000
29 /* Ethernet */
30 #define CONFIG_FTMAC100_BASE		0x90900000
31 /* External USB host */
32 #define CONFIG_EXT_USB_HOST_BASE	0x90A00000
33 /* USB Device */
34 #define CONFIG_USB_DEV_BASE		0x90B00000
35 /* External AHB-to-PCI Bridge (FTPCI100 not exist in ag101) */
36 #define CONFIG_EXT_AHBPCIBRG_BASE	0x90C00000
37 /* Reserved */
38 #define CONFIG_RESERVED_03_BASE		0x90D00000
39 /* External AHB-to-APB Bridger (FTAPBBRG020S_02) */
40 #define CONFIG_EXT_AHBAPBBRG_BASE	0x90E00000
41 /* External AHB slave1 (LCD) */
42 #define CONFIG_EXT_AHBSLAVE01_BASE	0x90F00000
43 /* External AHB slave2 (FUSBH200) */
44 #define CONFIG_EXT_AHBSLAVE02_BASE	0x92000000
45 
46 /* DEBUG LED */
47 #define CONFIG_DEBUG_LED		0x902FFFFC
48 
49 /* APB Device definitions */
50 
51 /* Power Management Unit */
52 #define CONFIG_FTPMU010_BASE		0x98100000
53 /* BT UART 2/IrDA (UART 01 in Linux) */
54 #define CONFIG_FTUART010_01_BASE	0x98300000
55 /* Counter/Timers */
56 #define CONFIG_FTTMR010_BASE		0x98400000
57 /* Watchdog Timer */
58 #define CONFIG_FTWDT010_BASE		0x98500000
59 /* Real Time Clock */
60 #define CONFIG_FTRTC010_BASE		0x98600000
61 /* GPIO */
62 #define CONFIG_FTGPIO010_BASE		0x98700000
63 /* Interrupt Controller */
64 #define CONFIG_FTINTC010_BASE		0x98800000
65 /* I2C */
66 #define CONFIG_FTIIC010_BASE		0x98A00000
67 /* Reserved */
68 #define CONFIG_RESERVED_04_BASE		0x98C00000
69 /* Compat Flash Controller */
70 #define CONFIG_FTCFC010_BASE		0x98D00000
71 
72 /* Synchronous Serial Port Controller (SSP) I2S/AC97 */
73 #define CONFIG_FTSSP010_02_BASE		0x99400000
74 /* ST UART ? SSP 02 (UART 02 in Linux) */
75 #define CONFIG_FTUART010_02_BASE	0x99600000
76 
77 /* The following address was not defined in Linux */
78 
79 /* FF UART 3 */
80 #define CONFIG_FTUART010_03_BASE	0x98200000
81 /* Synchronous Serial Port Controller (SSP) 01 */
82 #define CONFIG_FTSSP010_01_BASE		0x98B00000
83 /* IrDA */
84 #define CONFIG_IRDA_BASE		0x98900000
85 /* PWM - Pulse Width Modulator Controller */
86 #define CONFIG_PMW_BASE			0x99100000
87 
88 #endif	/* __AG101_H */
89