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Searched defs:CM4_CM_POST_CSC_B_C31_C32__CM_POST_CSC_B_C32__SHIFT (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_2_sh_mask.h22979 #define CM4_CM_POST_CSC_B_C31_C32__CM_POST_CSC_B_C32__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h24020 #define CM4_CM_POST_CSC_B_C31_C32__CM_POST_CSC_B_C32__SHIFT … macro