1 /*
2  *  linux/include/asm-arm/proc-armv/ptrace.h
3  *
4  *  Copyright (C) 1996-1999 Russell King
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 #ifndef __ASM_PROC_PTRACE_H
11 #define __ASM_PROC_PTRACE_H
12 
13 #ifdef CONFIG_ARM64
14 
15 #define PCMASK		0
16 
17 #ifndef __ASSEMBLY__
18 
19 /*
20  * This struct defines the way the registers are stored
21  * on the stack during an exception.
22  */
23 struct pt_regs {
24 	unsigned long elr;
25 	unsigned long regs[31];
26 };
27 
28 #endif	/* __ASSEMBLY__ */
29 
30 #else	/* CONFIG_ARM64 */
31 
32 #define USR26_MODE	0x00
33 #define FIQ26_MODE	0x01
34 #define IRQ26_MODE	0x02
35 #define SVC26_MODE	0x03
36 #define USR_MODE	0x10
37 #define FIQ_MODE	0x11
38 #define IRQ_MODE	0x12
39 #define SVC_MODE	0x13
40 #define MON_MODE	0x16
41 #define ABT_MODE	0x17
42 #define HYP_MODE	0x1a
43 #define UND_MODE	0x1b
44 #define SYSTEM_MODE	0x1f
45 #define MODE_MASK	0x1f
46 #define T_BIT		0x20
47 #define F_BIT		0x40
48 #define I_BIT		0x80
49 #define A_BIT		0x100
50 #define CC_V_BIT	(1 << 28)
51 #define CC_C_BIT	(1 << 29)
52 #define CC_Z_BIT	(1 << 30)
53 #define CC_N_BIT	(1 << 31)
54 #define PCMASK		0
55 
56 #ifndef __ASSEMBLY__
57 
58 /* this struct defines the way the registers are stored on the
59    stack during a system call. */
60 
61 struct pt_regs {
62 	long uregs[18];
63 };
64 
65 #define ARM_cpsr	uregs[16]
66 #define ARM_pc		uregs[15]
67 #define ARM_lr		uregs[14]
68 #define ARM_sp		uregs[13]
69 #define ARM_ip		uregs[12]
70 #define ARM_fp		uregs[11]
71 #define ARM_r10		uregs[10]
72 #define ARM_r9		uregs[9]
73 #define ARM_r8		uregs[8]
74 #define ARM_r7		uregs[7]
75 #define ARM_r6		uregs[6]
76 #define ARM_r5		uregs[5]
77 #define ARM_r4		uregs[4]
78 #define ARM_r3		uregs[3]
79 #define ARM_r2		uregs[2]
80 #define ARM_r1		uregs[1]
81 #define ARM_r0		uregs[0]
82 #define ARM_ORIG_r0	uregs[17]
83 
84 #ifdef __KERNEL__
85 
86 #define user_mode(regs)	\
87 	(((regs)->ARM_cpsr & 0xf) == 0)
88 
89 #ifdef CONFIG_ARM_THUMB
90 #define thumb_mode(regs) \
91 	(((regs)->ARM_cpsr & T_BIT))
92 #else
93 #define thumb_mode(regs) (0)
94 #endif
95 
96 #define processor_mode(regs) \
97 	((regs)->ARM_cpsr & MODE_MASK)
98 
99 #define interrupts_enabled(regs) \
100 	(!((regs)->ARM_cpsr & I_BIT))
101 
102 #define fast_interrupts_enabled(regs) \
103 	(!((regs)->ARM_cpsr & F_BIT))
104 
105 #define condition_codes(regs) \
106 	((regs)->ARM_cpsr & (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT))
107 
108 /* Are the current registers suitable for user mode?
109  * (used to maintain security in signal handlers)
110  */
valid_user_regs(struct pt_regs * regs)111 static inline int valid_user_regs(struct pt_regs *regs)
112 {
113 	if ((regs->ARM_cpsr & 0xf) == 0 &&
114 	    (regs->ARM_cpsr & (F_BIT|I_BIT)) == 0)
115 		return 1;
116 
117 	/*
118 	 * Force CPSR to something logical...
119 	 */
120 	regs->ARM_cpsr &= (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT|0x10);
121 
122 	return 0;
123 }
124 
125 #endif	/* __KERNEL__ */
126 
127 #endif	/* __ASSEMBLY__ */
128 
129 #endif	/* CONFIG_ARM64 */
130 
131 #endif
132