| /openbmc/qemu/target/arm/ |
| H A D | cpu.h | 907 struct ArchCPU { struct
908 CPUState parent_obj;
910 CPUARMState env;
913 GHashTable *cp_regs;
921 uint64_t *cpreg_indexes;
923 uint64_t *cpreg_values;
925 int32_t cpreg_array_len;
930 uint64_t *cpreg_vmstate_indexes;
931 uint64_t *cpreg_vmstate_values;
932 int32_t cpreg_vmstate_array_len;
[all …]
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| /openbmc/qemu/target/hexagon/ |
| H A D | cpu.h | 122 struct ArchCPU { struct
140 typedef HexagonCPU ArchCPU; argument
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| /openbmc/qemu/target/loongarch/ |
| H A D | cpu.h | 410 struct ArchCPU { struct
411 CPUState parent_obj;
435 * LoongArchCPUClass: argument
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| /openbmc/qemu/target/avr/ |
| H A D | cpu.h | 151 struct ArchCPU { struct
152 CPUState parent_obj;
154 CPUAVRState env;
156 MemoryRegion cpu_reg1;
157 MemoryRegion cpu_reg2;
160 uint32_t init_sp;
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| /openbmc/qemu/target/i386/ |
| H A D | cpu.h | 2166 struct ArchCPU { struct
2167 CPUState parent_obj;
2169 CPUX86State env;
2170 VMChangeStateEntry *vmsentry;
2172 uint64_t ucode_rev;
2174 uint32_t hyperv_spinlock_attempts;
2175 char *hyperv_vendor;
2176 bool hyperv_synic_kvm_only;
2177 uint64_t hyperv_features;
2178 bool hyperv_passthrough;
[all …]
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| /openbmc/qemu/target/rx/ |
| H A D | cpu.h | 115 struct ArchCPU { struct
116 CPUState parent_obj;
118 CPURXState env;
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| /openbmc/qemu/target/microblaze/ |
| H A D | cpu.h | 342 struct ArchCPU { struct
343 CPUState parent_obj;
345 CPUMBState env;
347 bool ns_axi_dp;
348 bool ns_axi_ip;
349 bool ns_axi_dc;
350 bool ns_axi_ic;
352 MicroBlazeCPUConfig cfg;
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| /openbmc/qemu/target/riscv/ |
| H A D | cpu.h | 537 struct ArchCPU { struct
538 CPUState parent_obj;
540 CPURISCVState env;
542 GDBFeature dyn_csr_feature;
543 GDBFeature dyn_vreg_feature;
546 RISCVCPUConfig cfg;
547 RISCVSATPModes satp_modes;
549 QEMUTimer *pmu_timer;
551 uint32_t pmu_avail_ctrs;
553 GHashTable *pmu_event_ctr_map;
[all …]
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| /openbmc/qemu/target/tricore/ |
| H A D | cpu.h | 70 struct ArchCPU { struct
71 CPUState parent_obj;
73 CPUTriCoreState env;
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| /openbmc/qemu/target/hppa/ |
| H A D | cpu.h | 286 struct ArchCPU { struct
287 CPUState parent_obj;
289 CPUHPPAState env;
290 QEMUTimer *alarm_timer;
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| /openbmc/qemu/target/alpha/ |
| H A D | cpu.h | 260 struct ArchCPU { struct
261 CPUState parent_obj;
263 CPUAlphaState env;
266 QEMUTimer *alarm_timer;
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| /openbmc/qemu/target/openrisc/ |
| H A D | cpu.h | 294 struct ArchCPU { struct
295 CPUState parent_obj;
297 CPUOpenRISCState env;
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| /openbmc/qemu/target/sh4/ |
| H A D | cpu.h | 216 struct ArchCPU { struct
217 CPUState parent_obj;
219 CPUSH4State env;
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| /openbmc/qemu/target/s390x/ |
| H A D | cpu.h | 168 struct ArchCPU { struct
169 CPUState parent_obj;
171 CPUS390XState env;
172 S390CPUModel *model;
174 void *irqstate;
175 uint32_t irqstate_saved_size;
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| /openbmc/qemu/target/m68k/ |
| H A D | cpu.h | 166 struct ArchCPU { struct
167 CPUState parent_obj;
169 CPUM68KState env;
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| /openbmc/qemu/include/qemu/ |
| H A D | typedefs.h | 30 typedef struct ArchCPU ArchCPU; typedef
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| /openbmc/qemu/target/xtensa/ |
| H A D | cpu.h | 560 struct ArchCPU { struct
561 CPUState parent_obj;
563 CPUXtensaState env;
564 Clock *clock;
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| /openbmc/qemu/target/mips/ |
| H A D | cpu.h | 1204 struct ArchCPU { struct
1205 CPUState parent_obj;
1207 CPUMIPSState env;
1209 Clock *clock;
1210 Clock *count_div; /* Divider for CP0_Count clock */
1213 bool is_big_endian;
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| /openbmc/qemu/target/ppc/ |
| H A D | cpu.h | 1461 struct ArchCPU { struct
1462 CPUState parent_obj;
1464 CPUPPCState env;
1466 int vcpu_id;
1467 uint32_t compat_pvr;
1468 PPCVirtualHypervisor *vhyp;
1469 PPCVirtualHypervisorClass *vhyp_class;
1470 void *machine_data;
1471 int32_t node_id; /* NUMA node this CPU belongs to */
1472 PPCHash64Options *hash64_opts;
[all …]
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| /openbmc/qemu/target/sparc/ |
| H A D | cpu.h | 560 struct ArchCPU { struct
561 CPUState parent_obj;
563 CPUSPARCState env;
|