1 /*
2  *  Allwinner SPI Bus Serial Interface registers definition
3  *
4  *  Copyright (C) 2024 Strahinja Jankovic. <strahinja.p.jankovic@gmail.com>
5  *
6  *  This program is free software; you can redistribute it and/or modify it
7  *  under the terms of the GNU General Public License as published by the
8  *  Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful, but WITHOUT
12  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  *  FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14  *  for more details.
15  *
16  *  You should have received a copy of the GNU General Public License along
17  *  with this program; if not, see <http://www.gnu.org/licenses/>.
18  *
19  * SPDX-License-Identifier: GPL-2.0-or-later
20  */
21 
22 #ifndef ALLWINNER_A10_SPI_H
23 #define ALLWINNER_A10_SPI_H
24 
25 #include "hw/ssi/ssi.h"
26 #include "hw/sysbus.h"
27 #include "qemu/fifo8.h"
28 #include "qom/object.h"
29 
30 /** Size of register I/O address space used by SPI device */
31 #define AW_A10_SPI_IOSIZE (0x1000)
32 
33 /** Total number of known registers */
34 #define AW_A10_SPI_REGS_NUM    (AW_A10_SPI_IOSIZE / sizeof(uint32_t))
35 #define AW_A10_SPI_FIFO_SIZE   (64)
36 #define AW_A10_SPI_CS_LINES_NR (4)
37 
38 #define TYPE_AW_A10_SPI        "allwinner.spi"
39 OBJECT_DECLARE_SIMPLE_TYPE(AWA10SPIState, AW_A10_SPI)
40 
41 struct AWA10SPIState {
42     /*< private >*/
43     SysBusDevice parent_obj;
44 
45     /*< public >*/
46     MemoryRegion iomem;
47     SSIBus *bus;
48     qemu_irq irq;
49     qemu_irq cs_lines[AW_A10_SPI_CS_LINES_NR];
50 
51     uint32_t regs[AW_A10_SPI_REGS_NUM];
52 
53     Fifo8 rx_fifo;
54     Fifo8 tx_fifo;
55 };
56 
57 #endif /* ALLWINNER_A10_SPI_H */
58