1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6
7 #ifndef ATH11K_CORE_H
8 #define ATH11K_CORE_H
9
10 #include <linux/types.h>
11 #include <linux/interrupt.h>
12 #include <linux/irq.h>
13 #include <linux/bitfield.h>
14 #include <linux/dmi.h>
15 #include <linux/ctype.h>
16 #include <linux/rhashtable.h>
17 #include <linux/average.h>
18 #include "qmi.h"
19 #include "htc.h"
20 #include "wmi.h"
21 #include "hal.h"
22 #include "dp.h"
23 #include "ce.h"
24 #include "mac.h"
25 #include "hw.h"
26 #include "hal_rx.h"
27 #include "reg.h"
28 #include "thermal.h"
29 #include "dbring.h"
30 #include "spectral.h"
31 #include "wow.h"
32
33 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
34
35 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512
36
37 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
38
39 /* Pending management packets threshold for dropping probe responses */
40 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
41
42 #define ATH11K_INVALID_HW_MAC_ID 0xFF
43 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ)
44
45 /* SMBIOS type containing Board Data File Name Extension */
46 #define ATH11K_SMBIOS_BDF_EXT_TYPE 0xF8
47
48 /* SMBIOS type structure length (excluding strings-set) */
49 #define ATH11K_SMBIOS_BDF_EXT_LENGTH 0x9
50
51 /* The magic used by QCA spec */
52 #define ATH11K_SMBIOS_BDF_EXT_MAGIC "BDF_"
53
54 extern unsigned int ath11k_frame_mode;
55 extern bool ath11k_ftm_mode;
56
57 #define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ)
58
59 #define ATH11K_MON_TIMER_INTERVAL 10
60 #define ATH11K_RESET_TIMEOUT_HZ (20 * HZ)
61 #define ATH11K_RESET_MAX_FAIL_COUNT_FIRST 3
62 #define ATH11K_RESET_MAX_FAIL_COUNT_FINAL 5
63 #define ATH11K_RESET_FAIL_TIMEOUT_HZ (20 * HZ)
64 #define ATH11K_RECONFIGURE_TIMEOUT_HZ (10 * HZ)
65 #define ATH11K_RECOVER_START_TIMEOUT_HZ (20 * HZ)
66
67 enum ath11k_supported_bw {
68 ATH11K_BW_20 = 0,
69 ATH11K_BW_40 = 1,
70 ATH11K_BW_80 = 2,
71 ATH11K_BW_160 = 3,
72 };
73
74 enum ath11k_bdf_search {
75 ATH11K_BDF_SEARCH_DEFAULT,
76 ATH11K_BDF_SEARCH_BUS_AND_BOARD,
77 };
78
79 enum wme_ac {
80 WME_AC_BE,
81 WME_AC_BK,
82 WME_AC_VI,
83 WME_AC_VO,
84 WME_NUM_AC
85 };
86
87 #define ATH11K_HT_MCS_MAX 7
88 #define ATH11K_VHT_MCS_MAX 9
89 #define ATH11K_HE_MCS_MAX 11
90
91 enum ath11k_crypt_mode {
92 /* Only use hardware crypto engine */
93 ATH11K_CRYPT_MODE_HW,
94 /* Only use software crypto */
95 ATH11K_CRYPT_MODE_SW,
96 };
97
ath11k_tid_to_ac(u32 tid)98 static inline enum wme_ac ath11k_tid_to_ac(u32 tid)
99 {
100 return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
101 ((tid == 1) || (tid == 2)) ? WME_AC_BK :
102 ((tid == 4) || (tid == 5)) ? WME_AC_VI :
103 WME_AC_VO);
104 }
105
106 enum ath11k_skb_flags {
107 ATH11K_SKB_HW_80211_ENCAP = BIT(0),
108 ATH11K_SKB_CIPHER_SET = BIT(1),
109 };
110
111 struct ath11k_skb_cb {
112 dma_addr_t paddr;
113 u8 eid;
114 u8 flags;
115 u32 cipher;
116 struct ath11k *ar;
117 struct ieee80211_vif *vif;
118 } __packed;
119
120 struct ath11k_skb_rxcb {
121 dma_addr_t paddr;
122 bool is_first_msdu;
123 bool is_last_msdu;
124 bool is_continuation;
125 bool is_mcbc;
126 bool is_eapol;
127 struct hal_rx_desc *rx_desc;
128 u8 err_rel_src;
129 u8 err_code;
130 u8 mac_id;
131 u8 unmapped;
132 u8 is_frag;
133 u8 tid;
134 u16 peer_id;
135 u16 seq_no;
136 };
137
138 enum ath11k_hw_rev {
139 ATH11K_HW_IPQ8074,
140 ATH11K_HW_QCA6390_HW20,
141 ATH11K_HW_IPQ6018_HW10,
142 ATH11K_HW_QCN9074_HW10,
143 ATH11K_HW_WCN6855_HW20,
144 ATH11K_HW_WCN6855_HW21,
145 ATH11K_HW_WCN6750_HW10,
146 ATH11K_HW_IPQ5018_HW10,
147 };
148
149 enum ath11k_firmware_mode {
150 /* the default mode, standard 802.11 functionality */
151 ATH11K_FIRMWARE_MODE_NORMAL,
152
153 /* factory tests etc */
154 ATH11K_FIRMWARE_MODE_FTM,
155
156 /* Cold boot calibration */
157 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7,
158 };
159
160 extern bool ath11k_cold_boot_cal;
161
162 #define ATH11K_IRQ_NUM_MAX 52
163 #define ATH11K_EXT_IRQ_NUM_MAX 16
164
165 struct ath11k_ext_irq_grp {
166 struct ath11k_base *ab;
167 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX];
168 u32 num_irq;
169 u32 grp_id;
170 u64 timestamp;
171 bool napi_enabled;
172 struct napi_struct napi;
173 struct net_device napi_ndev;
174 };
175
176 enum ath11k_smbios_cc_type {
177 /* disable country code setting from SMBIOS */
178 ATH11K_SMBIOS_CC_DISABLE = 0,
179
180 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */
181 ATH11K_SMBIOS_CC_ISO = 1,
182
183 /* worldwide regdomain */
184 ATH11K_SMBIOS_CC_WW = 2,
185 };
186
187 struct ath11k_smbios_bdf {
188 struct dmi_header hdr;
189
190 u8 features_disabled;
191
192 /* enum ath11k_smbios_cc_type */
193 u8 country_code_flag;
194
195 /* To set specific country, you need to set country code
196 * flag=ATH11K_SMBIOS_CC_ISO first, then if country is United
197 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'=
198 * 0x53). To set country to INDONESIA, then country code value =
199 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag =
200 * ATH11K_SMBIOS_CC_WW, then you can use worldwide regulatory
201 * setting.
202 */
203 u16 cc_code;
204
205 u8 bdf_enabled;
206 u8 bdf_ext[];
207 } __packed;
208
209 #define HEHANDLE_CAP_PHYINFO_SIZE 3
210 #define HECAP_PHYINFO_SIZE 9
211 #define HECAP_MACINFO_SIZE 5
212 #define HECAP_TXRX_MCS_NSS_SIZE 2
213 #define HECAP_PPET16_PPET8_MAX_SIZE 25
214
215 #define HE_PPET16_PPET8_SIZE 8
216
217 /* 802.11ax PPE (PPDU packet Extension) threshold */
218 struct he_ppe_threshold {
219 u32 numss_m1;
220 u32 ru_mask;
221 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
222 };
223
224 struct ath11k_he {
225 u8 hecap_macinfo[HECAP_MACINFO_SIZE];
226 u32 hecap_rxmcsnssmap;
227 u32 hecap_txmcsnssmap;
228 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
229 struct he_ppe_threshold hecap_ppet;
230 u32 heop_param;
231 };
232
233 #define MAX_RADIOS 3
234
235 /* ipq5018 hw param macros */
236 #define MAX_RADIOS_5018 1
237 #define CE_CNT_5018 6
238 #define TARGET_CE_CNT_5018 9
239 #define SVC_CE_MAP_LEN_5018 17
240 #define RXDMA_PER_PDEV_5018 1
241
242 enum {
243 WMI_HOST_TP_SCALE_MAX = 0,
244 WMI_HOST_TP_SCALE_50 = 1,
245 WMI_HOST_TP_SCALE_25 = 2,
246 WMI_HOST_TP_SCALE_12 = 3,
247 WMI_HOST_TP_SCALE_MIN = 4,
248 WMI_HOST_TP_SCALE_SIZE = 5,
249 };
250
251 enum ath11k_scan_state {
252 ATH11K_SCAN_IDLE,
253 ATH11K_SCAN_STARTING,
254 ATH11K_SCAN_RUNNING,
255 ATH11K_SCAN_ABORTING,
256 };
257
258 enum ath11k_11d_state {
259 ATH11K_11D_IDLE,
260 ATH11K_11D_PREPARING,
261 ATH11K_11D_RUNNING,
262 };
263
264 enum ath11k_dev_flags {
265 ATH11K_CAC_RUNNING,
266 ATH11K_FLAG_CORE_REGISTERED,
267 ATH11K_FLAG_CRASH_FLUSH,
268 ATH11K_FLAG_RAW_MODE,
269 ATH11K_FLAG_HW_CRYPTO_DISABLED,
270 ATH11K_FLAG_BTCOEX,
271 ATH11K_FLAG_RECOVERY,
272 ATH11K_FLAG_UNREGISTERING,
273 ATH11K_FLAG_REGISTERED,
274 ATH11K_FLAG_QMI_FAIL,
275 ATH11K_FLAG_HTC_SUSPEND_COMPLETE,
276 ATH11K_FLAG_CE_IRQ_ENABLED,
277 ATH11K_FLAG_EXT_IRQ_ENABLED,
278 ATH11K_FLAG_FIXED_MEM_RGN,
279 ATH11K_FLAG_DEVICE_INIT_DONE,
280 ATH11K_FLAG_MULTI_MSI_VECTORS,
281 ATH11K_FLAG_FTM_SEGMENTED,
282 };
283
284 enum ath11k_monitor_flags {
285 ATH11K_FLAG_MONITOR_CONF_ENABLED,
286 ATH11K_FLAG_MONITOR_STARTED,
287 ATH11K_FLAG_MONITOR_VDEV_CREATED,
288 };
289
290 #define ATH11K_IPV6_UC_TYPE 0
291 #define ATH11K_IPV6_AC_TYPE 1
292
293 #define ATH11K_IPV6_MAX_COUNT 16
294 #define ATH11K_IPV4_MAX_COUNT 2
295
296 struct ath11k_arp_ns_offload {
297 u8 ipv4_addr[ATH11K_IPV4_MAX_COUNT][4];
298 u32 ipv4_count;
299 u32 ipv6_count;
300 u8 ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
301 u8 self_ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
302 u8 ipv6_type[ATH11K_IPV6_MAX_COUNT];
303 bool ipv6_valid[ATH11K_IPV6_MAX_COUNT];
304 u8 mac_addr[ETH_ALEN];
305 };
306
307 struct ath11k_rekey_data {
308 u8 kck[NL80211_KCK_LEN];
309 u8 kek[NL80211_KCK_LEN];
310 u64 replay_ctr;
311 bool enable_offload;
312 };
313
314 struct ath11k_vif {
315 u32 vdev_id;
316 enum wmi_vdev_type vdev_type;
317 enum wmi_vdev_subtype vdev_subtype;
318 u32 beacon_interval;
319 u32 dtim_period;
320 u16 ast_hash;
321 u16 ast_idx;
322 u16 tcl_metadata;
323 u8 hal_addr_search_flags;
324 u8 search_type;
325
326 struct ath11k *ar;
327 struct ieee80211_vif *vif;
328
329 u16 tx_seq_no;
330 struct wmi_wmm_params_all_arg wmm_params;
331 struct list_head list;
332 union {
333 struct {
334 u32 uapsd;
335 } sta;
336 struct {
337 /* 127 stations; wmi limit */
338 u8 tim_bitmap[16];
339 u8 tim_len;
340 u32 ssid_len;
341 u8 ssid[IEEE80211_MAX_SSID_LEN];
342 bool hidden_ssid;
343 /* P2P_IE with NoA attribute for P2P_GO case */
344 u32 noa_len;
345 u8 *noa_data;
346 } ap;
347 } u;
348
349 bool is_started;
350 bool is_up;
351 bool ftm_responder;
352 bool spectral_enabled;
353 bool ps;
354 u32 aid;
355 u8 bssid[ETH_ALEN];
356 struct cfg80211_bitrate_mask bitrate_mask;
357 struct delayed_work connection_loss_work;
358 int num_legacy_stations;
359 int rtscts_prot_mode;
360 int txpower;
361 bool rsnie_present;
362 bool wpaie_present;
363 bool bcca_zero_sent;
364 bool do_not_send_tmpl;
365 struct ieee80211_chanctx_conf chanctx;
366 struct ath11k_arp_ns_offload arp_ns_offload;
367 struct ath11k_rekey_data rekey_data;
368
369 #ifdef CONFIG_ATH11K_DEBUGFS
370 struct dentry *debugfs_twt;
371 #endif /* CONFIG_ATH11K_DEBUGFS */
372 };
373
374 struct ath11k_vif_iter {
375 u32 vdev_id;
376 struct ath11k_vif *arvif;
377 };
378
379 struct ath11k_rx_peer_stats {
380 u64 num_msdu;
381 u64 num_mpdu_fcs_ok;
382 u64 num_mpdu_fcs_err;
383 u64 tcp_msdu_count;
384 u64 udp_msdu_count;
385 u64 other_msdu_count;
386 u64 ampdu_msdu_count;
387 u64 non_ampdu_msdu_count;
388 u64 stbc_count;
389 u64 beamformed_count;
390 u64 mcs_count[HAL_RX_MAX_MCS + 1];
391 u64 nss_count[HAL_RX_MAX_NSS];
392 u64 bw_count[HAL_RX_BW_MAX];
393 u64 gi_count[HAL_RX_GI_MAX];
394 u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
395 u64 tid_count[IEEE80211_NUM_TIDS + 1];
396 u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
397 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
398 u64 rx_duration;
399 u64 dcm_count;
400 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
401 };
402
403 #define ATH11K_HE_MCS_NUM 12
404 #define ATH11K_VHT_MCS_NUM 10
405 #define ATH11K_BW_NUM 4
406 #define ATH11K_NSS_NUM 4
407 #define ATH11K_LEGACY_NUM 12
408 #define ATH11K_GI_NUM 4
409 #define ATH11K_HT_MCS_NUM 32
410
411 enum ath11k_pkt_rx_err {
412 ATH11K_PKT_RX_ERR_FCS,
413 ATH11K_PKT_RX_ERR_TKIP,
414 ATH11K_PKT_RX_ERR_CRYPT,
415 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL,
416 ATH11K_PKT_RX_ERR_MAX,
417 };
418
419 enum ath11k_ampdu_subfrm_num {
420 ATH11K_AMPDU_SUBFRM_NUM_10,
421 ATH11K_AMPDU_SUBFRM_NUM_20,
422 ATH11K_AMPDU_SUBFRM_NUM_30,
423 ATH11K_AMPDU_SUBFRM_NUM_40,
424 ATH11K_AMPDU_SUBFRM_NUM_50,
425 ATH11K_AMPDU_SUBFRM_NUM_60,
426 ATH11K_AMPDU_SUBFRM_NUM_MORE,
427 ATH11K_AMPDU_SUBFRM_NUM_MAX,
428 };
429
430 enum ath11k_amsdu_subfrm_num {
431 ATH11K_AMSDU_SUBFRM_NUM_1,
432 ATH11K_AMSDU_SUBFRM_NUM_2,
433 ATH11K_AMSDU_SUBFRM_NUM_3,
434 ATH11K_AMSDU_SUBFRM_NUM_4,
435 ATH11K_AMSDU_SUBFRM_NUM_MORE,
436 ATH11K_AMSDU_SUBFRM_NUM_MAX,
437 };
438
439 enum ath11k_counter_type {
440 ATH11K_COUNTER_TYPE_BYTES,
441 ATH11K_COUNTER_TYPE_PKTS,
442 ATH11K_COUNTER_TYPE_MAX,
443 };
444
445 enum ath11k_stats_type {
446 ATH11K_STATS_TYPE_SUCC,
447 ATH11K_STATS_TYPE_FAIL,
448 ATH11K_STATS_TYPE_RETRY,
449 ATH11K_STATS_TYPE_AMPDU,
450 ATH11K_STATS_TYPE_MAX,
451 };
452
453 struct ath11k_htt_data_stats {
454 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM];
455 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM];
456 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM];
457 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM];
458 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM];
459 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM];
460 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM];
461 };
462
463 struct ath11k_htt_tx_stats {
464 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX];
465 u64 tx_duration;
466 u64 ba_fails;
467 u64 ack_fails;
468 };
469
470 struct ath11k_per_ppdu_tx_stats {
471 u16 succ_pkts;
472 u16 failed_pkts;
473 u16 retry_pkts;
474 u32 succ_bytes;
475 u32 failed_bytes;
476 u32 retry_bytes;
477 };
478
479 DECLARE_EWMA(avg_rssi, 10, 8)
480
481 struct ath11k_sta {
482 struct ath11k_vif *arvif;
483
484 /* the following are protected by ar->data_lock */
485 u32 changed; /* IEEE80211_RC_* */
486 u32 bw;
487 u32 nss;
488 u32 smps;
489 enum hal_pn_type pn_type;
490
491 struct work_struct update_wk;
492 struct work_struct set_4addr_wk;
493 struct rate_info txrate;
494 u32 peer_nss;
495 struct rate_info last_txrate;
496 u64 rx_duration;
497 u64 tx_duration;
498 u8 rssi_comb;
499 struct ewma_avg_rssi avg_rssi;
500 s8 rssi_beacon;
501 s8 chain_signal[IEEE80211_MAX_CHAINS];
502 struct ath11k_htt_tx_stats *tx_stats;
503 struct ath11k_rx_peer_stats *rx_stats;
504
505 #ifdef CONFIG_MAC80211_DEBUGFS
506 /* protected by conf_mutex */
507 bool aggr_mode;
508 #endif
509
510 bool use_4addr_set;
511 u16 tcl_metadata;
512
513 /* Protected with ar->data_lock */
514 enum ath11k_wmi_peer_ps_state peer_ps_state;
515 u64 ps_start_time;
516 u64 ps_start_jiffies;
517 u64 ps_total_duration;
518 bool peer_current_ps_valid;
519
520 u32 bw_prev;
521 };
522
523 #define ATH11K_MIN_5G_FREQ 4150
524 #define ATH11K_MIN_6G_FREQ 5925
525 #define ATH11K_MAX_6G_FREQ 7115
526 #define ATH11K_NUM_CHANS 102
527 #define ATH11K_MAX_5G_CHAN 177
528
529 enum ath11k_state {
530 ATH11K_STATE_OFF,
531 ATH11K_STATE_ON,
532 ATH11K_STATE_RESTARTING,
533 ATH11K_STATE_RESTARTED,
534 ATH11K_STATE_WEDGED,
535 ATH11K_STATE_FTM,
536 /* Add other states as required */
537 };
538
539 /* Antenna noise floor */
540 #define ATH11K_DEFAULT_NOISE_FLOOR -95
541
542 #define ATH11K_INVALID_RSSI_FULL -1
543
544 #define ATH11K_INVALID_RSSI_EMPTY -128
545
546 struct ath11k_fw_stats {
547 struct dentry *debugfs_fwstats;
548 u32 pdev_id;
549 u32 stats_id;
550 struct list_head pdevs;
551 struct list_head vdevs;
552 struct list_head bcn;
553 };
554
555 struct ath11k_dbg_htt_stats {
556 u8 type;
557 u8 reset;
558 struct debug_htt_stats_req *stats_req;
559 /* protects shared stats req buffer */
560 spinlock_t lock;
561 };
562
563 #define MAX_MODULE_ID_BITMAP_WORDS 16
564
565 struct ath11k_debug {
566 struct dentry *debugfs_pdev;
567 struct ath11k_dbg_htt_stats htt_stats;
568 u32 extd_tx_stats;
569 u32 extd_rx_stats;
570 u32 pktlog_filter;
571 u32 pktlog_mode;
572 u32 pktlog_peer_valid;
573 u8 pktlog_peer_addr[ETH_ALEN];
574 u32 rx_filter;
575 u32 mem_offset;
576 u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS];
577 struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX];
578 };
579
580 struct ath11k_per_peer_tx_stats {
581 u32 succ_bytes;
582 u32 retry_bytes;
583 u32 failed_bytes;
584 u16 succ_pkts;
585 u16 retry_pkts;
586 u16 failed_pkts;
587 u32 duration;
588 u8 ba_fails;
589 bool is_ampdu;
590 };
591
592 #define ATH11K_FLUSH_TIMEOUT (5 * HZ)
593 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
594
595 struct ath11k {
596 struct ath11k_base *ab;
597 struct ath11k_pdev *pdev;
598 struct ieee80211_hw *hw;
599 struct ieee80211_ops *ops;
600 struct ath11k_pdev_wmi *wmi;
601 struct ath11k_pdev_dp dp;
602 u8 mac_addr[ETH_ALEN];
603 struct ath11k_he ar_he;
604 enum ath11k_state state;
605 bool supports_6ghz;
606 struct {
607 struct completion started;
608 struct completion completed;
609 struct completion on_channel;
610 struct delayed_work timeout;
611 enum ath11k_scan_state state;
612 bool is_roc;
613 int vdev_id;
614 int roc_freq;
615 bool roc_notify;
616 } scan;
617
618 struct {
619 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
620 struct ieee80211_sband_iftype_data
621 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
622 } mac;
623
624 unsigned long dev_flags;
625 unsigned int filter_flags;
626 unsigned long monitor_flags;
627 u32 min_tx_power;
628 u32 max_tx_power;
629 u32 txpower_limit_2g;
630 u32 txpower_limit_5g;
631 u32 txpower_scale;
632 u32 power_scale;
633 u32 chan_tx_pwr;
634 u32 num_stations;
635 u32 max_num_stations;
636 /* To synchronize concurrent synchronous mac80211 callback operations,
637 * concurrent debugfs configuration and concurrent FW statistics events.
638 */
639 struct mutex conf_mutex;
640 /* protects the radio specific data like debug stats, ppdu_stats_info stats,
641 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info,
642 * channel context data, survey info, test mode data.
643 */
644 spinlock_t data_lock;
645
646 struct list_head arvifs;
647 /* should never be NULL; needed for regular htt rx */
648 struct ieee80211_channel *rx_channel;
649
650 /* valid during scan; needed for mgmt rx during scan */
651 struct ieee80211_channel *scan_channel;
652
653 u8 cfg_tx_chainmask;
654 u8 cfg_rx_chainmask;
655 u8 num_rx_chains;
656 u8 num_tx_chains;
657 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
658 u8 pdev_idx;
659 u8 lmac_id;
660
661 struct completion peer_assoc_done;
662 struct completion peer_delete_done;
663
664 int install_key_status;
665 struct completion install_key_done;
666
667 int last_wmi_vdev_start_status;
668 struct completion vdev_setup_done;
669 struct completion vdev_delete_done;
670
671 int num_peers;
672 int max_num_peers;
673 u32 num_started_vdevs;
674 u32 num_created_vdevs;
675 unsigned long long allocated_vdev_map;
676
677 struct idr txmgmt_idr;
678 /* protects txmgmt_idr data */
679 spinlock_t txmgmt_idr_lock;
680 atomic_t num_pending_mgmt_tx;
681 wait_queue_head_t txmgmt_empty_waitq;
682
683 /* cycle count is reported twice for each visited channel during scan.
684 * access protected by data_lock
685 */
686 u32 survey_last_rx_clear_count;
687 u32 survey_last_cycle_count;
688
689 /* Channel info events are expected to come in pairs without and with
690 * COMPLETE flag set respectively for each channel visit during scan.
691 *
692 * However there are deviations from this rule. This flag is used to
693 * avoid reporting garbage data.
694 */
695 bool ch_info_can_report_survey;
696 struct survey_info survey[ATH11K_NUM_CHANS];
697 struct completion bss_survey_done;
698
699 struct work_struct regd_update_work;
700
701 struct work_struct wmi_mgmt_tx_work;
702 struct sk_buff_head wmi_mgmt_tx_queue;
703
704 struct ath11k_wow wow;
705 struct completion target_suspend;
706 bool target_suspend_ack;
707 struct ath11k_per_peer_tx_stats peer_tx_stats;
708 struct list_head ppdu_stats_info;
709 u32 ppdu_stat_list_depth;
710
711 struct ath11k_per_peer_tx_stats cached_stats;
712 u32 last_ppdu_id;
713 u32 cached_ppdu_id;
714 int monitor_vdev_id;
715 struct completion fw_mode_reset;
716 u8 ftm_msgref;
717 #ifdef CONFIG_ATH11K_DEBUGFS
718 struct ath11k_debug debug;
719 #endif
720 #ifdef CONFIG_ATH11K_SPECTRAL
721 struct ath11k_spectral spectral;
722 #endif
723 bool dfs_block_radar_events;
724 struct ath11k_thermal thermal;
725 u32 vdev_id_11d_scan;
726 struct completion completed_11d_scan;
727 enum ath11k_11d_state state_11d;
728 bool regdom_set_by_user;
729 int hw_rate_code;
730 u8 twt_enabled;
731 bool nlo_enabled;
732 u8 alpha2[REG_ALPHA2_LEN + 1];
733 struct ath11k_fw_stats fw_stats;
734 struct completion fw_stats_complete;
735 bool fw_stats_done;
736
737 /* protected by conf_mutex */
738 bool ps_state_enable;
739 bool ps_timekeeper_enable;
740 };
741
742 struct ath11k_band_cap {
743 u32 phy_id;
744 u32 max_bw_supported;
745 u32 ht_cap_info;
746 u32 he_cap_info[2];
747 u32 he_mcs;
748 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
749 struct ath11k_ppe_threshold he_ppet;
750 u16 he_6ghz_capa;
751 };
752
753 struct ath11k_pdev_cap {
754 u32 supported_bands;
755 u32 ampdu_density;
756 u32 vht_cap;
757 u32 vht_mcs;
758 u32 he_mcs;
759 u32 tx_chain_mask;
760 u32 rx_chain_mask;
761 u32 tx_chain_mask_shift;
762 u32 rx_chain_mask_shift;
763 struct ath11k_band_cap band[NUM_NL80211_BANDS];
764 bool nss_ratio_enabled;
765 u8 nss_ratio_info;
766 };
767
768 struct ath11k_pdev {
769 struct ath11k *ar;
770 u32 pdev_id;
771 struct ath11k_pdev_cap cap;
772 u8 mac_addr[ETH_ALEN];
773 };
774
775 struct ath11k_board_data {
776 const struct firmware *fw;
777 const void *data;
778 size_t len;
779 };
780
781 struct ath11k_pci_ops {
782 int (*wakeup)(struct ath11k_base *ab);
783 void (*release)(struct ath11k_base *ab);
784 int (*get_msi_irq)(struct ath11k_base *ab, unsigned int vector);
785 void (*window_write32)(struct ath11k_base *ab, u32 offset, u32 value);
786 u32 (*window_read32)(struct ath11k_base *ab, u32 offset);
787 };
788
789 /* IPQ8074 HW channel counters frequency value in hertz */
790 #define IPQ8074_CC_FREQ_HERTZ 320000
791
792 struct ath11k_bp_stats {
793 /* Head Pointer reported by the last HTT Backpressure event for the ring */
794 u16 hp;
795
796 /* Tail Pointer reported by the last HTT Backpressure event for the ring */
797 u16 tp;
798
799 /* Number of Backpressure events received for the ring */
800 u32 count;
801
802 /* Last recorded event timestamp */
803 unsigned long jiffies;
804 };
805
806 struct ath11k_dp_ring_bp_stats {
807 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX];
808 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS];
809 };
810
811 struct ath11k_soc_dp_tx_err_stats {
812 /* TCL Ring Descriptor unavailable */
813 u32 desc_na[DP_TCL_NUM_RING_MAX];
814 /* Other failures during dp_tx due to mem allocation failure
815 * idr unavailable etc.
816 */
817 atomic_t misc_fail;
818 };
819
820 struct ath11k_soc_dp_stats {
821 u32 err_ring_pkts;
822 u32 invalid_rbm;
823 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
824 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
825 u32 hal_reo_error[DP_REO_DST_RING_MAX];
826 struct ath11k_soc_dp_tx_err_stats tx_err;
827 struct ath11k_dp_ring_bp_stats bp_stats;
828 };
829
830 struct ath11k_msi_user {
831 char *name;
832 int num_vectors;
833 u32 base_vector;
834 };
835
836 struct ath11k_msi_config {
837 int total_vectors;
838 int total_users;
839 struct ath11k_msi_user *users;
840 u16 hw_rev;
841 };
842
843 /* Master structure to hold the hw data which may be used in core module */
844 struct ath11k_base {
845 enum ath11k_hw_rev hw_rev;
846 enum ath11k_firmware_mode fw_mode;
847 struct platform_device *pdev;
848 struct device *dev;
849 struct ath11k_qmi qmi;
850 struct ath11k_wmi_base wmi_ab;
851 struct completion fw_ready;
852 int num_radios;
853 /* HW channel counters frequency value in hertz common to all MACs */
854 u32 cc_freq_hz;
855
856 struct ath11k_htc htc;
857
858 struct ath11k_dp dp;
859
860 void __iomem *mem;
861 void __iomem *mem_ce;
862 unsigned long mem_len;
863
864 struct {
865 enum ath11k_bus bus;
866 const struct ath11k_hif_ops *ops;
867 } hif;
868
869 struct {
870 struct completion wakeup_completed;
871 } wow;
872
873 struct ath11k_ce ce;
874 struct timer_list rx_replenish_retry;
875 struct ath11k_hal hal;
876 /* To synchronize core_start/core_stop */
877 struct mutex core_lock;
878 /* Protects data like peers */
879 spinlock_t base_lock;
880 struct ath11k_pdev pdevs[MAX_RADIOS];
881 struct {
882 enum WMI_HOST_WLAN_BAND supported_bands;
883 u32 pdev_id;
884 } target_pdev_ids[MAX_RADIOS];
885 u8 target_pdev_count;
886 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS];
887 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS];
888 unsigned long long free_vdev_map;
889
890 /* To synchronize rhash tbl write operation */
891 struct mutex tbl_mtx_lock;
892
893 /* The rhashtable containing struct ath11k_peer keyed by mac addr */
894 struct rhashtable *rhead_peer_addr;
895 struct rhashtable_params rhash_peer_addr_param;
896
897 /* The rhashtable containing struct ath11k_peer keyed by id */
898 struct rhashtable *rhead_peer_id;
899 struct rhashtable_params rhash_peer_id_param;
900
901 struct list_head peers;
902 wait_queue_head_t peer_mapping_wq;
903 u8 mac_addr[ETH_ALEN];
904 bool wmi_ready;
905 u32 wlan_init_status;
906 int irq_num[ATH11K_IRQ_NUM_MAX];
907 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX];
908 struct ath11k_targ_cap target_caps;
909 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
910 bool pdevs_macaddr_valid;
911 int bd_api;
912
913 struct ath11k_hw_params hw_params;
914
915 const struct firmware *cal_file;
916
917 /* Below regd's are protected by ab->data_lock */
918 /* This is the regd set for every radio
919 * by the firmware during initialization
920 */
921 struct ieee80211_regdomain *default_regd[MAX_RADIOS];
922 /* This regd is set during dynamic country setting
923 * This may or may not be used during the runtime
924 */
925 struct ieee80211_regdomain *new_regd[MAX_RADIOS];
926
927 /* Current DFS Regulatory */
928 enum ath11k_dfs_region dfs_region;
929 #ifdef CONFIG_ATH11K_DEBUGFS
930 struct dentry *debugfs_soc;
931 #endif
932 struct ath11k_soc_dp_stats soc_stats;
933
934 unsigned long dev_flags;
935 struct completion driver_recovery;
936 struct workqueue_struct *workqueue;
937 struct work_struct restart_work;
938 struct work_struct update_11d_work;
939 u8 new_alpha2[3];
940 struct workqueue_struct *workqueue_aux;
941 struct work_struct reset_work;
942 atomic_t reset_count;
943 atomic_t recovery_count;
944 atomic_t recovery_start_count;
945 bool is_reset;
946 struct completion reset_complete;
947 struct completion reconfigure_complete;
948 struct completion recovery_start;
949 /* continuous recovery fail count */
950 atomic_t fail_cont_count;
951 unsigned long reset_fail_timeout;
952 struct {
953 /* protected by data_lock */
954 u32 fw_crash_counter;
955 } stats;
956 u32 pktlog_defs_checksum;
957
958 struct ath11k_dbring_cap *db_caps;
959 u32 num_db_cap;
960
961 /* To synchronize 11d scan vdev id */
962 struct mutex vdev_id_11d_lock;
963 struct timer_list mon_reap_timer;
964
965 struct completion htc_suspend;
966
967 struct {
968 enum ath11k_bdf_search bdf_search;
969 u32 vendor;
970 u32 device;
971 u32 subsystem_vendor;
972 u32 subsystem_device;
973 } id;
974
975 struct {
976 struct {
977 const struct ath11k_msi_config *config;
978 u32 ep_base_data;
979 u32 irqs[32];
980 u32 addr_lo;
981 u32 addr_hi;
982 } msi;
983
984 const struct ath11k_pci_ops *ops;
985 } pci;
986
987 #ifdef CONFIG_NL80211_TESTMODE
988 struct {
989 u32 data_pos;
990 u32 expected_seq;
991 u8 *eventdata;
992 } testmode;
993 #endif
994
995 /* must be last */
996 u8 drv_priv[] __aligned(sizeof(void *));
997 };
998
999 struct ath11k_fw_stats_pdev {
1000 struct list_head list;
1001
1002 /* PDEV stats */
1003 s32 ch_noise_floor;
1004 /* Cycles spent transmitting frames */
1005 u32 tx_frame_count;
1006 /* Cycles spent receiving frames */
1007 u32 rx_frame_count;
1008 /* Total channel busy time, evidently */
1009 u32 rx_clear_count;
1010 /* Total on-channel time */
1011 u32 cycle_count;
1012 u32 phy_err_count;
1013 u32 chan_tx_power;
1014 u32 ack_rx_bad;
1015 u32 rts_bad;
1016 u32 rts_good;
1017 u32 fcs_bad;
1018 u32 no_beacons;
1019 u32 mib_int_count;
1020
1021 /* PDEV TX stats */
1022 /* Num HTT cookies queued to dispatch list */
1023 s32 comp_queued;
1024 /* Num HTT cookies dispatched */
1025 s32 comp_delivered;
1026 /* Num MSDU queued to WAL */
1027 s32 msdu_enqued;
1028 /* Num MPDU queue to WAL */
1029 s32 mpdu_enqued;
1030 /* Num MSDUs dropped by WMM limit */
1031 s32 wmm_drop;
1032 /* Num Local frames queued */
1033 s32 local_enqued;
1034 /* Num Local frames done */
1035 s32 local_freed;
1036 /* Num queued to HW */
1037 s32 hw_queued;
1038 /* Num PPDU reaped from HW */
1039 s32 hw_reaped;
1040 /* Num underruns */
1041 s32 underrun;
1042 /* Num hw paused */
1043 u32 hw_paused;
1044 /* Num PPDUs cleaned up in TX abort */
1045 s32 tx_abort;
1046 /* Num MPDUs requeued by SW */
1047 s32 mpdus_requeued;
1048 /* excessive retries */
1049 u32 tx_ko;
1050 u32 tx_xretry;
1051 /* data hw rate code */
1052 u32 data_rc;
1053 /* Scheduler self triggers */
1054 u32 self_triggers;
1055 /* frames dropped due to excessive sw retries */
1056 u32 sw_retry_failure;
1057 /* illegal rate phy errors */
1058 u32 illgl_rate_phy_err;
1059 /* wal pdev continuous xretry */
1060 u32 pdev_cont_xretry;
1061 /* wal pdev tx timeouts */
1062 u32 pdev_tx_timeout;
1063 /* wal pdev resets */
1064 u32 pdev_resets;
1065 /* frames dropped due to non-availability of stateless TIDs */
1066 u32 stateless_tid_alloc_failure;
1067 /* PhY/BB underrun */
1068 u32 phy_underrun;
1069 /* MPDU is more than txop limit */
1070 u32 txop_ovf;
1071 /* Num sequences posted */
1072 u32 seq_posted;
1073 /* Num sequences failed in queueing */
1074 u32 seq_failed_queueing;
1075 /* Num sequences completed */
1076 u32 seq_completed;
1077 /* Num sequences restarted */
1078 u32 seq_restarted;
1079 /* Num of MU sequences posted */
1080 u32 mu_seq_posted;
1081 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT
1082 * (Reset,channel change)
1083 */
1084 s32 mpdus_sw_flush;
1085 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */
1086 s32 mpdus_hw_filter;
1087 /* Num MPDUs truncated by PDG (TXOP, TBTT,
1088 * PPDU_duration based on rate, dyn_bw)
1089 */
1090 s32 mpdus_truncated;
1091 /* Num MPDUs that was tried but didn't receive ACK or BA */
1092 s32 mpdus_ack_failed;
1093 /* Num MPDUs that was dropped du to expiry. */
1094 s32 mpdus_expired;
1095
1096 /* PDEV RX stats */
1097 /* Cnts any change in ring routing mid-ppdu */
1098 s32 mid_ppdu_route_change;
1099 /* Total number of statuses processed */
1100 s32 status_rcvd;
1101 /* Extra frags on rings 0-3 */
1102 s32 r0_frags;
1103 s32 r1_frags;
1104 s32 r2_frags;
1105 s32 r3_frags;
1106 /* MSDUs / MPDUs delivered to HTT */
1107 s32 htt_msdus;
1108 s32 htt_mpdus;
1109 /* MSDUs / MPDUs delivered to local stack */
1110 s32 loc_msdus;
1111 s32 loc_mpdus;
1112 /* AMSDUs that have more MSDUs than the status ring size */
1113 s32 oversize_amsdu;
1114 /* Number of PHY errors */
1115 s32 phy_errs;
1116 /* Number of PHY errors drops */
1117 s32 phy_err_drop;
1118 /* Number of mpdu errors - FCS, MIC, ENC etc. */
1119 s32 mpdu_errs;
1120 /* Num overflow errors */
1121 s32 rx_ovfl_errs;
1122 };
1123
1124 struct ath11k_fw_stats_vdev {
1125 struct list_head list;
1126
1127 u32 vdev_id;
1128 u32 beacon_snr;
1129 u32 data_snr;
1130 u32 num_tx_frames[WLAN_MAX_AC];
1131 u32 num_rx_frames;
1132 u32 num_tx_frames_retries[WLAN_MAX_AC];
1133 u32 num_tx_frames_failures[WLAN_MAX_AC];
1134 u32 num_rts_fail;
1135 u32 num_rts_success;
1136 u32 num_rx_err;
1137 u32 num_rx_discard;
1138 u32 num_tx_not_acked;
1139 u32 tx_rate_history[MAX_TX_RATE_VALUES];
1140 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
1141 };
1142
1143 struct ath11k_fw_stats_bcn {
1144 struct list_head list;
1145
1146 u32 vdev_id;
1147 u32 tx_bcn_succ_cnt;
1148 u32 tx_bcn_outage_cnt;
1149 };
1150
1151 void ath11k_fw_stats_init(struct ath11k *ar);
1152 void ath11k_fw_stats_pdevs_free(struct list_head *head);
1153 void ath11k_fw_stats_vdevs_free(struct list_head *head);
1154 void ath11k_fw_stats_bcn_free(struct list_head *head);
1155 void ath11k_fw_stats_free(struct ath11k_fw_stats *stats);
1156
1157 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[];
1158 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[];
1159 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[];
1160
1161 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[];
1162 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[];
1163
1164 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq5018[];
1165 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq5018[];
1166
1167 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[];
1168 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[];
1169 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab);
1170 int ath11k_core_pre_init(struct ath11k_base *ab);
1171 int ath11k_core_init(struct ath11k_base *ath11k);
1172 void ath11k_core_deinit(struct ath11k_base *ath11k);
1173 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
1174 enum ath11k_bus bus);
1175 void ath11k_core_free(struct ath11k_base *ath11k);
1176 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k,
1177 struct ath11k_board_data *bd);
1178 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd);
1179 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab,
1180 struct ath11k_board_data *bd,
1181 const char *name);
1182 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd);
1183 int ath11k_core_check_dt(struct ath11k_base *ath11k);
1184 int ath11k_core_check_smbios(struct ath11k_base *ab);
1185 void ath11k_core_halt(struct ath11k *ar);
1186 int ath11k_core_resume(struct ath11k_base *ab);
1187 int ath11k_core_suspend(struct ath11k_base *ab);
1188 void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab);
1189 bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab);
1190
1191 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
1192 const char *filename);
1193
ath11k_scan_state_str(enum ath11k_scan_state state)1194 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state)
1195 {
1196 switch (state) {
1197 case ATH11K_SCAN_IDLE:
1198 return "idle";
1199 case ATH11K_SCAN_STARTING:
1200 return "starting";
1201 case ATH11K_SCAN_RUNNING:
1202 return "running";
1203 case ATH11K_SCAN_ABORTING:
1204 return "aborting";
1205 }
1206
1207 return "unknown";
1208 }
1209
ATH11K_SKB_CB(struct sk_buff * skb)1210 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb)
1211 {
1212 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) >
1213 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
1214 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
1215 }
1216
ATH11K_SKB_RXCB(struct sk_buff * skb)1217 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb)
1218 {
1219 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb));
1220 return (struct ath11k_skb_rxcb *)skb->cb;
1221 }
1222
ath11k_vif_to_arvif(struct ieee80211_vif * vif)1223 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif)
1224 {
1225 return (struct ath11k_vif *)vif->drv_priv;
1226 }
1227
ath11k_ab_to_ar(struct ath11k_base * ab,int mac_id)1228 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab,
1229 int mac_id)
1230 {
1231 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
1232 }
1233
ath11k_core_create_firmware_path(struct ath11k_base * ab,const char * filename,void * buf,size_t buf_len)1234 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab,
1235 const char *filename,
1236 void *buf, size_t buf_len)
1237 {
1238 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,
1239 ab->hw_params.fw.dir, filename);
1240 }
1241
ath11k_bus_str(enum ath11k_bus bus)1242 static inline const char *ath11k_bus_str(enum ath11k_bus bus)
1243 {
1244 switch (bus) {
1245 case ATH11K_BUS_PCI:
1246 return "pci";
1247 case ATH11K_BUS_AHB:
1248 return "ahb";
1249 }
1250
1251 return "unknown";
1252 }
1253
1254 #endif /* _CORE_H_ */
1255