1 /*
2  * Copyright 2012 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 
24 #ifndef AMD_ACPI_H
25 #define AMD_ACPI_H
26 
27 #define ACPI_AC_CLASS           "ac_adapter"
28 
29 struct atif_verify_interface {
30 	u16 size;		/* structure size in bytes (includes size field) */
31 	u16 version;		/* version */
32 	u32 notification_mask;	/* supported notifications mask */
33 	u32 function_bits;	/* supported functions bit vector */
34 } __packed;
35 
36 struct atif_system_params {
37 	u16 size;		/* structure size in bytes (includes size field) */
38 	u32 valid_mask;		/* valid flags mask */
39 	u32 flags;		/* flags */
40 	u8 command_code;	/* notify command code */
41 } __packed;
42 
43 struct atif_sbios_requests {
44 	u16 size;		/* structure size in bytes (includes size field) */
45 	u32 pending;		/* pending sbios requests */
46 	u8 panel_exp_mode;	/* panel expansion mode */
47 	u8 thermal_gfx;		/* thermal state: target gfx controller */
48 	u8 thermal_state;	/* thermal state: state id (0: exit state, non-0: state) */
49 	u8 forced_power_gfx;	/* forced power state: target gfx controller */
50 	u8 forced_power_state;	/* forced power state: state id */
51 	u8 system_power_src;	/* system power source */
52 	u8 backlight_level;	/* panel backlight level (0-255) */
53 } __packed;
54 
55 struct atif_qbtc_arguments {
56 	u16 size;		/* structure size in bytes (includes size field) */
57 	u8 requested_display;	/* which display is requested */
58 } __packed;
59 
60 #define ATIF_QBTC_MAX_DATA_POINTS 99
61 
62 struct atif_qbtc_data_point {
63 	u8 luminance;		/* luminance in percent */
64 	u8 ipnut_signal;	/* input signal in range 0-255 */
65 } __packed;
66 
67 struct atif_qbtc_output {
68 	u16 size;		/* structure size in bytes (includes size field) */
69 	u16 flags;		/* all zeroes */
70 	u8 error_code;		/* error code */
71 	u8 ac_level;		/* default brightness on AC power */
72 	u8 dc_level;		/* default brightness on DC power */
73 	u8 min_input_signal;	/* max input signal in range 0-255 */
74 	u8 max_input_signal;	/* min input signal in range 0-255 */
75 	u8 number_of_points;	/* number of data points */
76 	struct atif_qbtc_data_point data_points[ATIF_QBTC_MAX_DATA_POINTS];
77 } __packed;
78 
79 #define ATIF_NOTIFY_MASK	0x3
80 #define ATIF_NOTIFY_NONE	0
81 #define ATIF_NOTIFY_81		1
82 #define ATIF_NOTIFY_N		2
83 
84 struct atcs_verify_interface {
85 	u16 size;		/* structure size in bytes (includes size field) */
86 	u16 version;		/* version */
87 	u32 function_bits;	/* supported functions bit vector */
88 } __packed;
89 
90 #define ATCS_VALID_FLAGS_MASK	0x3
91 
92 struct atcs_pref_req_input {
93 	u16 size;		/* structure size in bytes (includes size field) */
94 	u16 client_id;		/* client id (bit 2-0: func num, 7-3: dev num, 15-8: bus num) */
95 	u16 valid_flags_mask;	/* valid flags mask */
96 	u16 flags;		/* flags */
97 	u8 req_type;		/* request type */
98 	u8 perf_req;		/* performance request */
99 } __packed;
100 
101 struct atcs_pref_req_output {
102 	u16 size;		/* structure size in bytes (includes size field) */
103 	u8 ret_val;		/* return value */
104 } __packed;
105 
106 struct atcs_pwr_shift_input {
107 	u16 size;		/* structure size in bytes (includes size field) */
108 	u16 dgpu_id;		/* client id (bit 2-0: func num, 7-3: dev num, 15-8: bus num) */
109 	u8 dev_acpi_state;	/* D0 = 0, D3 hot = 3 */
110 	u8 drv_state;	/* 0 = operational, 1 = not operational */
111 } __packed;
112 
113 /* AMD hw uses four ACPI control methods:
114  * 1. ATIF
115  * ARG0: (ACPI_INTEGER) function code
116  * ARG1: (ACPI_BUFFER) parameter buffer, 256 bytes
117  * OUTPUT: (ACPI_BUFFER) output buffer, 256 bytes
118  * ATIF provides an entry point for the gfx driver to interact with the sbios.
119  * The AMD ACPI notification mechanism uses Notify (VGA, 0x81) or a custom
120  * notification. Which notification is used as indicated by the ATIF Control
121  * Method GET_SYSTEM_PARAMETERS. When the driver receives Notify (VGA, 0x81) or
122  * a custom notification it invokes ATIF Control Method GET_SYSTEM_BIOS_REQUESTS
123  * to identify pending System BIOS requests and associated parameters. For
124  * example, if one of the pending requests is DISPLAY_SWITCH_REQUEST, the driver
125  * will perform display device detection and invoke ATIF Control Method
126  * SELECT_ACTIVE_DISPLAYS.
127  *
128  * 2. ATPX
129  * ARG0: (ACPI_INTEGER) function code
130  * ARG1: (ACPI_BUFFER) parameter buffer, 256 bytes
131  * OUTPUT: (ACPI_BUFFER) output buffer, 256 bytes
132  * ATPX methods are used on PowerXpress systems to handle mux switching and
133  * discrete GPU power control.
134  *
135  * 3. ATRM
136  * ARG0: (ACPI_INTEGER) offset of vbios rom data
137  * ARG1: (ACPI_BUFFER) size of the buffer to fill (up to 4K).
138  * OUTPUT: (ACPI_BUFFER) output buffer
139  * ATRM provides an interfacess to access the discrete GPU vbios image on
140  * PowerXpress systems with multiple GPUs.
141  *
142  * 4. ATCS
143  * ARG0: (ACPI_INTEGER) function code
144  * ARG1: (ACPI_BUFFER) parameter buffer, 256 bytes
145  * OUTPUT: (ACPI_BUFFER) output buffer, 256 bytes
146  * ATCS provides an interface to AMD chipset specific functionality.
147  *
148  */
149 /* ATIF */
150 #define ATIF_FUNCTION_VERIFY_INTERFACE                             0x0
151 /* ARG0: ATIF_FUNCTION_VERIFY_INTERFACE
152  * ARG1: none
153  * OUTPUT:
154  * WORD  - structure size in bytes (includes size field)
155  * WORD  - version
156  * DWORD - supported notifications mask
157  * DWORD - supported functions bit vector
158  */
159 /* Notifications mask */
160 #       define ATIF_THERMAL_STATE_CHANGE_REQUEST_SUPPORTED         (1 << 2)
161 #       define ATIF_FORCED_POWER_STATE_CHANGE_REQUEST_SUPPORTED    (1 << 3)
162 #       define ATIF_SYSTEM_POWER_SOURCE_CHANGE_REQUEST_SUPPORTED   (1 << 4)
163 #       define ATIF_PANEL_BRIGHTNESS_CHANGE_REQUEST_SUPPORTED      (1 << 7)
164 #       define ATIF_DGPU_DISPLAY_EVENT_SUPPORTED                   (1 << 8)
165 #       define ATIF_GPU_PACKAGE_POWER_LIMIT_REQUEST_SUPPORTED      (1 << 12)
166 /* supported functions vector */
167 #       define ATIF_GET_SYSTEM_PARAMETERS_SUPPORTED               (1 << 0)
168 #       define ATIF_GET_SYSTEM_BIOS_REQUESTS_SUPPORTED            (1 << 1)
169 #       define ATIF_TEMPERATURE_CHANGE_NOTIFICATION_SUPPORTED     (1 << 12)
170 #       define ATIF_QUERY_BACKLIGHT_TRANSFER_CHARACTERISTICS_SUPPORTED (1 << 15)
171 #       define ATIF_READY_TO_UNDOCK_NOTIFICATION_SUPPORTED        (1 << 16)
172 #       define ATIF_GET_EXTERNAL_GPU_INFORMATION_SUPPORTED        (1 << 20)
173 #define ATIF_FUNCTION_GET_SYSTEM_PARAMETERS                        0x1
174 /* ARG0: ATIF_FUNCTION_GET_SYSTEM_PARAMETERS
175  * ARG1: none
176  * OUTPUT:
177  * WORD  - structure size in bytes (includes size field)
178  * DWORD - valid flags mask
179  * DWORD - flags
180  *
181  * OR
182  *
183  * WORD  - structure size in bytes (includes size field)
184  * DWORD - valid flags mask
185  * DWORD - flags
186  * BYTE  - notify command code
187  *
188  * flags
189  * bits 1:0:
190  * 0 - Notify(VGA, 0x81) is not used for notification
191  * 1 - Notify(VGA, 0x81) is used for notification
192  * 2 - Notify(VGA, n) is used for notification where
193  * n (0xd0-0xd9) is specified in notify command code.
194  * bit 2:
195  * 1 - lid changes not reported though int10
196  * bit 3:
197  * 1 - system bios controls overclocking
198  * bit 4:
199  * 1 - enable overclocking
200  */
201 #define ATIF_FUNCTION_GET_SYSTEM_BIOS_REQUESTS                     0x2
202 /* ARG0: ATIF_FUNCTION_GET_SYSTEM_BIOS_REQUESTS
203  * ARG1: none
204  * OUTPUT:
205  * WORD  - structure size in bytes (includes size field)
206  * DWORD - pending sbios requests
207  * BYTE  - reserved (all zeroes)
208  * BYTE  - thermal state: target gfx controller
209  * BYTE  - thermal state: state id (0: exit state, non-0: state)
210  * BYTE  - forced power state: target gfx controller
211  * BYTE  - forced power state: state id (0: forced state, non-0: state)
212  * BYTE  - system power source
213  * BYTE  - panel backlight level (0-255)
214  * BYTE  - GPU package power limit: target gfx controller
215  * DWORD - GPU package power limit: value (24:8 fractional format, Watts)
216  */
217 /* pending sbios requests */
218 #       define ATIF_THERMAL_STATE_CHANGE_REQUEST                   (1 << 2)
219 #       define ATIF_FORCED_POWER_STATE_CHANGE_REQUEST              (1 << 3)
220 #       define ATIF_SYSTEM_POWER_SOURCE_CHANGE_REQUEST             (1 << 4)
221 #       define ATIF_PANEL_BRIGHTNESS_CHANGE_REQUEST                (1 << 7)
222 #       define ATIF_DGPU_DISPLAY_EVENT                             (1 << 8)
223 #       define ATIF_GPU_PACKAGE_POWER_LIMIT_REQUEST                (1 << 12)
224 /* target gfx controller */
225 #       define ATIF_TARGET_GFX_SINGLE                              0
226 #       define ATIF_TARGET_GFX_PX_IGPU                             1
227 #       define ATIF_TARGET_GFX_PX_DGPU                             2
228 /* system power source */
229 #       define ATIF_POWER_SOURCE_AC                                1
230 #       define ATIF_POWER_SOURCE_DC                                2
231 #       define ATIF_POWER_SOURCE_RESTRICTED_AC_1                   3
232 #       define ATIF_POWER_SOURCE_RESTRICTED_AC_2                   4
233 #define ATIF_FUNCTION_TEMPERATURE_CHANGE_NOTIFICATION              0xD
234 /* ARG0: ATIF_FUNCTION_TEMPERATURE_CHANGE_NOTIFICATION
235  * ARG1:
236  * WORD  - structure size in bytes (includes size field)
237  * WORD  - gfx controller id
238  * BYTE  - current temperature (degress Celsius)
239  * OUTPUT: none
240  */
241 #define ATIF_FUNCTION_QUERY_BRIGHTNESS_TRANSFER_CHARACTERISTICS    0x10
242 /* ARG0: ATIF_FUNCTION_QUERY_BRIGHTNESS_TRANSFER_CHARACTERISTICS
243  * ARG1:
244  * WORD  - structure size in bytes (includes size field)
245  * BYTE  - requested display
246  * OUTPUT:
247  * WORD  - structure size in bytes (includes size field)
248  * WORD  - flags (currently all 16 bits are reserved)
249  * BYTE  - error code (on failure, disregard all below fields)
250  * BYTE  - AC level (default brightness in percent when machine has full power)
251  * BYTE  - DC level (default brightness in percent when machine is on battery)
252  * BYTE  - min input signal, in range 0-255, corresponding to 0% backlight
253  * BYTE  - max input signal, in range 0-255, corresponding to 100% backlight
254  * BYTE  - number of reported data points
255  * BYTE  - luminance level in percent  \ repeated structure
256  * BYTE  - input signal in range 0-255 / does not have entries for 0% and 100%
257  */
258 /* requested display */
259 #       define ATIF_QBTC_REQUEST_LCD1                              0
260 #       define ATIF_QBTC_REQUEST_CRT1                              1
261 #       define ATIF_QBTC_REQUEST_DFP1                              3
262 #       define ATIF_QBTC_REQUEST_CRT2                              4
263 #       define ATIF_QBTC_REQUEST_LCD2                              5
264 #       define ATIF_QBTC_REQUEST_DFP2                              7
265 #       define ATIF_QBTC_REQUEST_DFP3                              9
266 #       define ATIF_QBTC_REQUEST_DFP4                              10
267 #       define ATIF_QBTC_REQUEST_DFP5                              11
268 #       define ATIF_QBTC_REQUEST_DFP6                              12
269 /* error code */
270 #       define ATIF_QBTC_ERROR_CODE_SUCCESS                        0
271 #       define ATIF_QBTC_ERROR_CODE_FAILURE                        1
272 #       define ATIF_QBTC_ERROR_CODE_DEVICE_NOT_SUPPORTED           2
273 #define ATIF_FUNCTION_READY_TO_UNDOCK_NOTIFICATION                 0x11
274 /* ARG0: ATIF_FUNCTION_READY_TO_UNDOCK_NOTIFICATION
275  * ARG1: none
276  * OUTPUT: none
277  */
278 #define ATIF_FUNCTION_GET_EXTERNAL_GPU_INFORMATION                 0x15
279 /* ARG0: ATIF_FUNCTION_GET_EXTERNAL_GPU_INFORMATION
280  * ARG1: none
281  * OUTPUT:
282  * WORD  - number of reported external gfx devices
283  * WORD  - device structure size in bytes (excludes device size field)
284  * WORD  - flags         \
285  * WORD  - bus number    / repeated structure
286  */
287 /* flags */
288 #       define ATIF_EXTERNAL_GRAPHICS_PORT                         (1 << 0)
289 
290 /* ATPX */
291 #define ATPX_FUNCTION_VERIFY_INTERFACE                             0x0
292 /* ARG0: ATPX_FUNCTION_VERIFY_INTERFACE
293  * ARG1: none
294  * OUTPUT:
295  * WORD  - structure size in bytes (includes size field)
296  * WORD  - version
297  * DWORD - supported functions bit vector
298  */
299 /* supported functions vector */
300 #       define ATPX_GET_PX_PARAMETERS_SUPPORTED                    (1 << 0)
301 #       define ATPX_POWER_CONTROL_SUPPORTED                        (1 << 1)
302 #       define ATPX_DISPLAY_MUX_CONTROL_SUPPORTED                  (1 << 2)
303 #       define ATPX_I2C_MUX_CONTROL_SUPPORTED                      (1 << 3)
304 #       define ATPX_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION_SUPPORTED (1 << 4)
305 #       define ATPX_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION_SUPPORTED   (1 << 5)
306 #       define ATPX_GET_DISPLAY_CONNECTORS_MAPPING_SUPPORTED       (1 << 7)
307 #       define ATPX_GET_DISPLAY_DETECTION_PORTS_SUPPORTED          (1 << 8)
308 #define ATPX_FUNCTION_GET_PX_PARAMETERS                            0x1
309 /* ARG0: ATPX_FUNCTION_GET_PX_PARAMETERS
310  * ARG1: none
311  * OUTPUT:
312  * WORD  - structure size in bytes (includes size field)
313  * DWORD - valid flags mask
314  * DWORD - flags
315  */
316 /* flags */
317 #       define ATPX_LVDS_I2C_AVAILABLE_TO_BOTH_GPUS                (1 << 0)
318 #       define ATPX_CRT1_I2C_AVAILABLE_TO_BOTH_GPUS                (1 << 1)
319 #       define ATPX_DVI1_I2C_AVAILABLE_TO_BOTH_GPUS                (1 << 2)
320 #       define ATPX_CRT1_RGB_SIGNAL_MUXED                          (1 << 3)
321 #       define ATPX_TV_SIGNAL_MUXED                                (1 << 4)
322 #       define ATPX_DFP_SIGNAL_MUXED                               (1 << 5)
323 #       define ATPX_SEPARATE_MUX_FOR_I2C                           (1 << 6)
324 #       define ATPX_DYNAMIC_PX_SUPPORTED                           (1 << 7)
325 #       define ATPX_ACF_NOT_SUPPORTED                              (1 << 8)
326 #       define ATPX_FIXED_NOT_SUPPORTED                            (1 << 9)
327 #       define ATPX_DYNAMIC_DGPU_POWER_OFF_SUPPORTED               (1 << 10)
328 #       define ATPX_DGPU_REQ_POWER_FOR_DISPLAYS                    (1 << 11)
329 #       define ATPX_DGPU_CAN_DRIVE_DISPLAYS                        (1 << 12)
330 #       define ATPX_MS_HYBRID_GFX_SUPPORTED                        (1 << 14)
331 #define ATPX_FUNCTION_POWER_CONTROL                                0x2
332 /* ARG0: ATPX_FUNCTION_POWER_CONTROL
333  * ARG1:
334  * WORD  - structure size in bytes (includes size field)
335  * BYTE  - dGPU power state (0: power off, 1: power on)
336  * OUTPUT: none
337  */
338 #define ATPX_FUNCTION_DISPLAY_MUX_CONTROL                          0x3
339 /* ARG0: ATPX_FUNCTION_DISPLAY_MUX_CONTROL
340  * ARG1:
341  * WORD  - structure size in bytes (includes size field)
342  * WORD  - display mux control (0: iGPU, 1: dGPU)
343  * OUTPUT: none
344  */
345 #       define ATPX_INTEGRATED_GPU                                 0
346 #       define ATPX_DISCRETE_GPU                                   1
347 #define ATPX_FUNCTION_I2C_MUX_CONTROL                              0x4
348 /* ARG0: ATPX_FUNCTION_I2C_MUX_CONTROL
349  * ARG1:
350  * WORD  - structure size in bytes (includes size field)
351  * WORD  - i2c/aux/hpd mux control (0: iGPU, 1: dGPU)
352  * OUTPUT: none
353  */
354 #define ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION    0x5
355 /* ARG0: ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION
356  * ARG1:
357  * WORD  - structure size in bytes (includes size field)
358  * WORD  - target gpu (0: iGPU, 1: dGPU)
359  * OUTPUT: none
360  */
361 #define ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION      0x6
362 /* ARG0: ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION
363  * ARG1:
364  * WORD  - structure size in bytes (includes size field)
365  * WORD  - target gpu (0: iGPU, 1: dGPU)
366  * OUTPUT: none
367  */
368 #define ATPX_FUNCTION_GET_DISPLAY_CONNECTORS_MAPPING               0x8
369 /* ARG0: ATPX_FUNCTION_GET_DISPLAY_CONNECTORS_MAPPING
370  * ARG1: none
371  * OUTPUT:
372  * WORD  - number of display connectors
373  * WORD  - connector structure size in bytes (excludes connector size field)
374  * BYTE  - flags                                                     \
375  * BYTE  - ATIF display vector bit position                           } repeated
376  * BYTE  - adapter id (0: iGPU, 1-n: dGPU ordered by pcie bus number) } structure
377  * WORD  - connector ACPI id                                         /
378  */
379 /* flags */
380 #       define ATPX_DISPLAY_OUTPUT_SUPPORTED_BY_ADAPTER_ID_DEVICE  (1 << 0)
381 #       define ATPX_DISPLAY_HPD_SUPPORTED_BY_ADAPTER_ID_DEVICE     (1 << 1)
382 #       define ATPX_DISPLAY_I2C_SUPPORTED_BY_ADAPTER_ID_DEVICE     (1 << 2)
383 #define ATPX_FUNCTION_GET_DISPLAY_DETECTION_PORTS                  0x9
384 /* ARG0: ATPX_FUNCTION_GET_DISPLAY_DETECTION_PORTS
385  * ARG1: none
386  * OUTPUT:
387  * WORD  - number of HPD/DDC ports
388  * WORD  - port structure size in bytes (excludes port size field)
389  * BYTE  - ATIF display vector bit position \
390  * BYTE  - hpd id                            } reapeated structure
391  * BYTE  - ddc id                           /
392  *
393  * available on A+A systems only
394  */
395 /* hpd id */
396 #       define ATPX_HPD_NONE                                       0
397 #       define ATPX_HPD1                                           1
398 #       define ATPX_HPD2                                           2
399 #       define ATPX_HPD3                                           3
400 #       define ATPX_HPD4                                           4
401 #       define ATPX_HPD5                                           5
402 #       define ATPX_HPD6                                           6
403 /* ddc id */
404 #       define ATPX_DDC_NONE                                       0
405 #       define ATPX_DDC1                                           1
406 #       define ATPX_DDC2                                           2
407 #       define ATPX_DDC3                                           3
408 #       define ATPX_DDC4                                           4
409 #       define ATPX_DDC5                                           5
410 #       define ATPX_DDC6                                           6
411 #       define ATPX_DDC7                                           7
412 #       define ATPX_DDC8                                           8
413 
414 /* ATCS */
415 #define ATCS_FUNCTION_VERIFY_INTERFACE                             0x0
416 /* ARG0: ATCS_FUNCTION_VERIFY_INTERFACE
417  * ARG1: none
418  * OUTPUT:
419  * WORD  - structure size in bytes (includes size field)
420  * WORD  - version
421  * DWORD - supported functions bit vector
422  */
423 /* supported functions vector */
424 #       define ATCS_GET_EXTERNAL_STATE_SUPPORTED                   (1 << 0)
425 #       define ATCS_PCIE_PERFORMANCE_REQUEST_SUPPORTED             (1 << 1)
426 #       define ATCS_PCIE_DEVICE_READY_NOTIFICATION_SUPPORTED       (1 << 2)
427 #       define ATCS_SET_PCIE_BUS_WIDTH_SUPPORTED                   (1 << 3)
428 #       define ATCS_SET_POWER_SHIFT_CONTROL_SUPPORTED		   (1 << 7)
429 #define ATCS_FUNCTION_GET_EXTERNAL_STATE                           0x1
430 /* ARG0: ATCS_FUNCTION_GET_EXTERNAL_STATE
431  * ARG1: none
432  * OUTPUT:
433  * WORD  - structure size in bytes (includes size field)
434  * DWORD - valid flags mask
435  * DWORD - flags (0: undocked, 1: docked)
436  */
437 /* flags */
438 #       define ATCS_DOCKED                                         (1 << 0)
439 #define ATCS_FUNCTION_PCIE_PERFORMANCE_REQUEST                     0x2
440 /* ARG0: ATCS_FUNCTION_PCIE_PERFORMANCE_REQUEST
441  * ARG1:
442  * WORD  - structure size in bytes (includes size field)
443  * WORD  - client id (bit 2-0: func num, 7-3: dev num, 15-8: bus num)
444  * WORD  - valid flags mask
445  * WORD  - flags
446  * BYTE  - request type
447  * BYTE  - performance request
448  * OUTPUT:
449  * WORD  - structure size in bytes (includes size field)
450  * BYTE  - return value
451  */
452 /* flags */
453 #       define ATCS_ADVERTISE_CAPS                                 (1 << 0)
454 #       define ATCS_WAIT_FOR_COMPLETION                            (1 << 1)
455 /* request type */
456 #       define ATCS_PCIE_LINK_SPEED                                1
457 /* performance request */
458 #       define ATCS_REMOVE                                         0
459 #       define ATCS_FORCE_LOW_POWER                                1
460 #       define ATCS_PERF_LEVEL_1                                   2 /* PCIE Gen 1 */
461 #       define ATCS_PERF_LEVEL_2                                   3 /* PCIE Gen 2 */
462 #       define ATCS_PERF_LEVEL_3                                   4 /* PCIE Gen 3 */
463 /* return value */
464 #       define ATCS_REQUEST_REFUSED                                1
465 #       define ATCS_REQUEST_COMPLETE                               2
466 #       define ATCS_REQUEST_IN_PROGRESS                            3
467 #define ATCS_FUNCTION_PCIE_DEVICE_READY_NOTIFICATION               0x3
468 /* ARG0: ATCS_FUNCTION_PCIE_DEVICE_READY_NOTIFICATION
469  * ARG1: none
470  * OUTPUT: none
471  */
472 #define ATCS_FUNCTION_SET_PCIE_BUS_WIDTH                           0x4
473 /* ARG0: ATCS_FUNCTION_SET_PCIE_BUS_WIDTH
474  * ARG1:
475  * WORD  - structure size in bytes (includes size field)
476  * WORD  - client id (bit 2-0: func num, 7-3: dev num, 15-8: bus num)
477  * BYTE  - number of active lanes
478  * OUTPUT:
479  * WORD  - structure size in bytes (includes size field)
480  * BYTE  - number of active lanes
481  */
482 
483 #define ATCS_FUNCTION_POWER_SHIFT_CONTROL                          0x8
484 /* ARG0: ATCS_FUNCTION_POWER_SHIFT_CONTROL
485  * ARG1:
486  * WORD  - structure size in bytes (includes size field)
487  * WORD  - dGPU id (bit 2-0: func num, 7-3: dev num, 15-8: bus num)
488  * BYTE  - Device ACPI state
489  * BYTE  - Driver state
490  * OUTPUT: none
491  */
492 
493 #endif
494