1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2005 Ivan Kokshaysky
4  * Copyright (C) SAN People
5  *
6  * System Timer (ST) - System peripherals registers.
7  * Based on AT91RM9200 datasheet revision E.
8  */
9 
10 #ifndef _LINUX_MFD_SYSCON_ATMEL_ST_H
11 #define _LINUX_MFD_SYSCON_ATMEL_ST_H
12 
13 #include <linux/bitops.h>
14 
15 #define AT91_ST_CR	0x00	/* Control Register */
16 #define		AT91_ST_WDRST	BIT(0)	/* Watchdog Timer Restart */
17 
18 #define AT91_ST_PIMR	0x04	/* Period Interval Mode Register */
19 #define		AT91_ST_PIV	0xffff	/* Period Interval Value */
20 
21 #define AT91_ST_WDMR	0x08	/* Watchdog Mode Register */
22 #define		AT91_ST_WDV	0xffff	/* Watchdog Counter Value */
23 #define		AT91_ST_RSTEN	BIT(16)	/* Reset Enable */
24 #define		AT91_ST_EXTEN	BIT(17)	/* External Signal Assertion Enable */
25 
26 #define AT91_ST_RTMR	0x0c	/* Real-time Mode Register */
27 #define		AT91_ST_RTPRES	0xffff	/* Real-time Prescalar Value */
28 
29 #define AT91_ST_SR	0x10	/* Status Register */
30 #define		AT91_ST_PITS	BIT(0)	/* Period Interval Timer Status */
31 #define		AT91_ST_WDOVF	BIT(1)	/* Watchdog Overflow */
32 #define		AT91_ST_RTTINC	BIT(2)	/* Real-time Timer Increment */
33 #define		AT91_ST_ALMS	BIT(3)	/* Alarm Status */
34 
35 #define AT91_ST_IER	0x14	/* Interrupt Enable Register */
36 #define AT91_ST_IDR	0x18	/* Interrupt Disable Register */
37 #define AT91_ST_IMR	0x1c	/* Interrupt Mask Register */
38 
39 #define AT91_ST_RTAR	0x20	/* Real-time Alarm Register */
40 #define		AT91_ST_ALMV	0xfffff	/* Alarm Value */
41 
42 #define AT91_ST_CRTR	0x24	/* Current Real-time Register */
43 #define		AT91_ST_CRTV	0xfffff	/* Current Real-Time Value */
44 
45 #endif /* _LINUX_MFD_SYSCON_ATMEL_ST_H */
46