xref: /openbmc/linux/drivers/tty/serial/ar933x_uart.c (revision 7449c16d)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  *  Atheros AR933X SoC built-in UART driver
4  *
5  *  Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
6  *
7  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8  */
9 
10 #include <linux/module.h>
11 #include <linux/ioport.h>
12 #include <linux/init.h>
13 #include <linux/console.h>
14 #include <linux/sysrq.h>
15 #include <linux/delay.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/platform_device.h>
18 #include <linux/of.h>
19 #include <linux/of_platform.h>
20 #include <linux/tty.h>
21 #include <linux/tty_flip.h>
22 #include <linux/serial_core.h>
23 #include <linux/serial.h>
24 #include <linux/slab.h>
25 #include <linux/io.h>
26 #include <linux/irq.h>
27 #include <linux/clk.h>
28 
29 #include <asm/div64.h>
30 
31 #include <asm/mach-ath79/ar933x_uart.h>
32 
33 #include "serial_mctrl_gpio.h"
34 
35 #define DRIVER_NAME "ar933x-uart"
36 
37 #define AR933X_UART_MAX_SCALE	0xff
38 #define AR933X_UART_MAX_STEP	0xffff
39 
40 #define AR933X_UART_MIN_BAUD	300
41 #define AR933X_UART_MAX_BAUD	3000000
42 
43 #define AR933X_DUMMY_STATUS_RD	0x01
44 
45 static struct uart_driver ar933x_uart_driver;
46 
47 struct ar933x_uart_port {
48 	struct uart_port	port;
49 	unsigned int		ier;	/* shadow Interrupt Enable Register */
50 	unsigned int		min_baud;
51 	unsigned int		max_baud;
52 	struct clk		*clk;
53 	struct mctrl_gpios	*gpios;
54 	struct gpio_desc	*rts_gpiod;
55 };
56 
ar933x_uart_read(struct ar933x_uart_port * up,int offset)57 static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
58 					    int offset)
59 {
60 	return readl(up->port.membase + offset);
61 }
62 
ar933x_uart_write(struct ar933x_uart_port * up,int offset,unsigned int value)63 static inline void ar933x_uart_write(struct ar933x_uart_port *up,
64 				     int offset, unsigned int value)
65 {
66 	writel(value, up->port.membase + offset);
67 }
68 
ar933x_uart_rmw(struct ar933x_uart_port * up,unsigned int offset,unsigned int mask,unsigned int val)69 static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
70 				  unsigned int offset,
71 				  unsigned int mask,
72 				  unsigned int val)
73 {
74 	unsigned int t;
75 
76 	t = ar933x_uart_read(up, offset);
77 	t &= ~mask;
78 	t |= val;
79 	ar933x_uart_write(up, offset, t);
80 }
81 
ar933x_uart_rmw_set(struct ar933x_uart_port * up,unsigned int offset,unsigned int val)82 static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
83 				       unsigned int offset,
84 				       unsigned int val)
85 {
86 	ar933x_uart_rmw(up, offset, 0, val);
87 }
88 
ar933x_uart_rmw_clear(struct ar933x_uart_port * up,unsigned int offset,unsigned int val)89 static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
90 					 unsigned int offset,
91 					 unsigned int val)
92 {
93 	ar933x_uart_rmw(up, offset, val, 0);
94 }
95 
ar933x_uart_start_tx_interrupt(struct ar933x_uart_port * up)96 static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
97 {
98 	up->ier |= AR933X_UART_INT_TX_EMPTY;
99 	ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
100 }
101 
ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port * up)102 static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
103 {
104 	up->ier &= ~AR933X_UART_INT_TX_EMPTY;
105 	ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
106 }
107 
ar933x_uart_start_rx_interrupt(struct ar933x_uart_port * up)108 static inline void ar933x_uart_start_rx_interrupt(struct ar933x_uart_port *up)
109 {
110 	up->ier |= AR933X_UART_INT_RX_VALID;
111 	ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
112 }
113 
ar933x_uart_stop_rx_interrupt(struct ar933x_uart_port * up)114 static inline void ar933x_uart_stop_rx_interrupt(struct ar933x_uart_port *up)
115 {
116 	up->ier &= ~AR933X_UART_INT_RX_VALID;
117 	ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
118 }
119 
ar933x_uart_putc(struct ar933x_uart_port * up,int ch)120 static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
121 {
122 	unsigned int rdata;
123 
124 	rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
125 	rdata |= AR933X_UART_DATA_TX_CSR;
126 	ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
127 }
128 
ar933x_uart_tx_empty(struct uart_port * port)129 static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
130 {
131 	struct ar933x_uart_port *up =
132 		container_of(port, struct ar933x_uart_port, port);
133 	unsigned long flags;
134 	unsigned int rdata;
135 
136 	spin_lock_irqsave(&up->port.lock, flags);
137 	rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
138 	spin_unlock_irqrestore(&up->port.lock, flags);
139 
140 	return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
141 }
142 
ar933x_uart_get_mctrl(struct uart_port * port)143 static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
144 {
145 	struct ar933x_uart_port *up =
146 		container_of(port, struct ar933x_uart_port, port);
147 	int ret = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
148 
149 	mctrl_gpio_get(up->gpios, &ret);
150 
151 	return ret;
152 }
153 
ar933x_uart_set_mctrl(struct uart_port * port,unsigned int mctrl)154 static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
155 {
156 	struct ar933x_uart_port *up =
157 		container_of(port, struct ar933x_uart_port, port);
158 
159 	mctrl_gpio_set(up->gpios, mctrl);
160 }
161 
ar933x_uart_start_tx(struct uart_port * port)162 static void ar933x_uart_start_tx(struct uart_port *port)
163 {
164 	struct ar933x_uart_port *up =
165 		container_of(port, struct ar933x_uart_port, port);
166 
167 	ar933x_uart_start_tx_interrupt(up);
168 }
169 
ar933x_uart_wait_tx_complete(struct ar933x_uart_port * up)170 static void ar933x_uart_wait_tx_complete(struct ar933x_uart_port *up)
171 {
172 	unsigned int status;
173 	unsigned int timeout = 60000;
174 
175 	/* Wait up to 60ms for the character(s) to be sent. */
176 	do {
177 		status = ar933x_uart_read(up, AR933X_UART_CS_REG);
178 		if (--timeout == 0)
179 			break;
180 		udelay(1);
181 	} while (status & AR933X_UART_CS_TX_BUSY);
182 
183 	if (timeout == 0)
184 		dev_err(up->port.dev, "waiting for TX timed out\n");
185 }
186 
ar933x_uart_rx_flush(struct ar933x_uart_port * up)187 static void ar933x_uart_rx_flush(struct ar933x_uart_port *up)
188 {
189 	unsigned int status;
190 
191 	/* clear RX_VALID interrupt */
192 	ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_RX_VALID);
193 
194 	/* remove characters from the RX FIFO */
195 	do {
196 		ar933x_uart_write(up, AR933X_UART_DATA_REG, AR933X_UART_DATA_RX_CSR);
197 		status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
198 	} while (status & AR933X_UART_DATA_RX_CSR);
199 }
200 
ar933x_uart_stop_tx(struct uart_port * port)201 static void ar933x_uart_stop_tx(struct uart_port *port)
202 {
203 	struct ar933x_uart_port *up =
204 		container_of(port, struct ar933x_uart_port, port);
205 
206 	ar933x_uart_stop_tx_interrupt(up);
207 }
208 
ar933x_uart_stop_rx(struct uart_port * port)209 static void ar933x_uart_stop_rx(struct uart_port *port)
210 {
211 	struct ar933x_uart_port *up =
212 		container_of(port, struct ar933x_uart_port, port);
213 
214 	ar933x_uart_stop_rx_interrupt(up);
215 }
216 
ar933x_uart_break_ctl(struct uart_port * port,int break_state)217 static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
218 {
219 	struct ar933x_uart_port *up =
220 		container_of(port, struct ar933x_uart_port, port);
221 	unsigned long flags;
222 
223 	spin_lock_irqsave(&up->port.lock, flags);
224 	if (break_state == -1)
225 		ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
226 				    AR933X_UART_CS_TX_BREAK);
227 	else
228 		ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
229 				      AR933X_UART_CS_TX_BREAK);
230 	spin_unlock_irqrestore(&up->port.lock, flags);
231 }
232 
233 /*
234  * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
235  */
ar933x_uart_get_baud(unsigned int clk,unsigned int scale,unsigned int step)236 static unsigned long ar933x_uart_get_baud(unsigned int clk,
237 					  unsigned int scale,
238 					  unsigned int step)
239 {
240 	u64 t;
241 	u32 div;
242 
243 	div = (2 << 16) * (scale + 1);
244 	t = clk;
245 	t *= step;
246 	t += (div / 2);
247 	do_div(t, div);
248 
249 	return t;
250 }
251 
ar933x_uart_get_scale_step(unsigned int clk,unsigned int baud,unsigned int * scale,unsigned int * step)252 static void ar933x_uart_get_scale_step(unsigned int clk,
253 				       unsigned int baud,
254 				       unsigned int *scale,
255 				       unsigned int *step)
256 {
257 	unsigned int tscale;
258 	long min_diff;
259 
260 	*scale = 0;
261 	*step = 0;
262 
263 	min_diff = baud;
264 	for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
265 		u64 tstep;
266 		int diff;
267 
268 		tstep = baud * (tscale + 1);
269 		tstep *= (2 << 16);
270 		do_div(tstep, clk);
271 
272 		if (tstep > AR933X_UART_MAX_STEP)
273 			break;
274 
275 		diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
276 		if (diff < min_diff) {
277 			min_diff = diff;
278 			*scale = tscale;
279 			*step = tstep;
280 		}
281 	}
282 }
283 
ar933x_uart_set_termios(struct uart_port * port,struct ktermios * new,const struct ktermios * old)284 static void ar933x_uart_set_termios(struct uart_port *port,
285 				    struct ktermios *new,
286 				    const struct ktermios *old)
287 {
288 	struct ar933x_uart_port *up =
289 		container_of(port, struct ar933x_uart_port, port);
290 	unsigned int cs;
291 	unsigned long flags;
292 	unsigned int baud, scale, step;
293 
294 	/* Only CS8 is supported */
295 	new->c_cflag &= ~CSIZE;
296 	new->c_cflag |= CS8;
297 
298 	/* Only one stop bit is supported */
299 	new->c_cflag &= ~CSTOPB;
300 
301 	cs = 0;
302 	if (new->c_cflag & PARENB) {
303 		if (!(new->c_cflag & PARODD))
304 			cs |= AR933X_UART_CS_PARITY_EVEN;
305 		else
306 			cs |= AR933X_UART_CS_PARITY_ODD;
307 	} else {
308 		cs |= AR933X_UART_CS_PARITY_NONE;
309 	}
310 
311 	/* Mark/space parity is not supported */
312 	new->c_cflag &= ~CMSPAR;
313 
314 	baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
315 	ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
316 
317 	/*
318 	 * Ok, we're now changing the port state. Do it with
319 	 * interrupts disabled.
320 	 */
321 	spin_lock_irqsave(&up->port.lock, flags);
322 
323 	/* disable the UART */
324 	ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
325 		      AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
326 
327 	/* Update the per-port timeout. */
328 	uart_update_timeout(port, new->c_cflag, baud);
329 
330 	up->port.ignore_status_mask = 0;
331 
332 	/* ignore all characters if CREAD is not set */
333 	if ((new->c_cflag & CREAD) == 0)
334 		up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
335 
336 	ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
337 			  scale << AR933X_UART_CLOCK_SCALE_S | step);
338 
339 	/* setup configuration register */
340 	ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
341 
342 	/* enable host interrupt */
343 	ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
344 			    AR933X_UART_CS_HOST_INT_EN);
345 
346 	/* enable RX and TX ready overide */
347 	ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
348 		AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
349 
350 	/* reenable the UART */
351 	ar933x_uart_rmw(up, AR933X_UART_CS_REG,
352 			AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
353 			AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
354 
355 	spin_unlock_irqrestore(&up->port.lock, flags);
356 
357 	if (tty_termios_baud_rate(new))
358 		tty_termios_encode_baud_rate(new, baud, baud);
359 }
360 
ar933x_uart_rx_chars(struct ar933x_uart_port * up)361 static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
362 {
363 	struct tty_port *port = &up->port.state->port;
364 	int max_count = 256;
365 
366 	do {
367 		unsigned int rdata;
368 		unsigned char ch;
369 
370 		rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
371 		if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
372 			break;
373 
374 		/* remove the character from the FIFO */
375 		ar933x_uart_write(up, AR933X_UART_DATA_REG,
376 				  AR933X_UART_DATA_RX_CSR);
377 
378 		up->port.icount.rx++;
379 		ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
380 
381 		if (uart_handle_sysrq_char(&up->port, ch))
382 			continue;
383 
384 		if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
385 			tty_insert_flip_char(port, ch, TTY_NORMAL);
386 	} while (max_count-- > 0);
387 
388 	tty_flip_buffer_push(port);
389 }
390 
ar933x_uart_tx_chars(struct ar933x_uart_port * up)391 static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
392 {
393 	struct circ_buf *xmit = &up->port.state->xmit;
394 	struct serial_rs485 *rs485conf = &up->port.rs485;
395 	int count;
396 	bool half_duplex_send = false;
397 
398 	if (uart_tx_stopped(&up->port))
399 		return;
400 
401 	if ((rs485conf->flags & SER_RS485_ENABLED) &&
402 	    (up->port.x_char || !uart_circ_empty(xmit))) {
403 		ar933x_uart_stop_rx_interrupt(up);
404 		gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_ON_SEND));
405 		half_duplex_send = true;
406 	}
407 
408 	count = up->port.fifosize;
409 	do {
410 		unsigned int rdata;
411 
412 		rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
413 		if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
414 			break;
415 
416 		if (up->port.x_char) {
417 			ar933x_uart_putc(up, up->port.x_char);
418 			up->port.icount.tx++;
419 			up->port.x_char = 0;
420 			continue;
421 		}
422 
423 		if (uart_circ_empty(xmit))
424 			break;
425 
426 		ar933x_uart_putc(up, xmit->buf[xmit->tail]);
427 
428 		uart_xmit_advance(&up->port, 1);
429 	} while (--count > 0);
430 
431 	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
432 		uart_write_wakeup(&up->port);
433 
434 	if (!uart_circ_empty(xmit)) {
435 		ar933x_uart_start_tx_interrupt(up);
436 	} else if (half_duplex_send) {
437 		ar933x_uart_wait_tx_complete(up);
438 		ar933x_uart_rx_flush(up);
439 		ar933x_uart_start_rx_interrupt(up);
440 		gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_AFTER_SEND));
441 	}
442 }
443 
ar933x_uart_interrupt(int irq,void * dev_id)444 static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
445 {
446 	struct ar933x_uart_port *up = dev_id;
447 	unsigned int status;
448 
449 	status = ar933x_uart_read(up, AR933X_UART_CS_REG);
450 	if ((status & AR933X_UART_CS_HOST_INT) == 0)
451 		return IRQ_NONE;
452 
453 	spin_lock(&up->port.lock);
454 
455 	status = ar933x_uart_read(up, AR933X_UART_INT_REG);
456 	status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
457 
458 	if (status & AR933X_UART_INT_RX_VALID) {
459 		ar933x_uart_write(up, AR933X_UART_INT_REG,
460 				  AR933X_UART_INT_RX_VALID);
461 		ar933x_uart_rx_chars(up);
462 	}
463 
464 	if (status & AR933X_UART_INT_TX_EMPTY) {
465 		ar933x_uart_write(up, AR933X_UART_INT_REG,
466 				  AR933X_UART_INT_TX_EMPTY);
467 		ar933x_uart_stop_tx_interrupt(up);
468 		ar933x_uart_tx_chars(up);
469 	}
470 
471 	spin_unlock(&up->port.lock);
472 
473 	return IRQ_HANDLED;
474 }
475 
ar933x_uart_startup(struct uart_port * port)476 static int ar933x_uart_startup(struct uart_port *port)
477 {
478 	struct ar933x_uart_port *up =
479 		container_of(port, struct ar933x_uart_port, port);
480 	unsigned long flags;
481 	int ret;
482 
483 	ret = request_irq(up->port.irq, ar933x_uart_interrupt,
484 			  up->port.irqflags, dev_name(up->port.dev), up);
485 	if (ret)
486 		return ret;
487 
488 	spin_lock_irqsave(&up->port.lock, flags);
489 
490 	/* Enable HOST interrupts */
491 	ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
492 			    AR933X_UART_CS_HOST_INT_EN);
493 
494 	/* enable RX and TX ready overide */
495 	ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
496 		AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
497 
498 	/* Enable RX interrupts */
499 	ar933x_uart_start_rx_interrupt(up);
500 
501 	spin_unlock_irqrestore(&up->port.lock, flags);
502 
503 	return 0;
504 }
505 
ar933x_uart_shutdown(struct uart_port * port)506 static void ar933x_uart_shutdown(struct uart_port *port)
507 {
508 	struct ar933x_uart_port *up =
509 		container_of(port, struct ar933x_uart_port, port);
510 
511 	/* Disable all interrupts */
512 	up->ier = 0;
513 	ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
514 
515 	/* Disable break condition */
516 	ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
517 			      AR933X_UART_CS_TX_BREAK);
518 
519 	free_irq(up->port.irq, up);
520 }
521 
ar933x_uart_type(struct uart_port * port)522 static const char *ar933x_uart_type(struct uart_port *port)
523 {
524 	return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
525 }
526 
ar933x_uart_release_port(struct uart_port * port)527 static void ar933x_uart_release_port(struct uart_port *port)
528 {
529 	/* Nothing to release ... */
530 }
531 
ar933x_uart_request_port(struct uart_port * port)532 static int ar933x_uart_request_port(struct uart_port *port)
533 {
534 	/* UARTs always present */
535 	return 0;
536 }
537 
ar933x_uart_config_port(struct uart_port * port,int flags)538 static void ar933x_uart_config_port(struct uart_port *port, int flags)
539 {
540 	if (flags & UART_CONFIG_TYPE)
541 		port->type = PORT_AR933X;
542 }
543 
ar933x_uart_verify_port(struct uart_port * port,struct serial_struct * ser)544 static int ar933x_uart_verify_port(struct uart_port *port,
545 				   struct serial_struct *ser)
546 {
547 	struct ar933x_uart_port *up =
548 		container_of(port, struct ar933x_uart_port, port);
549 
550 	if (ser->type != PORT_UNKNOWN &&
551 	    ser->type != PORT_AR933X)
552 		return -EINVAL;
553 
554 	if (ser->irq < 0 || ser->irq >= NR_IRQS)
555 		return -EINVAL;
556 
557 	if (ser->baud_base < up->min_baud ||
558 	    ser->baud_base > up->max_baud)
559 		return -EINVAL;
560 
561 	return 0;
562 }
563 
564 static const struct uart_ops ar933x_uart_ops = {
565 	.tx_empty	= ar933x_uart_tx_empty,
566 	.set_mctrl	= ar933x_uart_set_mctrl,
567 	.get_mctrl	= ar933x_uart_get_mctrl,
568 	.stop_tx	= ar933x_uart_stop_tx,
569 	.start_tx	= ar933x_uart_start_tx,
570 	.stop_rx	= ar933x_uart_stop_rx,
571 	.break_ctl	= ar933x_uart_break_ctl,
572 	.startup	= ar933x_uart_startup,
573 	.shutdown	= ar933x_uart_shutdown,
574 	.set_termios	= ar933x_uart_set_termios,
575 	.type		= ar933x_uart_type,
576 	.release_port	= ar933x_uart_release_port,
577 	.request_port	= ar933x_uart_request_port,
578 	.config_port	= ar933x_uart_config_port,
579 	.verify_port	= ar933x_uart_verify_port,
580 };
581 
ar933x_config_rs485(struct uart_port * port,struct ktermios * termios,struct serial_rs485 * rs485conf)582 static int ar933x_config_rs485(struct uart_port *port, struct ktermios *termios,
583 				struct serial_rs485 *rs485conf)
584 {
585 	struct ar933x_uart_port *up =
586 			container_of(port, struct ar933x_uart_port, port);
587 
588 	if (port->rs485.flags & SER_RS485_ENABLED)
589 		gpiod_set_value(up->rts_gpiod,
590 			!!(rs485conf->flags & SER_RS485_RTS_AFTER_SEND));
591 
592 	return 0;
593 }
594 
595 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
596 static struct ar933x_uart_port *
597 ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
598 
ar933x_uart_wait_xmitr(struct ar933x_uart_port * up)599 static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
600 {
601 	unsigned int status;
602 	unsigned int timeout = 60000;
603 
604 	/* Wait up to 60ms for the character(s) to be sent. */
605 	do {
606 		status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
607 		if (--timeout == 0)
608 			break;
609 		udelay(1);
610 	} while ((status & AR933X_UART_DATA_TX_CSR) == 0);
611 }
612 
ar933x_uart_console_putchar(struct uart_port * port,unsigned char ch)613 static void ar933x_uart_console_putchar(struct uart_port *port, unsigned char ch)
614 {
615 	struct ar933x_uart_port *up =
616 		container_of(port, struct ar933x_uart_port, port);
617 
618 	ar933x_uart_wait_xmitr(up);
619 	ar933x_uart_putc(up, ch);
620 }
621 
ar933x_uart_console_write(struct console * co,const char * s,unsigned int count)622 static void ar933x_uart_console_write(struct console *co, const char *s,
623 				      unsigned int count)
624 {
625 	struct ar933x_uart_port *up = ar933x_console_ports[co->index];
626 	unsigned long flags;
627 	unsigned int int_en;
628 	int locked = 1;
629 
630 	local_irq_save(flags);
631 
632 	if (up->port.sysrq)
633 		locked = 0;
634 	else if (oops_in_progress)
635 		locked = spin_trylock(&up->port.lock);
636 	else
637 		spin_lock(&up->port.lock);
638 
639 	/*
640 	 * First save the IER then disable the interrupts
641 	 */
642 	int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
643 	ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
644 
645 	uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
646 
647 	/*
648 	 * Finally, wait for transmitter to become empty
649 	 * and restore the IER
650 	 */
651 	ar933x_uart_wait_xmitr(up);
652 	ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
653 
654 	ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
655 
656 	if (locked)
657 		spin_unlock(&up->port.lock);
658 
659 	local_irq_restore(flags);
660 }
661 
ar933x_uart_console_setup(struct console * co,char * options)662 static int ar933x_uart_console_setup(struct console *co, char *options)
663 {
664 	struct ar933x_uart_port *up;
665 	int baud = 115200;
666 	int bits = 8;
667 	int parity = 'n';
668 	int flow = 'n';
669 
670 	if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
671 		return -EINVAL;
672 
673 	up = ar933x_console_ports[co->index];
674 	if (!up)
675 		return -ENODEV;
676 
677 	if (options)
678 		uart_parse_options(options, &baud, &parity, &bits, &flow);
679 
680 	return uart_set_options(&up->port, co, baud, parity, bits, flow);
681 }
682 
683 static struct console ar933x_uart_console = {
684 	.name		= "ttyATH",
685 	.write		= ar933x_uart_console_write,
686 	.device		= uart_console_device,
687 	.setup		= ar933x_uart_console_setup,
688 	.flags		= CON_PRINTBUFFER,
689 	.index		= -1,
690 	.data		= &ar933x_uart_driver,
691 };
692 #endif /* CONFIG_SERIAL_AR933X_CONSOLE */
693 
694 static struct uart_driver ar933x_uart_driver = {
695 	.owner		= THIS_MODULE,
696 	.driver_name	= DRIVER_NAME,
697 	.dev_name	= "ttyATH",
698 	.nr		= CONFIG_SERIAL_AR933X_NR_UARTS,
699 	.cons		= NULL, /* filled in runtime */
700 };
701 
702 static const struct serial_rs485 ar933x_no_rs485 = {};
703 static const struct serial_rs485 ar933x_rs485_supported = {
704 	.flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTER_SEND,
705 };
706 
ar933x_uart_probe(struct platform_device * pdev)707 static int ar933x_uart_probe(struct platform_device *pdev)
708 {
709 	struct ar933x_uart_port *up;
710 	struct uart_port *port;
711 	struct resource *mem_res;
712 	struct device_node *np;
713 	unsigned int baud;
714 	int id;
715 	int ret;
716 	int irq;
717 
718 	np = pdev->dev.of_node;
719 	if (IS_ENABLED(CONFIG_OF) && np) {
720 		id = of_alias_get_id(np, "serial");
721 		if (id < 0) {
722 			dev_err(&pdev->dev, "unable to get alias id, err=%d\n",
723 				id);
724 			return id;
725 		}
726 	} else {
727 		id = pdev->id;
728 		if (id == -1)
729 			id = 0;
730 	}
731 
732 	if (id >= CONFIG_SERIAL_AR933X_NR_UARTS)
733 		return -EINVAL;
734 
735 	irq = platform_get_irq(pdev, 0);
736 	if (irq < 0)
737 		return irq;
738 
739 	up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
740 			  GFP_KERNEL);
741 	if (!up)
742 		return -ENOMEM;
743 
744 	up->clk = devm_clk_get(&pdev->dev, "uart");
745 	if (IS_ERR(up->clk)) {
746 		dev_err(&pdev->dev, "unable to get UART clock\n");
747 		return PTR_ERR(up->clk);
748 	}
749 
750 	port = &up->port;
751 
752 	port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &mem_res);
753 	if (IS_ERR(port->membase))
754 		return PTR_ERR(port->membase);
755 
756 	ret = clk_prepare_enable(up->clk);
757 	if (ret)
758 		return ret;
759 
760 	port->uartclk = clk_get_rate(up->clk);
761 	if (!port->uartclk) {
762 		ret = -EINVAL;
763 		goto err_disable_clk;
764 	}
765 
766 	port->mapbase = mem_res->start;
767 	port->line = id;
768 	port->irq = irq;
769 	port->dev = &pdev->dev;
770 	port->type = PORT_AR933X;
771 	port->iotype = UPIO_MEM32;
772 
773 	port->regshift = 2;
774 	port->fifosize = AR933X_UART_FIFO_SIZE;
775 	port->ops = &ar933x_uart_ops;
776 	port->rs485_config = ar933x_config_rs485;
777 	port->rs485_supported = ar933x_rs485_supported;
778 
779 	baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
780 	up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
781 
782 	baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
783 	up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
784 
785 	ret = uart_get_rs485_mode(port);
786 	if (ret)
787 		goto err_disable_clk;
788 
789 	up->gpios = mctrl_gpio_init(port, 0);
790 	if (IS_ERR(up->gpios) && PTR_ERR(up->gpios) != -ENOSYS) {
791 		ret = PTR_ERR(up->gpios);
792 		goto err_disable_clk;
793 	}
794 
795 	up->rts_gpiod = mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS);
796 
797 	if (!up->rts_gpiod) {
798 		port->rs485_supported = ar933x_no_rs485;
799 		if (port->rs485.flags & SER_RS485_ENABLED) {
800 			dev_err(&pdev->dev, "lacking rts-gpio, disabling RS485\n");
801 			port->rs485.flags &= ~SER_RS485_ENABLED;
802 		}
803 	}
804 
805 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
806 	ar933x_console_ports[up->port.line] = up;
807 #endif
808 
809 	ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
810 	if (ret)
811 		goto err_disable_clk;
812 
813 	platform_set_drvdata(pdev, up);
814 	return 0;
815 
816 err_disable_clk:
817 	clk_disable_unprepare(up->clk);
818 	return ret;
819 }
820 
ar933x_uart_remove(struct platform_device * pdev)821 static int ar933x_uart_remove(struct platform_device *pdev)
822 {
823 	struct ar933x_uart_port *up;
824 
825 	up = platform_get_drvdata(pdev);
826 
827 	if (up) {
828 		uart_remove_one_port(&ar933x_uart_driver, &up->port);
829 		clk_disable_unprepare(up->clk);
830 	}
831 
832 	return 0;
833 }
834 
835 #ifdef CONFIG_OF
836 static const struct of_device_id ar933x_uart_of_ids[] = {
837 	{ .compatible = "qca,ar9330-uart" },
838 	{},
839 };
840 MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids);
841 #endif
842 
843 static struct platform_driver ar933x_uart_platform_driver = {
844 	.probe		= ar933x_uart_probe,
845 	.remove		= ar933x_uart_remove,
846 	.driver		= {
847 		.name		= DRIVER_NAME,
848 		.of_match_table = of_match_ptr(ar933x_uart_of_ids),
849 	},
850 };
851 
ar933x_uart_init(void)852 static int __init ar933x_uart_init(void)
853 {
854 	int ret;
855 
856 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
857 	ar933x_uart_driver.cons = &ar933x_uart_console;
858 #endif
859 
860 	ret = uart_register_driver(&ar933x_uart_driver);
861 	if (ret)
862 		goto err_out;
863 
864 	ret = platform_driver_register(&ar933x_uart_platform_driver);
865 	if (ret)
866 		goto err_unregister_uart_driver;
867 
868 	return 0;
869 
870 err_unregister_uart_driver:
871 	uart_unregister_driver(&ar933x_uart_driver);
872 err_out:
873 	return ret;
874 }
875 
ar933x_uart_exit(void)876 static void __exit ar933x_uart_exit(void)
877 {
878 	platform_driver_unregister(&ar933x_uart_platform_driver);
879 	uart_unregister_driver(&ar933x_uart_driver);
880 }
881 
882 module_init(ar933x_uart_init);
883 module_exit(ar933x_uart_exit);
884 
885 MODULE_DESCRIPTION("Atheros AR933X UART driver");
886 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
887 MODULE_LICENSE("GPL v2");
888 MODULE_ALIAS("platform:" DRIVER_NAME);
889