1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2014, Sony Mobile Communications AB.
4  */
5 
6 #include <linux/module.h>
7 #include <linux/of.h>
8 #include <linux/platform_device.h>
9 
10 #include "pinctrl-msm.h"
11 
12 static const struct pinctrl_pin_desc apq8064_pins[] = {
13 	PINCTRL_PIN(0, "GPIO_0"),
14 	PINCTRL_PIN(1, "GPIO_1"),
15 	PINCTRL_PIN(2, "GPIO_2"),
16 	PINCTRL_PIN(3, "GPIO_3"),
17 	PINCTRL_PIN(4, "GPIO_4"),
18 	PINCTRL_PIN(5, "GPIO_5"),
19 	PINCTRL_PIN(6, "GPIO_6"),
20 	PINCTRL_PIN(7, "GPIO_7"),
21 	PINCTRL_PIN(8, "GPIO_8"),
22 	PINCTRL_PIN(9, "GPIO_9"),
23 	PINCTRL_PIN(10, "GPIO_10"),
24 	PINCTRL_PIN(11, "GPIO_11"),
25 	PINCTRL_PIN(12, "GPIO_12"),
26 	PINCTRL_PIN(13, "GPIO_13"),
27 	PINCTRL_PIN(14, "GPIO_14"),
28 	PINCTRL_PIN(15, "GPIO_15"),
29 	PINCTRL_PIN(16, "GPIO_16"),
30 	PINCTRL_PIN(17, "GPIO_17"),
31 	PINCTRL_PIN(18, "GPIO_18"),
32 	PINCTRL_PIN(19, "GPIO_19"),
33 	PINCTRL_PIN(20, "GPIO_20"),
34 	PINCTRL_PIN(21, "GPIO_21"),
35 	PINCTRL_PIN(22, "GPIO_22"),
36 	PINCTRL_PIN(23, "GPIO_23"),
37 	PINCTRL_PIN(24, "GPIO_24"),
38 	PINCTRL_PIN(25, "GPIO_25"),
39 	PINCTRL_PIN(26, "GPIO_26"),
40 	PINCTRL_PIN(27, "GPIO_27"),
41 	PINCTRL_PIN(28, "GPIO_28"),
42 	PINCTRL_PIN(29, "GPIO_29"),
43 	PINCTRL_PIN(30, "GPIO_30"),
44 	PINCTRL_PIN(31, "GPIO_31"),
45 	PINCTRL_PIN(32, "GPIO_32"),
46 	PINCTRL_PIN(33, "GPIO_33"),
47 	PINCTRL_PIN(34, "GPIO_34"),
48 	PINCTRL_PIN(35, "GPIO_35"),
49 	PINCTRL_PIN(36, "GPIO_36"),
50 	PINCTRL_PIN(37, "GPIO_37"),
51 	PINCTRL_PIN(38, "GPIO_38"),
52 	PINCTRL_PIN(39, "GPIO_39"),
53 	PINCTRL_PIN(40, "GPIO_40"),
54 	PINCTRL_PIN(41, "GPIO_41"),
55 	PINCTRL_PIN(42, "GPIO_42"),
56 	PINCTRL_PIN(43, "GPIO_43"),
57 	PINCTRL_PIN(44, "GPIO_44"),
58 	PINCTRL_PIN(45, "GPIO_45"),
59 	PINCTRL_PIN(46, "GPIO_46"),
60 	PINCTRL_PIN(47, "GPIO_47"),
61 	PINCTRL_PIN(48, "GPIO_48"),
62 	PINCTRL_PIN(49, "GPIO_49"),
63 	PINCTRL_PIN(50, "GPIO_50"),
64 	PINCTRL_PIN(51, "GPIO_51"),
65 	PINCTRL_PIN(52, "GPIO_52"),
66 	PINCTRL_PIN(53, "GPIO_53"),
67 	PINCTRL_PIN(54, "GPIO_54"),
68 	PINCTRL_PIN(55, "GPIO_55"),
69 	PINCTRL_PIN(56, "GPIO_56"),
70 	PINCTRL_PIN(57, "GPIO_57"),
71 	PINCTRL_PIN(58, "GPIO_58"),
72 	PINCTRL_PIN(59, "GPIO_59"),
73 	PINCTRL_PIN(60, "GPIO_60"),
74 	PINCTRL_PIN(61, "GPIO_61"),
75 	PINCTRL_PIN(62, "GPIO_62"),
76 	PINCTRL_PIN(63, "GPIO_63"),
77 	PINCTRL_PIN(64, "GPIO_64"),
78 	PINCTRL_PIN(65, "GPIO_65"),
79 	PINCTRL_PIN(66, "GPIO_66"),
80 	PINCTRL_PIN(67, "GPIO_67"),
81 	PINCTRL_PIN(68, "GPIO_68"),
82 	PINCTRL_PIN(69, "GPIO_69"),
83 	PINCTRL_PIN(70, "GPIO_70"),
84 	PINCTRL_PIN(71, "GPIO_71"),
85 	PINCTRL_PIN(72, "GPIO_72"),
86 	PINCTRL_PIN(73, "GPIO_73"),
87 	PINCTRL_PIN(74, "GPIO_74"),
88 	PINCTRL_PIN(75, "GPIO_75"),
89 	PINCTRL_PIN(76, "GPIO_76"),
90 	PINCTRL_PIN(77, "GPIO_77"),
91 	PINCTRL_PIN(78, "GPIO_78"),
92 	PINCTRL_PIN(79, "GPIO_79"),
93 	PINCTRL_PIN(80, "GPIO_80"),
94 	PINCTRL_PIN(81, "GPIO_81"),
95 	PINCTRL_PIN(82, "GPIO_82"),
96 	PINCTRL_PIN(83, "GPIO_83"),
97 	PINCTRL_PIN(84, "GPIO_84"),
98 	PINCTRL_PIN(85, "GPIO_85"),
99 	PINCTRL_PIN(86, "GPIO_86"),
100 	PINCTRL_PIN(87, "GPIO_87"),
101 	PINCTRL_PIN(88, "GPIO_88"),
102 	PINCTRL_PIN(89, "GPIO_89"),
103 
104 	PINCTRL_PIN(90, "SDC1_CLK"),
105 	PINCTRL_PIN(91, "SDC1_CMD"),
106 	PINCTRL_PIN(92, "SDC1_DATA"),
107 	PINCTRL_PIN(93, "SDC3_CLK"),
108 	PINCTRL_PIN(94, "SDC3_CMD"),
109 	PINCTRL_PIN(95, "SDC3_DATA"),
110 };
111 
112 #define DECLARE_APQ_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin }
113 DECLARE_APQ_GPIO_PINS(0);
114 DECLARE_APQ_GPIO_PINS(1);
115 DECLARE_APQ_GPIO_PINS(2);
116 DECLARE_APQ_GPIO_PINS(3);
117 DECLARE_APQ_GPIO_PINS(4);
118 DECLARE_APQ_GPIO_PINS(5);
119 DECLARE_APQ_GPIO_PINS(6);
120 DECLARE_APQ_GPIO_PINS(7);
121 DECLARE_APQ_GPIO_PINS(8);
122 DECLARE_APQ_GPIO_PINS(9);
123 DECLARE_APQ_GPIO_PINS(10);
124 DECLARE_APQ_GPIO_PINS(11);
125 DECLARE_APQ_GPIO_PINS(12);
126 DECLARE_APQ_GPIO_PINS(13);
127 DECLARE_APQ_GPIO_PINS(14);
128 DECLARE_APQ_GPIO_PINS(15);
129 DECLARE_APQ_GPIO_PINS(16);
130 DECLARE_APQ_GPIO_PINS(17);
131 DECLARE_APQ_GPIO_PINS(18);
132 DECLARE_APQ_GPIO_PINS(19);
133 DECLARE_APQ_GPIO_PINS(20);
134 DECLARE_APQ_GPIO_PINS(21);
135 DECLARE_APQ_GPIO_PINS(22);
136 DECLARE_APQ_GPIO_PINS(23);
137 DECLARE_APQ_GPIO_PINS(24);
138 DECLARE_APQ_GPIO_PINS(25);
139 DECLARE_APQ_GPIO_PINS(26);
140 DECLARE_APQ_GPIO_PINS(27);
141 DECLARE_APQ_GPIO_PINS(28);
142 DECLARE_APQ_GPIO_PINS(29);
143 DECLARE_APQ_GPIO_PINS(30);
144 DECLARE_APQ_GPIO_PINS(31);
145 DECLARE_APQ_GPIO_PINS(32);
146 DECLARE_APQ_GPIO_PINS(33);
147 DECLARE_APQ_GPIO_PINS(34);
148 DECLARE_APQ_GPIO_PINS(35);
149 DECLARE_APQ_GPIO_PINS(36);
150 DECLARE_APQ_GPIO_PINS(37);
151 DECLARE_APQ_GPIO_PINS(38);
152 DECLARE_APQ_GPIO_PINS(39);
153 DECLARE_APQ_GPIO_PINS(40);
154 DECLARE_APQ_GPIO_PINS(41);
155 DECLARE_APQ_GPIO_PINS(42);
156 DECLARE_APQ_GPIO_PINS(43);
157 DECLARE_APQ_GPIO_PINS(44);
158 DECLARE_APQ_GPIO_PINS(45);
159 DECLARE_APQ_GPIO_PINS(46);
160 DECLARE_APQ_GPIO_PINS(47);
161 DECLARE_APQ_GPIO_PINS(48);
162 DECLARE_APQ_GPIO_PINS(49);
163 DECLARE_APQ_GPIO_PINS(50);
164 DECLARE_APQ_GPIO_PINS(51);
165 DECLARE_APQ_GPIO_PINS(52);
166 DECLARE_APQ_GPIO_PINS(53);
167 DECLARE_APQ_GPIO_PINS(54);
168 DECLARE_APQ_GPIO_PINS(55);
169 DECLARE_APQ_GPIO_PINS(56);
170 DECLARE_APQ_GPIO_PINS(57);
171 DECLARE_APQ_GPIO_PINS(58);
172 DECLARE_APQ_GPIO_PINS(59);
173 DECLARE_APQ_GPIO_PINS(60);
174 DECLARE_APQ_GPIO_PINS(61);
175 DECLARE_APQ_GPIO_PINS(62);
176 DECLARE_APQ_GPIO_PINS(63);
177 DECLARE_APQ_GPIO_PINS(64);
178 DECLARE_APQ_GPIO_PINS(65);
179 DECLARE_APQ_GPIO_PINS(66);
180 DECLARE_APQ_GPIO_PINS(67);
181 DECLARE_APQ_GPIO_PINS(68);
182 DECLARE_APQ_GPIO_PINS(69);
183 DECLARE_APQ_GPIO_PINS(70);
184 DECLARE_APQ_GPIO_PINS(71);
185 DECLARE_APQ_GPIO_PINS(72);
186 DECLARE_APQ_GPIO_PINS(73);
187 DECLARE_APQ_GPIO_PINS(74);
188 DECLARE_APQ_GPIO_PINS(75);
189 DECLARE_APQ_GPIO_PINS(76);
190 DECLARE_APQ_GPIO_PINS(77);
191 DECLARE_APQ_GPIO_PINS(78);
192 DECLARE_APQ_GPIO_PINS(79);
193 DECLARE_APQ_GPIO_PINS(80);
194 DECLARE_APQ_GPIO_PINS(81);
195 DECLARE_APQ_GPIO_PINS(82);
196 DECLARE_APQ_GPIO_PINS(83);
197 DECLARE_APQ_GPIO_PINS(84);
198 DECLARE_APQ_GPIO_PINS(85);
199 DECLARE_APQ_GPIO_PINS(86);
200 DECLARE_APQ_GPIO_PINS(87);
201 DECLARE_APQ_GPIO_PINS(88);
202 DECLARE_APQ_GPIO_PINS(89);
203 
204 static const unsigned int sdc1_clk_pins[] = { 90 };
205 static const unsigned int sdc1_cmd_pins[] = { 91 };
206 static const unsigned int sdc1_data_pins[] = { 92 };
207 static const unsigned int sdc3_clk_pins[] = { 93 };
208 static const unsigned int sdc3_cmd_pins[] = { 94 };
209 static const unsigned int sdc3_data_pins[] = { 95 };
210 
211 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \
212 	{						\
213 		.grp = PINCTRL_PINGROUP("gpio" #id, 	\
214 			gpio##id##_pins, 		\
215 			ARRAY_SIZE(gpio##id##_pins)),	\
216 		.funcs = (int[]){			\
217 			APQ_MUX_gpio,			\
218 			APQ_MUX_##f1,			\
219 			APQ_MUX_##f2,			\
220 			APQ_MUX_##f3,			\
221 			APQ_MUX_##f4,			\
222 			APQ_MUX_##f5,			\
223 			APQ_MUX_##f6,			\
224 			APQ_MUX_##f7,			\
225 			APQ_MUX_##f8,			\
226 			APQ_MUX_##f9,			\
227 			APQ_MUX_##f10,			\
228 		},					\
229 		.nfuncs = 11,				\
230 		.ctl_reg = 0x1000 + 0x10 * id,		\
231 		.io_reg = 0x1004 + 0x10 * id,		\
232 		.intr_cfg_reg = 0x1008 + 0x10 * id,	\
233 		.intr_status_reg = 0x100c + 0x10 * id,	\
234 		.intr_target_reg = 0x400 + 0x4 * id,	\
235 		.mux_bit = 2,				\
236 		.pull_bit = 0,				\
237 		.drv_bit = 6,				\
238 		.oe_bit = 9,				\
239 		.in_bit = 0,				\
240 		.out_bit = 1,				\
241 		.intr_enable_bit = 0,			\
242 		.intr_status_bit = 0,			\
243 		.intr_ack_high = 1,			\
244 		.intr_target_bit = 0,			\
245 		.intr_target_kpss_val = 4,		\
246 		.intr_raw_status_bit = 3,		\
247 		.intr_polarity_bit = 1,			\
248 		.intr_detection_bit = 2,		\
249 		.intr_detection_width = 1,		\
250 	}
251 
252 #define SDC_PINGROUP(pg_name, ctl, pull, drv)		\
253 	{						\
254 		.grp = PINCTRL_PINGROUP(#pg_name, 	\
255 			pg_name##_pins, 		\
256 			ARRAY_SIZE(pg_name##_pins)),	\
257 		.ctl_reg = ctl,				\
258 		.io_reg = 0,				\
259 		.intr_cfg_reg = 0,			\
260 		.intr_status_reg = 0,			\
261 		.intr_target_reg = 0,			\
262 		.mux_bit = -1,				\
263 		.pull_bit = pull,			\
264 		.drv_bit = drv,				\
265 		.oe_bit = -1,				\
266 		.in_bit = -1,				\
267 		.out_bit = -1,				\
268 		.intr_enable_bit = -1,			\
269 		.intr_status_bit = -1,			\
270 		.intr_target_bit = -1,			\
271 		.intr_target_kpss_val = -1,		\
272 		.intr_raw_status_bit = -1,		\
273 		.intr_polarity_bit = -1,		\
274 		.intr_detection_bit = -1,		\
275 		.intr_detection_width = -1,		\
276 	}
277 
278 enum apq8064_functions {
279 	APQ_MUX_cam_mclk,
280 	APQ_MUX_codec_mic_i2s,
281 	APQ_MUX_codec_spkr_i2s,
282 	APQ_MUX_gp_clk_0a,
283 	APQ_MUX_gp_clk_0b,
284 	APQ_MUX_gp_clk_1a,
285 	APQ_MUX_gp_clk_1b,
286 	APQ_MUX_gp_clk_2a,
287 	APQ_MUX_gp_clk_2b,
288 	APQ_MUX_gpio,
289 	APQ_MUX_gsbi1,
290 	APQ_MUX_gsbi2,
291 	APQ_MUX_gsbi3,
292 	APQ_MUX_gsbi4,
293 	APQ_MUX_gsbi4_cam_i2c,
294 	APQ_MUX_gsbi5,
295 	APQ_MUX_gsbi5_spi_cs1,
296 	APQ_MUX_gsbi5_spi_cs2,
297 	APQ_MUX_gsbi5_spi_cs3,
298 	APQ_MUX_gsbi6,
299 	APQ_MUX_gsbi6_spi_cs1,
300 	APQ_MUX_gsbi6_spi_cs2,
301 	APQ_MUX_gsbi6_spi_cs3,
302 	APQ_MUX_gsbi7,
303 	APQ_MUX_gsbi7_spi_cs1,
304 	APQ_MUX_gsbi7_spi_cs2,
305 	APQ_MUX_gsbi7_spi_cs3,
306 	APQ_MUX_gsbi_cam_i2c,
307 	APQ_MUX_hdmi,
308 	APQ_MUX_mi2s,
309 	APQ_MUX_riva_bt,
310 	APQ_MUX_riva_fm,
311 	APQ_MUX_riva_wlan,
312 	APQ_MUX_sdc2,
313 	APQ_MUX_sdc4,
314 	APQ_MUX_slimbus,
315 	APQ_MUX_spkr_i2s,
316 	APQ_MUX_tsif1,
317 	APQ_MUX_tsif2,
318 	APQ_MUX_usb2_hsic,
319 	APQ_MUX_ps_hold,
320 	APQ_MUX_NA,
321 };
322 
323 static const char * const cam_mclk_groups[] = {
324 	"gpio4" "gpio5"
325 };
326 static const char * const codec_mic_i2s_groups[] = {
327 	"gpio34", "gpio35", "gpio36", "gpio37", "gpio38"
328 };
329 static const char * const codec_spkr_i2s_groups[] = {
330 	"gpio39", "gpio40", "gpio41", "gpio42"
331 };
332 static const char * const gpio_groups[] = {
333 	"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
334 	"gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
335 	"gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
336 	"gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
337 	"gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
338 	"gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
339 	"gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
340 	"gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
341 	"gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
342 	"gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
343 	"gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
344 	"gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
345 	"gpio85", "gpio86", "gpio87", "gpio88", "gpio89"
346 };
347 static const char * const gp_clk_0a_groups[] = {
348 	"gpio3"
349 };
350 static const char * const gp_clk_0b_groups[] = {
351 	"gpio34"
352 };
353 static const char * const gp_clk_1a_groups[] = {
354 	"gpio4"
355 };
356 static const char * const gp_clk_1b_groups[] = {
357 	"gpio50"
358 };
359 static const char * const gp_clk_2a_groups[] = {
360 	"gpio32"
361 };
362 static const char * const gp_clk_2b_groups[] = {
363 	"gpio25"
364 };
365 static const char * const ps_hold_groups[] = {
366 	"gpio78"
367 };
368 static const char * const gsbi1_groups[] = {
369 	"gpio18", "gpio19", "gpio20", "gpio21"
370 };
371 static const char * const gsbi2_groups[] = {
372 	"gpio22", "gpio23", "gpio24", "gpio25"
373 };
374 static const char * const gsbi3_groups[] = {
375 	"gpio6", "gpio7", "gpio8", "gpio9"
376 };
377 static const char * const gsbi4_groups[] = {
378 	"gpio10", "gpio11", "gpio12", "gpio13"
379 };
380 static const char * const gsbi4_cam_i2c_groups[] = {
381 	"gpio10", "gpio11", "gpio12", "gpio13"
382 };
383 static const char * const gsbi5_groups[] = {
384 	"gpio51", "gpio52", "gpio53", "gpio54"
385 };
386 static const char * const gsbi5_spi_cs1_groups[] = {
387 	"gpio47"
388 };
389 static const char * const gsbi5_spi_cs2_groups[] = {
390 	"gpio31"
391 };
392 static const char * const gsbi5_spi_cs3_groups[] = {
393 	"gpio32"
394 };
395 static const char * const gsbi6_groups[] = {
396 	"gpio14", "gpio15", "gpio16", "gpio17"
397 };
398 static const char * const gsbi6_spi_cs1_groups[] = {
399 	"gpio47"
400 };
401 static const char * const gsbi6_spi_cs2_groups[] = {
402 	"gpio31"
403 };
404 static const char * const gsbi6_spi_cs3_groups[] = {
405 	"gpio32"
406 };
407 static const char * const gsbi7_groups[] = {
408 	"gpio82", "gpio83", "gpio84", "gpio85"
409 };
410 static const char * const gsbi7_spi_cs1_groups[] = {
411 	"gpio47"
412 };
413 static const char * const gsbi7_spi_cs2_groups[] = {
414 	"gpio31"
415 };
416 static const char * const gsbi7_spi_cs3_groups[] = {
417 	"gpio32"
418 };
419 static const char * const gsbi_cam_i2c_groups[] = {
420 	"gpio10", "gpio11", "gpio12", "gpio13"
421 };
422 static const char * const hdmi_groups[] = {
423 	"gpio69", "gpio70", "gpio71", "gpio72"
424 };
425 static const char * const mi2s_groups[] = {
426 	"gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", "gpio33"
427 };
428 static const char * const riva_bt_groups[] = {
429 	"gpio16", "gpio17"
430 };
431 static const char * const riva_fm_groups[] = {
432 	"gpio14", "gpio15"
433 };
434 static const char * const riva_wlan_groups[] = {
435 	"gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
436 };
437 static const char * const sdc2_groups[] = {
438 	"gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62"
439 };
440 static const char * const sdc4_groups[] = {
441 	"gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
442 };
443 static const char * const slimbus_groups[] = {
444 	"gpio40", "gpio41"
445 };
446 static const char * const spkr_i2s_groups[] = {
447 	"gpio47", "gpio48", "gpio49", "gpio50"
448 };
449 static const char * const tsif1_groups[] = {
450 	"gpio55", "gpio56", "gpio57"
451 };
452 static const char * const tsif2_groups[] = {
453 	"gpio58", "gpio59", "gpio60"
454 };
455 static const char * const usb2_hsic_groups[] = {
456 	"gpio88", "gpio89"
457 };
458 
459 static const struct pinfunction apq8064_functions[] = {
460 	APQ_PIN_FUNCTION(cam_mclk),
461 	APQ_PIN_FUNCTION(codec_mic_i2s),
462 	APQ_PIN_FUNCTION(codec_spkr_i2s),
463 	APQ_PIN_FUNCTION(gp_clk_0a),
464 	APQ_PIN_FUNCTION(gp_clk_0b),
465 	APQ_PIN_FUNCTION(gp_clk_1a),
466 	APQ_PIN_FUNCTION(gp_clk_1b),
467 	APQ_PIN_FUNCTION(gp_clk_2a),
468 	APQ_PIN_FUNCTION(gp_clk_2b),
469 	APQ_PIN_FUNCTION(gpio),
470 	APQ_PIN_FUNCTION(gsbi1),
471 	APQ_PIN_FUNCTION(gsbi2),
472 	APQ_PIN_FUNCTION(gsbi3),
473 	APQ_PIN_FUNCTION(gsbi4),
474 	APQ_PIN_FUNCTION(gsbi4_cam_i2c),
475 	APQ_PIN_FUNCTION(gsbi5),
476 	APQ_PIN_FUNCTION(gsbi5_spi_cs1),
477 	APQ_PIN_FUNCTION(gsbi5_spi_cs2),
478 	APQ_PIN_FUNCTION(gsbi5_spi_cs3),
479 	APQ_PIN_FUNCTION(gsbi6),
480 	APQ_PIN_FUNCTION(gsbi6_spi_cs1),
481 	APQ_PIN_FUNCTION(gsbi6_spi_cs2),
482 	APQ_PIN_FUNCTION(gsbi6_spi_cs3),
483 	APQ_PIN_FUNCTION(gsbi7),
484 	APQ_PIN_FUNCTION(gsbi7_spi_cs1),
485 	APQ_PIN_FUNCTION(gsbi7_spi_cs2),
486 	APQ_PIN_FUNCTION(gsbi7_spi_cs3),
487 	APQ_PIN_FUNCTION(gsbi_cam_i2c),
488 	APQ_PIN_FUNCTION(hdmi),
489 	APQ_PIN_FUNCTION(mi2s),
490 	APQ_PIN_FUNCTION(riva_bt),
491 	APQ_PIN_FUNCTION(riva_fm),
492 	APQ_PIN_FUNCTION(riva_wlan),
493 	APQ_PIN_FUNCTION(sdc2),
494 	APQ_PIN_FUNCTION(sdc4),
495 	APQ_PIN_FUNCTION(slimbus),
496 	APQ_PIN_FUNCTION(spkr_i2s),
497 	APQ_PIN_FUNCTION(tsif1),
498 	APQ_PIN_FUNCTION(tsif2),
499 	APQ_PIN_FUNCTION(usb2_hsic),
500 	APQ_PIN_FUNCTION(ps_hold),
501 };
502 
503 static const struct msm_pingroup apq8064_groups[] = {
504 	PINGROUP(0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
505 	PINGROUP(1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
506 	PINGROUP(2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
507 	PINGROUP(3, NA, gp_clk_0a, NA, NA, NA, NA, NA, NA, NA, NA),
508 	PINGROUP(4, NA, NA, cam_mclk, gp_clk_1a, NA, NA, NA, NA, NA, NA),
509 	PINGROUP(5, NA, cam_mclk, NA, NA, NA, NA, NA, NA, NA, NA),
510 	PINGROUP(6, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
511 	PINGROUP(7, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
512 	PINGROUP(8, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
513 	PINGROUP(9, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
514 	PINGROUP(10, gsbi4, NA, NA, NA, NA, NA, NA, NA, gsbi4_cam_i2c, NA),
515 	PINGROUP(11, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, gsbi4_cam_i2c),
516 	PINGROUP(12, gsbi4, NA, NA, NA, NA, gsbi4_cam_i2c, NA, NA, NA, NA),
517 	PINGROUP(13, gsbi4, NA, NA, NA, NA, gsbi4_cam_i2c, NA, NA, NA, NA),
518 	PINGROUP(14, riva_fm, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
519 	PINGROUP(15, riva_fm, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
520 	PINGROUP(16, riva_bt, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
521 	PINGROUP(17, riva_bt, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
522 	PINGROUP(18, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
523 	PINGROUP(19, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
524 	PINGROUP(20, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
525 	PINGROUP(21, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
526 	PINGROUP(22, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
527 	PINGROUP(23, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
528 	PINGROUP(24, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
529 	PINGROUP(25, gsbi2, gp_clk_2b, NA, NA, NA, NA, NA, NA, NA, NA),
530 	PINGROUP(26, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
531 	PINGROUP(27, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
532 	PINGROUP(28, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
533 	PINGROUP(29, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
534 	PINGROUP(30, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
535 	PINGROUP(31, mi2s, NA, gsbi5_spi_cs2, gsbi6_spi_cs2, gsbi7_spi_cs2, NA, NA, NA, NA, NA),
536 	PINGROUP(32, mi2s, gp_clk_2a, NA, NA, NA, gsbi5_spi_cs3, gsbi6_spi_cs3, gsbi7_spi_cs3, NA, NA),
537 	PINGROUP(33, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
538 	PINGROUP(34, codec_mic_i2s, gp_clk_0b, NA, NA, NA, NA, NA, NA, NA, NA),
539 	PINGROUP(35, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
540 	PINGROUP(36, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
541 	PINGROUP(37, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
542 	PINGROUP(38, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
543 	PINGROUP(39, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
544 	PINGROUP(40, slimbus, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA),
545 	PINGROUP(41, slimbus, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA),
546 	PINGROUP(42, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
547 	PINGROUP(43, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
548 	PINGROUP(44, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
549 	PINGROUP(45, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
550 	PINGROUP(46, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
551 	PINGROUP(47, spkr_i2s, gsbi5_spi_cs1, gsbi6_spi_cs1, gsbi7_spi_cs1, NA, NA, NA, NA, NA, NA),
552 	PINGROUP(48, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
553 	PINGROUP(49, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
554 	PINGROUP(50, spkr_i2s, gp_clk_1b, NA, NA, NA, NA, NA, NA, NA, NA),
555 	PINGROUP(51, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
556 	PINGROUP(52, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
557 	PINGROUP(53, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
558 	PINGROUP(54, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
559 	PINGROUP(55, tsif1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
560 	PINGROUP(56, tsif1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
561 	PINGROUP(57, tsif1, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
562 	PINGROUP(58, tsif2, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
563 	PINGROUP(59, tsif2, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
564 	PINGROUP(60, tsif2, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
565 	PINGROUP(61, NA, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
566 	PINGROUP(62, NA, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
567 	PINGROUP(63, NA, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
568 	PINGROUP(64, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
569 	PINGROUP(65, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
570 	PINGROUP(66, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
571 	PINGROUP(67, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
572 	PINGROUP(68, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
573 	PINGROUP(69, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
574 	PINGROUP(70, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
575 	PINGROUP(71, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
576 	PINGROUP(72, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
577 	PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
578 	PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
579 	PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
580 	PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
581 	PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
582 	PINGROUP(78, ps_hold, NA, NA, NA, NA, NA, NA, NA, NA, NA),
583 	PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
584 	PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
585 	PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
586 	PINGROUP(82, NA, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA),
587 	PINGROUP(83, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA, NA),
588 	PINGROUP(84, NA, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA),
589 	PINGROUP(85, NA, NA, gsbi7, NA, NA, NA, NA, NA, NA, NA),
590 	PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
591 	PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
592 	PINGROUP(88, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA),
593 	PINGROUP(89, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA),
594 
595 	SDC_PINGROUP(sdc1_clk, 0x20a0, 13, 6),
596 	SDC_PINGROUP(sdc1_cmd, 0x20a0, 11, 3),
597 	SDC_PINGROUP(sdc1_data, 0x20a0, 9, 0),
598 
599 	SDC_PINGROUP(sdc3_clk, 0x20a4, 14, 6),
600 	SDC_PINGROUP(sdc3_cmd, 0x20a4, 11, 3),
601 	SDC_PINGROUP(sdc3_data, 0x20a4, 9, 0),
602 };
603 
604 #define NUM_GPIO_PINGROUPS 90
605 
606 static const struct msm_pinctrl_soc_data apq8064_pinctrl = {
607 	.pins = apq8064_pins,
608 	.npins = ARRAY_SIZE(apq8064_pins),
609 	.functions = apq8064_functions,
610 	.nfunctions = ARRAY_SIZE(apq8064_functions),
611 	.groups = apq8064_groups,
612 	.ngroups = ARRAY_SIZE(apq8064_groups),
613 	.ngpios = NUM_GPIO_PINGROUPS,
614 };
615 
apq8064_pinctrl_probe(struct platform_device * pdev)616 static int apq8064_pinctrl_probe(struct platform_device *pdev)
617 {
618 	return msm_pinctrl_probe(pdev, &apq8064_pinctrl);
619 }
620 
621 static const struct of_device_id apq8064_pinctrl_of_match[] = {
622 	{ .compatible = "qcom,apq8064-pinctrl", },
623 	{ },
624 };
625 
626 static struct platform_driver apq8064_pinctrl_driver = {
627 	.driver = {
628 		.name = "apq8064-pinctrl",
629 		.of_match_table = apq8064_pinctrl_of_match,
630 	},
631 	.probe = apq8064_pinctrl_probe,
632 	.remove = msm_pinctrl_remove,
633 };
634 
apq8064_pinctrl_init(void)635 static int __init apq8064_pinctrl_init(void)
636 {
637 	return platform_driver_register(&apq8064_pinctrl_driver);
638 }
639 arch_initcall(apq8064_pinctrl_init);
640 
apq8064_pinctrl_exit(void)641 static void __exit apq8064_pinctrl_exit(void)
642 {
643 	platform_driver_unregister(&apq8064_pinctrl_driver);
644 }
645 module_exit(apq8064_pinctrl_exit);
646 
647 MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
648 MODULE_DESCRIPTION("Qualcomm APQ8064 pinctrl driver");
649 MODULE_LICENSE("GPL v2");
650 MODULE_DEVICE_TABLE(of, apq8064_pinctrl_of_match);
651