1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
4 * Scott McNutt <smcnutt@psyent.com>
5 */
6
7 #include <common.h>
8 #include <dm.h>
9 #include <errno.h>
10 #include <serial.h>
11 #include <asm/io.h>
12
13 DECLARE_GLOBAL_DATA_PTR;
14
15 /* status register */
16 #define ALTERA_UART_TMT BIT(5) /* tx empty */
17 #define ALTERA_UART_TRDY BIT(6) /* tx ready */
18 #define ALTERA_UART_RRDY BIT(7) /* rx ready */
19
20 struct altera_uart_regs {
21 u32 rxdata; /* Rx data reg */
22 u32 txdata; /* Tx data reg */
23 u32 status; /* Status reg */
24 u32 control; /* Control reg */
25 u32 divisor; /* Baud rate divisor reg */
26 u32 endofpacket; /* End-of-packet reg */
27 };
28
29 struct altera_uart_platdata {
30 struct altera_uart_regs *regs;
31 unsigned int uartclk;
32 };
33
altera_uart_setbrg(struct udevice * dev,int baudrate)34 static int altera_uart_setbrg(struct udevice *dev, int baudrate)
35 {
36 struct altera_uart_platdata *plat = dev->platdata;
37 struct altera_uart_regs *const regs = plat->regs;
38 u32 div;
39
40 div = (plat->uartclk / baudrate) - 1;
41 writel(div, ®s->divisor);
42
43 return 0;
44 }
45
altera_uart_putc(struct udevice * dev,const char ch)46 static int altera_uart_putc(struct udevice *dev, const char ch)
47 {
48 struct altera_uart_platdata *plat = dev->platdata;
49 struct altera_uart_regs *const regs = plat->regs;
50
51 if (!(readl(®s->status) & ALTERA_UART_TRDY))
52 return -EAGAIN;
53
54 writel(ch, ®s->txdata);
55
56 return 0;
57 }
58
altera_uart_pending(struct udevice * dev,bool input)59 static int altera_uart_pending(struct udevice *dev, bool input)
60 {
61 struct altera_uart_platdata *plat = dev->platdata;
62 struct altera_uart_regs *const regs = plat->regs;
63 u32 st = readl(®s->status);
64
65 if (input)
66 return st & ALTERA_UART_RRDY ? 1 : 0;
67 else
68 return !(st & ALTERA_UART_TMT);
69 }
70
altera_uart_getc(struct udevice * dev)71 static int altera_uart_getc(struct udevice *dev)
72 {
73 struct altera_uart_platdata *plat = dev->platdata;
74 struct altera_uart_regs *const regs = plat->regs;
75
76 if (!(readl(®s->status) & ALTERA_UART_RRDY))
77 return -EAGAIN;
78
79 return readl(®s->rxdata) & 0xff;
80 }
81
altera_uart_probe(struct udevice * dev)82 static int altera_uart_probe(struct udevice *dev)
83 {
84 return 0;
85 }
86
altera_uart_ofdata_to_platdata(struct udevice * dev)87 static int altera_uart_ofdata_to_platdata(struct udevice *dev)
88 {
89 struct altera_uart_platdata *plat = dev_get_platdata(dev);
90
91 plat->regs = map_physmem(devfdt_get_addr(dev),
92 sizeof(struct altera_uart_regs),
93 MAP_NOCACHE);
94 plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
95 "clock-frequency", 0);
96
97 return 0;
98 }
99
100 static const struct dm_serial_ops altera_uart_ops = {
101 .putc = altera_uart_putc,
102 .pending = altera_uart_pending,
103 .getc = altera_uart_getc,
104 .setbrg = altera_uart_setbrg,
105 };
106
107 static const struct udevice_id altera_uart_ids[] = {
108 { .compatible = "altr,uart-1.0" },
109 {}
110 };
111
112 U_BOOT_DRIVER(altera_uart) = {
113 .name = "altera_uart",
114 .id = UCLASS_SERIAL,
115 .of_match = altera_uart_ids,
116 .ofdata_to_platdata = altera_uart_ofdata_to_platdata,
117 .platdata_auto_alloc_size = sizeof(struct altera_uart_platdata),
118 .probe = altera_uart_probe,
119 .ops = &altera_uart_ops,
120 };
121
122 #ifdef CONFIG_DEBUG_UART_ALTERA_UART
123
124 #include <debug_uart.h>
125
_debug_uart_init(void)126 static inline void _debug_uart_init(void)
127 {
128 struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
129 u32 div;
130
131 div = (CONFIG_DEBUG_UART_CLOCK / CONFIG_BAUDRATE) - 1;
132 writel(div, ®s->divisor);
133 }
134
_debug_uart_putc(int ch)135 static inline void _debug_uart_putc(int ch)
136 {
137 struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
138
139 while (1) {
140 u32 st = readl(®s->status);
141
142 if (st & ALTERA_UART_TRDY)
143 break;
144 }
145
146 writel(ch, ®s->txdata);
147 }
148
149 DEBUG_UART_FUNCS
150
151 #endif
152