1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */
2 /* Copyright(c) 2014 - 2020 Intel Corporation */
3 #ifndef ADF_C62X_HW_DATA_H_
4 #define ADF_C62X_HW_DATA_H_
5 
6 #include <linux/units.h>
7 
8 /* PCIe configuration space */
9 #define ADF_C62X_SRAM_BAR 0
10 #define ADF_C62X_PMISC_BAR 1
11 #define ADF_C62X_ETR_BAR 2
12 #define ADF_C62X_MAX_ACCELERATORS 5
13 #define ADF_C62X_MAX_ACCELENGINES 10
14 #define ADF_C62X_ACCELERATORS_REG_OFFSET 16
15 #define ADF_C62X_ACCELERATORS_MASK 0x1F
16 #define ADF_C62X_ACCELENGINES_MASK 0x3FF
17 #define ADF_C62X_ETR_MAX_BANKS 16
18 #define ADF_C62X_SOFTSTRAP_CSR_OFFSET 0x2EC
19 
20 /* AE to function mapping */
21 #define ADF_C62X_AE2FUNC_MAP_GRP_A_NUM_REGS 80
22 #define ADF_C62X_AE2FUNC_MAP_GRP_B_NUM_REGS 10
23 
24 /* Clocks frequency */
25 #define ADF_C62X_AE_FREQ (685 * HZ_PER_MHZ)
26 #define ADF_C62X_MIN_AE_FREQ (533 * HZ_PER_MHZ)
27 #define ADF_C62X_MAX_AE_FREQ (800 * HZ_PER_MHZ)
28 
29 /* Firmware Binary */
30 #define ADF_C62X_FW "qat_c62x.bin"
31 #define ADF_C62X_MMP "qat_c62x_mmp.bin"
32 
33 void adf_init_hw_data_c62x(struct adf_hw_device_data *hw_data);
34 void adf_clean_hw_data_c62x(struct adf_hw_device_data *hw_data);
35 #endif
36