1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) ST-Ericsson SA 2012
4  *
5  * Author: Patrice Chotard <patrice.chotard@stericsson.com> for ST-Ericsson.
6  */
7 
8 #include <linux/kernel.h>
9 #include <linux/pinctrl/pinctrl.h>
10 
11 #include <linux/mfd/abx500/ab8500.h>
12 
13 #include "pinctrl-abx500.h"
14 
15 /* All the pins that can be used for GPIO and some other functions */
16 #define ABX500_GPIO(offset)		(offset)
17 
18 #define AB8500_PIN_T10		ABX500_GPIO(1)
19 #define AB8500_PIN_T9		ABX500_GPIO(2)
20 #define AB8500_PIN_U9		ABX500_GPIO(3)
21 #define AB8500_PIN_W2		ABX500_GPIO(4)
22 /* hole */
23 #define AB8500_PIN_Y18		ABX500_GPIO(6)
24 #define AB8500_PIN_AA20		ABX500_GPIO(7)
25 #define AB8500_PIN_W18		ABX500_GPIO(8)
26 #define AB8500_PIN_AA19		ABX500_GPIO(9)
27 #define AB8500_PIN_U17		ABX500_GPIO(10)
28 #define AB8500_PIN_AA18		ABX500_GPIO(11)
29 #define AB8500_PIN_U16		ABX500_GPIO(12)
30 #define AB8500_PIN_W17		ABX500_GPIO(13)
31 #define AB8500_PIN_F14		ABX500_GPIO(14)
32 #define AB8500_PIN_B17		ABX500_GPIO(15)
33 #define AB8500_PIN_F15		ABX500_GPIO(16)
34 #define AB8500_PIN_P5		ABX500_GPIO(17)
35 #define AB8500_PIN_R5		ABX500_GPIO(18)
36 #define AB8500_PIN_U5		ABX500_GPIO(19)
37 #define AB8500_PIN_T5		ABX500_GPIO(20)
38 #define AB8500_PIN_H19		ABX500_GPIO(21)
39 #define AB8500_PIN_G20		ABX500_GPIO(22)
40 #define AB8500_PIN_G19		ABX500_GPIO(23)
41 #define AB8500_PIN_T14		ABX500_GPIO(24)
42 #define AB8500_PIN_R16		ABX500_GPIO(25)
43 #define AB8500_PIN_M16		ABX500_GPIO(26)
44 #define AB8500_PIN_J6		ABX500_GPIO(27)
45 #define AB8500_PIN_K6		ABX500_GPIO(28)
46 #define AB8500_PIN_G6		ABX500_GPIO(29)
47 #define AB8500_PIN_H6		ABX500_GPIO(30)
48 #define AB8500_PIN_F5		ABX500_GPIO(31)
49 #define AB8500_PIN_G5		ABX500_GPIO(32)
50 /* hole */
51 #define AB8500_PIN_R17		ABX500_GPIO(34)
52 #define AB8500_PIN_W15		ABX500_GPIO(35)
53 #define AB8500_PIN_A17		ABX500_GPIO(36)
54 #define AB8500_PIN_E15		ABX500_GPIO(37)
55 #define AB8500_PIN_C17		ABX500_GPIO(38)
56 #define AB8500_PIN_E16		ABX500_GPIO(39)
57 #define AB8500_PIN_T19		ABX500_GPIO(40)
58 #define AB8500_PIN_U19		ABX500_GPIO(41)
59 #define AB8500_PIN_U2		ABX500_GPIO(42)
60 
61 /* indicates the highest GPIO number */
62 #define AB8500_GPIO_MAX_NUMBER	42
63 
64 /*
65  * The names of the pins are denoted by GPIO number and ball name, even
66  * though they can be used for other things than GPIO, this is the first
67  * column in the table of the data sheet and often used on schematics and
68  * such.
69  */
70 static const struct pinctrl_pin_desc ab8500_pins[] = {
71 	PINCTRL_PIN(AB8500_PIN_T10, "GPIO1_T10"),
72 	PINCTRL_PIN(AB8500_PIN_T9, "GPIO2_T9"),
73 	PINCTRL_PIN(AB8500_PIN_U9, "GPIO3_U9"),
74 	PINCTRL_PIN(AB8500_PIN_W2, "GPIO4_W2"),
75 	/* hole */
76 	PINCTRL_PIN(AB8500_PIN_Y18, "GPIO6_Y18"),
77 	PINCTRL_PIN(AB8500_PIN_AA20, "GPIO7_AA20"),
78 	PINCTRL_PIN(AB8500_PIN_W18, "GPIO8_W18"),
79 	PINCTRL_PIN(AB8500_PIN_AA19, "GPIO9_AA19"),
80 	PINCTRL_PIN(AB8500_PIN_U17, "GPIO10_U17"),
81 	PINCTRL_PIN(AB8500_PIN_AA18, "GPIO11_AA18"),
82 	PINCTRL_PIN(AB8500_PIN_U16, "GPIO12_U16"),
83 	PINCTRL_PIN(AB8500_PIN_W17, "GPIO13_W17"),
84 	PINCTRL_PIN(AB8500_PIN_F14, "GPIO14_F14"),
85 	PINCTRL_PIN(AB8500_PIN_B17, "GPIO15_B17"),
86 	PINCTRL_PIN(AB8500_PIN_F15, "GPIO16_F15"),
87 	PINCTRL_PIN(AB8500_PIN_P5, "GPIO17_P5"),
88 	PINCTRL_PIN(AB8500_PIN_R5, "GPIO18_R5"),
89 	PINCTRL_PIN(AB8500_PIN_U5, "GPIO19_U5"),
90 	PINCTRL_PIN(AB8500_PIN_T5, "GPIO20_T5"),
91 	PINCTRL_PIN(AB8500_PIN_H19, "GPIO21_H19"),
92 	PINCTRL_PIN(AB8500_PIN_G20, "GPIO22_G20"),
93 	PINCTRL_PIN(AB8500_PIN_G19, "GPIO23_G19"),
94 	PINCTRL_PIN(AB8500_PIN_T14, "GPIO24_T14"),
95 	PINCTRL_PIN(AB8500_PIN_R16, "GPIO25_R16"),
96 	PINCTRL_PIN(AB8500_PIN_M16, "GPIO26_M16"),
97 	PINCTRL_PIN(AB8500_PIN_J6, "GPIO27_J6"),
98 	PINCTRL_PIN(AB8500_PIN_K6, "GPIO28_K6"),
99 	PINCTRL_PIN(AB8500_PIN_G6, "GPIO29_G6"),
100 	PINCTRL_PIN(AB8500_PIN_H6, "GPIO30_H6"),
101 	PINCTRL_PIN(AB8500_PIN_F5, "GPIO31_F5"),
102 	PINCTRL_PIN(AB8500_PIN_G5, "GPIO32_G5"),
103 	/* hole */
104 	PINCTRL_PIN(AB8500_PIN_R17, "GPIO34_R17"),
105 	PINCTRL_PIN(AB8500_PIN_W15, "GPIO35_W15"),
106 	PINCTRL_PIN(AB8500_PIN_A17, "GPIO36_A17"),
107 	PINCTRL_PIN(AB8500_PIN_E15, "GPIO37_E15"),
108 	PINCTRL_PIN(AB8500_PIN_C17, "GPIO38_C17"),
109 	PINCTRL_PIN(AB8500_PIN_E16, "GPIO39_E16"),
110 	PINCTRL_PIN(AB8500_PIN_T19, "GPIO40_T19"),
111 	PINCTRL_PIN(AB8500_PIN_U19, "GPIO41_U19"),
112 	PINCTRL_PIN(AB8500_PIN_U2, "GPIO42_U2"),
113 };
114 
115 /*
116  * Maps local GPIO offsets to local pin numbers
117  */
118 static const struct abx500_pinrange ab8500_pinranges[] = {
119 	ABX500_PINRANGE(1, 4, ABX500_ALT_A),
120 	ABX500_PINRANGE(6, 4, ABX500_ALT_A),
121 	ABX500_PINRANGE(10, 4, ABX500_DEFAULT),
122 	ABX500_PINRANGE(14, 12, ABX500_ALT_A),
123 	ABX500_PINRANGE(26, 1, ABX500_DEFAULT),
124 	ABX500_PINRANGE(27, 6, ABX500_ALT_A),
125 	ABX500_PINRANGE(34, 1, ABX500_ALT_A),
126 	ABX500_PINRANGE(35, 1, ABX500_DEFAULT),
127 	ABX500_PINRANGE(36, 7, ABX500_ALT_A),
128 };
129 
130 /*
131  * Read the pin group names like this:
132  * sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function
133  *
134  * The groups are arranged as sets per altfunction column, so we can
135  * mux in one group at a time by selecting the same altfunction for them
136  * all. When functions require pins on different altfunctions, you need
137  * to combine several groups.
138  */
139 
140 /* default column */
141 static const unsigned sysclkreq2_d_1_pins[] = { AB8500_PIN_T10 };
142 static const unsigned sysclkreq3_d_1_pins[] = { AB8500_PIN_T9 };
143 static const unsigned sysclkreq4_d_1_pins[] = { AB8500_PIN_U9 };
144 static const unsigned sysclkreq6_d_1_pins[] = { AB8500_PIN_W2 };
145 static const unsigned ycbcr0123_d_1_pins[] = { AB8500_PIN_Y18, AB8500_PIN_AA20,
146 					AB8500_PIN_W18, AB8500_PIN_AA19};
147 static const unsigned gpio10_d_1_pins[] = { AB8500_PIN_U17 };
148 static const unsigned gpio11_d_1_pins[] = { AB8500_PIN_AA18 };
149 static const unsigned gpio12_d_1_pins[] = { AB8500_PIN_U16 };
150 static const unsigned gpio13_d_1_pins[] = { AB8500_PIN_W17 };
151 static const unsigned pwmout1_d_1_pins[] = { AB8500_PIN_F14 };
152 static const unsigned pwmout2_d_1_pins[] = { AB8500_PIN_B17 };
153 static const unsigned pwmout3_d_1_pins[] = { AB8500_PIN_F15 };
154 
155 /* audio data interface 1*/
156 static const unsigned adi1_d_1_pins[] = { AB8500_PIN_P5, AB8500_PIN_R5,
157 					AB8500_PIN_U5, AB8500_PIN_T5 };
158 /* USBUICC */
159 static const unsigned usbuicc_d_1_pins[] = { AB8500_PIN_H19, AB8500_PIN_G20,
160 					AB8500_PIN_G19 };
161 static const unsigned sysclkreq7_d_1_pins[] = { AB8500_PIN_T14 };
162 static const unsigned sysclkreq8_d_1_pins[] = { AB8500_PIN_R16 };
163 static const unsigned gpio26_d_1_pins[] = { AB8500_PIN_M16 };
164 /* Digital microphone 1 and 2 */
165 static const unsigned dmic12_d_1_pins[] = { AB8500_PIN_J6, AB8500_PIN_K6 };
166 /* Digital microphone 3 and 4 */
167 static const unsigned dmic34_d_1_pins[] = { AB8500_PIN_G6, AB8500_PIN_H6 };
168 /* Digital microphone 5 and 6 */
169 static const unsigned dmic56_d_1_pins[] = { AB8500_PIN_F5, AB8500_PIN_G5 };
170 static const unsigned extcpena_d_1_pins[] = { AB8500_PIN_R17 };
171 static const unsigned gpio35_d_1_pins[] = { AB8500_PIN_W15 };
172 /* APE SPI */
173 static const unsigned apespi_d_1_pins[] = { AB8500_PIN_A17, AB8500_PIN_E15,
174 					AB8500_PIN_C17, AB8500_PIN_E16};
175 /* modem SDA/SCL */
176 static const unsigned modsclsda_d_1_pins[] = { AB8500_PIN_T19, AB8500_PIN_U19 };
177 static const unsigned sysclkreq5_d_1_pins[] = { AB8500_PIN_U2 };
178 
179 /* Altfunction A column */
180 static const unsigned gpio1_a_1_pins[] = { AB8500_PIN_T10 };
181 static const unsigned gpio2_a_1_pins[] = { AB8500_PIN_T9 };
182 static const unsigned gpio3_a_1_pins[] = { AB8500_PIN_U9 };
183 static const unsigned gpio4_a_1_pins[] = { AB8500_PIN_W2 };
184 static const unsigned gpio6_a_1_pins[] = { AB8500_PIN_Y18 };
185 static const unsigned gpio7_a_1_pins[] = { AB8500_PIN_AA20 };
186 static const unsigned gpio8_a_1_pins[] = { AB8500_PIN_W18 };
187 static const unsigned gpio9_a_1_pins[] = { AB8500_PIN_AA19 };
188 /* YCbCr4 YCbCr5 YCbCr6 YCbCr7*/
189 static const unsigned ycbcr4567_a_1_pins[] = { AB8500_PIN_U17, AB8500_PIN_AA18,
190 					AB8500_PIN_U16, AB8500_PIN_W17};
191 static const unsigned gpio14_a_1_pins[] = { AB8500_PIN_F14 };
192 static const unsigned gpio15_a_1_pins[] = { AB8500_PIN_B17 };
193 static const unsigned gpio16_a_1_pins[] = { AB8500_PIN_F15 };
194 static const unsigned gpio17_a_1_pins[] = { AB8500_PIN_P5 };
195 static const unsigned gpio18_a_1_pins[] = { AB8500_PIN_R5 };
196 static const unsigned gpio19_a_1_pins[] = { AB8500_PIN_U5 };
197 static const unsigned gpio20_a_1_pins[] = { AB8500_PIN_T5 };
198 static const unsigned gpio21_a_1_pins[] = { AB8500_PIN_H19 };
199 static const unsigned gpio22_a_1_pins[] = { AB8500_PIN_G20 };
200 static const unsigned gpio23_a_1_pins[] = { AB8500_PIN_G19 };
201 static const unsigned gpio24_a_1_pins[] = { AB8500_PIN_T14 };
202 static const unsigned gpio25_a_1_pins[] = { AB8500_PIN_R16 };
203 static const unsigned gpio27_a_1_pins[] = { AB8500_PIN_J6 };
204 static const unsigned gpio28_a_1_pins[] = { AB8500_PIN_K6 };
205 static const unsigned gpio29_a_1_pins[] = { AB8500_PIN_G6 };
206 static const unsigned gpio30_a_1_pins[] = { AB8500_PIN_H6 };
207 static const unsigned gpio31_a_1_pins[] = { AB8500_PIN_F5 };
208 static const unsigned gpio32_a_1_pins[] = { AB8500_PIN_G5 };
209 static const unsigned gpio34_a_1_pins[] = { AB8500_PIN_R17 };
210 static const unsigned gpio36_a_1_pins[] = { AB8500_PIN_A17 };
211 static const unsigned gpio37_a_1_pins[] = { AB8500_PIN_E15 };
212 static const unsigned gpio38_a_1_pins[] = { AB8500_PIN_C17 };
213 static const unsigned gpio39_a_1_pins[] = { AB8500_PIN_E16 };
214 static const unsigned gpio40_a_1_pins[] = { AB8500_PIN_T19 };
215 static const unsigned gpio41_a_1_pins[] = { AB8500_PIN_U19 };
216 static const unsigned gpio42_a_1_pins[] = { AB8500_PIN_U2 };
217 
218 /* Altfunction B colum */
219 static const unsigned hiqclkena_b_1_pins[] = { AB8500_PIN_U17 };
220 static const unsigned usbuiccpd_b_1_pins[] = { AB8500_PIN_AA18 };
221 static const unsigned i2ctrig1_b_1_pins[] = { AB8500_PIN_U16 };
222 static const unsigned i2ctrig2_b_1_pins[] = { AB8500_PIN_W17 };
223 
224 /* Altfunction C column */
225 static const unsigned usbvdat_c_1_pins[] = { AB8500_PIN_W17 };
226 
227 
228 #define AB8500_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins,		\
229 			.npins = ARRAY_SIZE(a##_pins), .altsetting = b }
230 
231 static const struct abx500_pingroup ab8500_groups[] = {
232 	/* default column */
233 	AB8500_PIN_GROUP(sysclkreq2_d_1, ABX500_DEFAULT),
234 	AB8500_PIN_GROUP(sysclkreq3_d_1, ABX500_DEFAULT),
235 	AB8500_PIN_GROUP(sysclkreq4_d_1, ABX500_DEFAULT),
236 	AB8500_PIN_GROUP(sysclkreq6_d_1, ABX500_DEFAULT),
237 	AB8500_PIN_GROUP(ycbcr0123_d_1, ABX500_DEFAULT),
238 	AB8500_PIN_GROUP(gpio10_d_1, ABX500_DEFAULT),
239 	AB8500_PIN_GROUP(gpio11_d_1, ABX500_DEFAULT),
240 	AB8500_PIN_GROUP(gpio12_d_1, ABX500_DEFAULT),
241 	AB8500_PIN_GROUP(gpio13_d_1, ABX500_DEFAULT),
242 	AB8500_PIN_GROUP(pwmout1_d_1, ABX500_DEFAULT),
243 	AB8500_PIN_GROUP(pwmout2_d_1, ABX500_DEFAULT),
244 	AB8500_PIN_GROUP(pwmout3_d_1, ABX500_DEFAULT),
245 	AB8500_PIN_GROUP(adi1_d_1, ABX500_DEFAULT),
246 	AB8500_PIN_GROUP(usbuicc_d_1, ABX500_DEFAULT),
247 	AB8500_PIN_GROUP(sysclkreq7_d_1, ABX500_DEFAULT),
248 	AB8500_PIN_GROUP(sysclkreq8_d_1, ABX500_DEFAULT),
249 	AB8500_PIN_GROUP(gpio26_d_1, ABX500_DEFAULT),
250 	AB8500_PIN_GROUP(dmic12_d_1, ABX500_DEFAULT),
251 	AB8500_PIN_GROUP(dmic34_d_1, ABX500_DEFAULT),
252 	AB8500_PIN_GROUP(dmic56_d_1, ABX500_DEFAULT),
253 	AB8500_PIN_GROUP(extcpena_d_1, ABX500_DEFAULT),
254 	AB8500_PIN_GROUP(gpio35_d_1, ABX500_DEFAULT),
255 	AB8500_PIN_GROUP(apespi_d_1, ABX500_DEFAULT),
256 	AB8500_PIN_GROUP(modsclsda_d_1, ABX500_DEFAULT),
257 	AB8500_PIN_GROUP(sysclkreq5_d_1, ABX500_DEFAULT),
258 	/* Altfunction A column */
259 	AB8500_PIN_GROUP(gpio1_a_1, ABX500_ALT_A),
260 	AB8500_PIN_GROUP(gpio2_a_1, ABX500_ALT_A),
261 	AB8500_PIN_GROUP(gpio3_a_1, ABX500_ALT_A),
262 	AB8500_PIN_GROUP(gpio4_a_1, ABX500_ALT_A),
263 	AB8500_PIN_GROUP(gpio6_a_1, ABX500_ALT_A),
264 	AB8500_PIN_GROUP(gpio7_a_1, ABX500_ALT_A),
265 	AB8500_PIN_GROUP(gpio8_a_1, ABX500_ALT_A),
266 	AB8500_PIN_GROUP(gpio9_a_1, ABX500_ALT_A),
267 	AB8500_PIN_GROUP(ycbcr4567_a_1, ABX500_ALT_A),
268 	AB8500_PIN_GROUP(gpio14_a_1, ABX500_ALT_A),
269 	AB8500_PIN_GROUP(gpio15_a_1, ABX500_ALT_A),
270 	AB8500_PIN_GROUP(gpio16_a_1, ABX500_ALT_A),
271 	AB8500_PIN_GROUP(gpio17_a_1, ABX500_ALT_A),
272 	AB8500_PIN_GROUP(gpio18_a_1, ABX500_ALT_A),
273 	AB8500_PIN_GROUP(gpio19_a_1, ABX500_ALT_A),
274 	AB8500_PIN_GROUP(gpio20_a_1, ABX500_ALT_A),
275 	AB8500_PIN_GROUP(gpio21_a_1, ABX500_ALT_A),
276 	AB8500_PIN_GROUP(gpio22_a_1, ABX500_ALT_A),
277 	AB8500_PIN_GROUP(gpio23_a_1, ABX500_ALT_A),
278 	AB8500_PIN_GROUP(gpio24_a_1, ABX500_ALT_A),
279 	AB8500_PIN_GROUP(gpio25_a_1, ABX500_ALT_A),
280 	AB8500_PIN_GROUP(gpio27_a_1, ABX500_ALT_A),
281 	AB8500_PIN_GROUP(gpio28_a_1, ABX500_ALT_A),
282 	AB8500_PIN_GROUP(gpio29_a_1, ABX500_ALT_A),
283 	AB8500_PIN_GROUP(gpio30_a_1, ABX500_ALT_A),
284 	AB8500_PIN_GROUP(gpio31_a_1, ABX500_ALT_A),
285 	AB8500_PIN_GROUP(gpio32_a_1, ABX500_ALT_A),
286 	AB8500_PIN_GROUP(gpio34_a_1, ABX500_ALT_A),
287 	AB8500_PIN_GROUP(gpio36_a_1, ABX500_ALT_A),
288 	AB8500_PIN_GROUP(gpio37_a_1, ABX500_ALT_A),
289 	AB8500_PIN_GROUP(gpio38_a_1, ABX500_ALT_A),
290 	AB8500_PIN_GROUP(gpio39_a_1, ABX500_ALT_A),
291 	AB8500_PIN_GROUP(gpio40_a_1, ABX500_ALT_A),
292 	AB8500_PIN_GROUP(gpio41_a_1, ABX500_ALT_A),
293 	AB8500_PIN_GROUP(gpio42_a_1, ABX500_ALT_A),
294 	/* Altfunction B column */
295 	AB8500_PIN_GROUP(hiqclkena_b_1, ABX500_ALT_B),
296 	AB8500_PIN_GROUP(usbuiccpd_b_1, ABX500_ALT_B),
297 	AB8500_PIN_GROUP(i2ctrig1_b_1, ABX500_ALT_B),
298 	AB8500_PIN_GROUP(i2ctrig2_b_1, ABX500_ALT_B),
299 	/* Altfunction C column */
300 	AB8500_PIN_GROUP(usbvdat_c_1, ABX500_ALT_C),
301 };
302 
303 /* We use this macro to define the groups applicable to a function */
304 #define AB8500_FUNC_GROUPS(a, b...)	   \
305 static const char * const a##_groups[] = { b };
306 
307 AB8500_FUNC_GROUPS(sysclkreq, "sysclkreq2_d_1", "sysclkreq3_d_1",
308 		"sysclkreq4_d_1", "sysclkreq5_d_1", "sysclkreq6_d_1",
309 		"sysclkreq7_d_1", "sysclkreq8_d_1");
310 AB8500_FUNC_GROUPS(ycbcr, "ycbcr0123_d_1", "ycbcr4567_a_1");
311 AB8500_FUNC_GROUPS(gpio, "gpio1_a_1", "gpio2_a_1", "gpio3_a_1", "gpio4_a_1",
312 		"gpio6_a_1", "gpio7_a_1", "gpio8_a_1", "gpio9_a_1",
313 		"gpio10_d_1", "gpio11_d_1", "gpio12_d_1", "gpio13_d_1",
314 		"gpio14_a_1", "gpio15_a_1", "gpio16_a_1", "gpio17_a_1",
315 		"gpio18_a_1", "gpio19_a_1", "gpio20_a_1", "gpio21_a_1",
316 		"gpio22_a_1", "gpio23_a_1", "gpio24_a_1", "gpio25_a_1",
317 		"gpio26_d_1", "gpio27_a_1", "gpio28_a_1", "gpio29_a_1",
318 		"gpio30_a_1", "gpio31_a_1", "gpio32_a_1", "gpio34_a_1",
319 		"gpio35_d_1", "gpio36_a_1", "gpio37_a_1", "gpio38_a_1",
320 		"gpio39_a_1", "gpio40_a_1", "gpio41_a_1", "gpio42_a_1");
321 AB8500_FUNC_GROUPS(pwmout, "pwmout1_d_1", "pwmout2_d_1", "pwmout3_d_1");
322 AB8500_FUNC_GROUPS(adi1, "adi1_d_1");
323 AB8500_FUNC_GROUPS(usbuicc, "usbuicc_d_1", "usbuiccpd_b_1");
324 AB8500_FUNC_GROUPS(dmic, "dmic12_d_1", "dmic34_d_1", "dmic56_d_1");
325 AB8500_FUNC_GROUPS(extcpena, "extcpena_d_1");
326 AB8500_FUNC_GROUPS(apespi, "apespi_d_1");
327 AB8500_FUNC_GROUPS(modsclsda, "modsclsda_d_1");
328 AB8500_FUNC_GROUPS(hiqclkena, "hiqclkena_b_1");
329 AB8500_FUNC_GROUPS(i2ctrig, "i2ctrig1_b_1", "i2ctrig2_b_1");
330 AB8500_FUNC_GROUPS(usbvdat, "usbvdat_c_1");
331 
332 #define FUNCTION(fname)					\
333 	{						\
334 		.name = #fname,				\
335 		.groups = fname##_groups,		\
336 		.ngroups = ARRAY_SIZE(fname##_groups),	\
337 	}
338 
339 static const struct abx500_function ab8500_functions[] = {
340 	FUNCTION(sysclkreq),
341 	FUNCTION(ycbcr),
342 	FUNCTION(gpio),
343 	FUNCTION(pwmout),
344 	FUNCTION(adi1),
345 	FUNCTION(usbuicc),
346 	FUNCTION(dmic),
347 	FUNCTION(extcpena),
348 	FUNCTION(apespi),
349 	FUNCTION(modsclsda),
350 	FUNCTION(hiqclkena),
351 	FUNCTION(i2ctrig),
352 	FUNCTION(usbvdat),
353 };
354 
355 /*
356  * this table translates what's is in the AB8500 specification regarding the
357  * balls alternate functions (as for DB, default, ALT_A, ALT_B and ALT_C).
358  * ALTERNATE_FUNCTIONS(GPIO_NUMBER, GPIOSEL bit, ALTERNATFUNC bit1,
359  * ALTERNATEFUNC bit2, ALTA val, ALTB val, ALTC val),
360  *
361  * example :
362  *
363  *	ALTERNATE_FUNCTIONS(13,     4,      3,      4, 0, 1 ,2),
364  *	means that pin AB8500_PIN_W17 (pin 13) supports 4 mux (default/ALT_A,
365  *	ALT_B and ALT_C), so GPIOSEL and ALTERNATFUNC registers are used to
366  *	select the mux.  ALTA, ALTB and ALTC val indicates values to write in
367  *	ALTERNATFUNC register. We need to specifies these values as SOC
368  *	designers didn't apply the same logic on how to select mux in the
369  *	ABx500 family.
370  *
371  *	As this pins supports at least ALT_B mux, default mux is
372  *	selected by writing 1 in GPIOSEL bit :
373  *
374  *		| GPIOSEL bit=4 | alternatfunc bit2=4 | alternatfunc bit1=3
375  *	default	|       1       |          0          |          0
376  *	alt_A	|       0       |          0          |          0
377  *	alt_B	|       0       |          0          |          1
378  *	alt_C	|       0       |          1          |          0
379  *
380  *	ALTERNATE_FUNCTIONS(8,      7, UNUSED, UNUSED),
381  *	means that pin AB8500_PIN_W18 (pin 8) supports 2 mux, so only GPIOSEL
382  *	register is used to select the mux. As this pins doesn't support at
383  *	least ALT_B mux, default mux is by writing 0 in GPIOSEL bit :
384  *
385  *		| GPIOSEL bit=7 | alternatfunc bit2=  | alternatfunc bit1=
386  *	default	|       0       |          0          |          0
387  *	alt_A	|       1       |          0          |          0
388  */
389 
390 static struct
391 alternate_functions ab8500_alternate_functions[AB8500_GPIO_MAX_NUMBER + 1] = {
392 	ALTERNATE_FUNCTIONS(0, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO0 */
393 	ALTERNATE_FUNCTIONS(1,	    0, UNUSED, UNUSED, 0, 0, 0), /* GPIO1, altA controlled by bit 0 */
394 	ALTERNATE_FUNCTIONS(2,      1, UNUSED, UNUSED, 0, 0, 0), /* GPIO2, altA controlled by bit 1 */
395 	ALTERNATE_FUNCTIONS(3,      2, UNUSED, UNUSED, 0, 0, 0), /* GPIO3, altA controlled by bit 2*/
396 	ALTERNATE_FUNCTIONS(4,      3, UNUSED, UNUSED, 0, 0, 0), /* GPIO4, altA controlled by bit 3*/
397 	/* bit 4 reserved */
398 	ALTERNATE_FUNCTIONS(5, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO5 */
399 	ALTERNATE_FUNCTIONS(6,      5, UNUSED, UNUSED, 0, 0, 0), /* GPIO6, altA controlled by bit 5*/
400 	ALTERNATE_FUNCTIONS(7,      6, UNUSED, UNUSED, 0, 0, 0), /* GPIO7, altA controlled by bit 6*/
401 	ALTERNATE_FUNCTIONS(8,      7, UNUSED, UNUSED, 0, 0, 0), /* GPIO8, altA controlled by bit 7*/
402 
403 	ALTERNATE_FUNCTIONS(9,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO9, altA controlled by bit 0*/
404 	ALTERNATE_FUNCTIONS(10,     1,      0, UNUSED, 0, 1, 0), /* GPIO10, altA and altB controlled by bit 0 */
405 	ALTERNATE_FUNCTIONS(11,     2,      1, UNUSED, 0, 1, 0), /* GPIO11, altA and altB controlled by bit 1 */
406 	ALTERNATE_FUNCTIONS(12,     3,      2, UNUSED, 0, 1, 0), /* GPIO12, altA and altB controlled by bit 2 */
407 	ALTERNATE_FUNCTIONS(13,     4,      3,      4, 0, 1, 2), /* GPIO13, altA altB and altC controlled by bit 3 and 4 */
408 	ALTERNATE_FUNCTIONS(14,     5, UNUSED, UNUSED, 0, 0, 0), /* GPIO14, altA controlled by bit 5 */
409 	ALTERNATE_FUNCTIONS(15,     6, UNUSED, UNUSED, 0, 0, 0), /* GPIO15, altA controlled by bit 6 */
410 	ALTERNATE_FUNCTIONS(16,     7, UNUSED, UNUSED, 0, 0, 0), /* GPIO16, altA controlled by bit 7 */
411 	/*
412 	 * pins 17 to 20 are special case, only bit 0 is used to select
413 	 * alternate function for these 4 pins.
414 	 * bits 1 to 3 are reserved
415 	 */
416 	ALTERNATE_FUNCTIONS(17,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO17, altA controlled by bit 0 */
417 	ALTERNATE_FUNCTIONS(18,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO18, altA controlled by bit 0 */
418 	ALTERNATE_FUNCTIONS(19,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO19, altA controlled by bit 0 */
419 	ALTERNATE_FUNCTIONS(20,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO20, altA controlled by bit 0 */
420 	ALTERNATE_FUNCTIONS(21,      4, UNUSED, UNUSED, 0, 0, 0), /* GPIO21, altA controlled by bit 4 */
421 	ALTERNATE_FUNCTIONS(22,      5, UNUSED, UNUSED, 0, 0, 0), /* GPIO22, altA controlled by bit 5 */
422 	ALTERNATE_FUNCTIONS(23,      6, UNUSED, UNUSED, 0, 0, 0), /* GPIO23, altA controlled by bit 6 */
423 	ALTERNATE_FUNCTIONS(24,      7, UNUSED, UNUSED, 0, 0, 0), /* GPIO24, altA controlled by bit 7 */
424 
425 	ALTERNATE_FUNCTIONS(25,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO25, altA controlled by bit 0 */
426 	/* pin 26 special case, no alternate function, bit 1 reserved */
427 	ALTERNATE_FUNCTIONS(26, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* GPIO26 */
428 	ALTERNATE_FUNCTIONS(27,      2, UNUSED, UNUSED, 0, 0, 0), /* GPIO27, altA controlled by bit 2 */
429 	ALTERNATE_FUNCTIONS(28,      3, UNUSED, UNUSED, 0, 0, 0), /* GPIO28, altA controlled by bit 3 */
430 	ALTERNATE_FUNCTIONS(29,      4, UNUSED, UNUSED, 0, 0, 0), /* GPIO29, altA controlled by bit 4 */
431 	ALTERNATE_FUNCTIONS(30,      5, UNUSED, UNUSED, 0, 0, 0), /* GPIO30, altA controlled by bit 5 */
432 	ALTERNATE_FUNCTIONS(31,      6, UNUSED, UNUSED, 0, 0, 0), /* GPIO31, altA controlled by bit 6 */
433 	ALTERNATE_FUNCTIONS(32,      7, UNUSED, UNUSED, 0, 0, 0), /* GPIO32, altA controlled by bit 7 */
434 
435 	ALTERNATE_FUNCTIONS(33, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO33 */
436 	ALTERNATE_FUNCTIONS(34,      1, UNUSED, UNUSED, 0, 0, 0), /* GPIO34, altA controlled by bit 1 */
437 	/* pin 35 special case, no alternate function, bit 2 reserved */
438 	ALTERNATE_FUNCTIONS(35, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* GPIO35 */
439 	ALTERNATE_FUNCTIONS(36,      3, UNUSED, UNUSED, 0, 0, 0), /* GPIO36, altA controlled by bit 3 */
440 	ALTERNATE_FUNCTIONS(37,      4, UNUSED, UNUSED, 0, 0, 0), /* GPIO37, altA controlled by bit 4 */
441 	ALTERNATE_FUNCTIONS(38,      5, UNUSED, UNUSED, 0, 0, 0), /* GPIO38, altA controlled by bit 5 */
442 	ALTERNATE_FUNCTIONS(39,      6, UNUSED, UNUSED, 0, 0, 0), /* GPIO39, altA controlled by bit 6 */
443 	ALTERNATE_FUNCTIONS(40,      7, UNUSED, UNUSED, 0, 0, 0), /* GPIO40, altA controlled by bit 7 */
444 
445 	ALTERNATE_FUNCTIONS(41,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO41, altA controlled by bit 0 */
446 	ALTERNATE_FUNCTIONS(42,      1, UNUSED, UNUSED, 0, 0, 0), /* GPIO42, altA controlled by bit 1 */
447 };
448 
449 /*
450  * Only some GPIOs are interrupt capable, and they are
451  * organized in discontiguous clusters:
452  *
453  *	GPIO6 to GPIO13
454  *	GPIO24 and GPIO25
455  *	GPIO36 to GPIO41
456  */
457 static struct abx500_gpio_irq_cluster ab8500_gpio_irq_cluster[] = {
458 	GPIO_IRQ_CLUSTER(6,  13, AB8500_INT_GPIO6R),
459 	GPIO_IRQ_CLUSTER(24, 25, AB8500_INT_GPIO24R),
460 	GPIO_IRQ_CLUSTER(36, 41, AB8500_INT_GPIO36R),
461 };
462 
463 static struct abx500_pinctrl_soc_data ab8500_soc = {
464 	.gpio_ranges = ab8500_pinranges,
465 	.gpio_num_ranges = ARRAY_SIZE(ab8500_pinranges),
466 	.pins = ab8500_pins,
467 	.npins = ARRAY_SIZE(ab8500_pins),
468 	.functions = ab8500_functions,
469 	.nfunctions = ARRAY_SIZE(ab8500_functions),
470 	.groups = ab8500_groups,
471 	.ngroups = ARRAY_SIZE(ab8500_groups),
472 	.alternate_functions = ab8500_alternate_functions,
473 	.gpio_irq_cluster = ab8500_gpio_irq_cluster,
474 	.ngpio_irq_cluster = ARRAY_SIZE(ab8500_gpio_irq_cluster),
475 	.irq_gpio_rising_offset = AB8500_INT_GPIO6R,
476 	.irq_gpio_falling_offset = AB8500_INT_GPIO6F,
477 	.irq_gpio_factor = 1,
478 };
479 
abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data ** soc)480 void abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc)
481 {
482 	*soc = &ab8500_soc;
483 }
484