| /openbmc/linux/drivers/media/platform/verisilicon/ |
| H A D | rockchip_vpu2_hw_h264_dec.c | 28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument
34 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
36 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
37 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
39 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
40 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
[all …]
|
| H A D | hantro_g1_mpeg2_dec.c | 25 #define G1_REG_DEC_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24)) argument
26 #define G1_REG_DEC_TIMEOUT_E(v) ((v) ? BIT(23) : 0) argument
27 #define G1_REG_DEC_STRSWAP32_E(v) ((v) ? BIT(22) : 0) argument
28 #define G1_REG_DEC_STRENDIAN_E(v) ((v) ? BIT(21) : 0) argument
29 #define G1_REG_DEC_INSWAP32_E(v) ((v) ? BIT(20) : 0) argument
30 #define G1_REG_DEC_OUTSWAP32_E(v) ((v) ? BIT(19) : 0) argument
31 #define G1_REG_DEC_DATA_DISC_E(v) ((v) ? BIT(18) : 0) argument
32 #define G1_REG_DEC_LATENCY(v) (((v) << 11) & GENMASK(16, 11)) argument
33 #define G1_REG_DEC_CLK_GATE_E(v) ((v) ? BIT(10) : 0) argument
34 #define G1_REG_DEC_IN_ENDIAN(v) ((v) ? BIT(9) : 0) argument
[all …]
|
| H A D | rockchip_vpu2_hw_mpeg2_dec.c | 23 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
25 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
26 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
27 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
28 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
30 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
31 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
33 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
34 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
35 #define VDPU_REG_STARTMB_Y(v) (((v) << 0) & GENMASK(7, 0)) argument
[all …]
|
| /openbmc/linux/include/linux/atomic/ |
| H A D | atomic-instrumented.h | 30 atomic_read(const atomic_t *v) in atomic_read()
47 atomic_read_acquire(const atomic_t *v) in atomic_read_acquire()
65 atomic_set(atomic_t *v, int i) in atomic_set()
83 atomic_set_release(atomic_t *v, int i) in atomic_set_release()
102 atomic_add(int i, atomic_t *v) in atomic_add()
120 atomic_add_return(int i, atomic_t *v) in atomic_add_return()
139 atomic_add_return_acquire(int i, atomic_t *v) in atomic_add_return_acquire()
157 atomic_add_return_release(int i, atomic_t *v) in atomic_add_return_release()
176 atomic_add_return_relaxed(int i, atomic_t *v) in atomic_add_return_relaxed()
194 atomic_fetch_add(int i, atomic_t *v) in atomic_fetch_add()
[all …]
|
| H A D | atomic-long.h | 35 raw_atomic_long_read(const atomic_long_t *v) in raw_atomic_long_read()
55 raw_atomic_long_read_acquire(const atomic_long_t *v) in raw_atomic_long_read_acquire()
76 raw_atomic_long_set(atomic_long_t *v, long i) in raw_atomic_long_set()
97 raw_atomic_long_set_release(atomic_long_t *v, long i) in raw_atomic_long_set_release()
118 raw_atomic_long_add(long i, atomic_long_t *v) in raw_atomic_long_add()
139 raw_atomic_long_add_return(long i, atomic_long_t *v) in raw_atomic_long_add_return()
160 raw_atomic_long_add_return_acquire(long i, atomic_long_t *v) in raw_atomic_long_add_return_acquire()
181 raw_atomic_long_add_return_release(long i, atomic_long_t *v) in raw_atomic_long_add_return_release()
202 raw_atomic_long_add_return_relaxed(long i, atomic_long_t *v) in raw_atomic_long_add_return_relaxed()
223 raw_atomic_long_fetch_add(long i, atomic_long_t *v) in raw_atomic_long_fetch_add()
[all …]
|
| H A D | atomic-arch-fallback.h | 442 raw_atomic_read(const atomic_t *v) in raw_atomic_read()
458 raw_atomic_read_acquire(const atomic_t *v) in raw_atomic_read_acquire()
488 raw_atomic_set(atomic_t *v, int i) in raw_atomic_set()
505 raw_atomic_set_release(atomic_t *v, int i) in raw_atomic_set_release()
531 raw_atomic_add(int i, atomic_t *v) in raw_atomic_add()
548 raw_atomic_add_return(int i, atomic_t *v) in raw_atomic_add_return()
575 raw_atomic_add_return_acquire(int i, atomic_t *v) in raw_atomic_add_return_acquire()
602 raw_atomic_add_return_release(int i, atomic_t *v) in raw_atomic_add_return_release()
628 raw_atomic_add_return_relaxed(int i, atomic_t *v) in raw_atomic_add_return_relaxed()
651 raw_atomic_fetch_add(int i, atomic_t *v) in raw_atomic_fetch_add()
[all …]
|
| /openbmc/linux/drivers/gpu/host1x/hw/ |
| H A D | hw_host1x01_uclass.h | 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f()
70 #define HOST1X_UCLASS_WAIT_SYNCPT_INDX_F(v) \ argument
72 static inline u32 host1x_uclass_wait_syncpt_thresh_f(u32 v) in host1x_uclass_wait_syncpt_thresh_f()
76 #define HOST1X_UCLASS_WAIT_SYNCPT_THRESH_F(v) \ argument
84 static inline u32 host1x_uclass_wait_syncpt_base_indx_f(u32 v) in host1x_uclass_wait_syncpt_base_indx_f()
88 #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_INDX_F(v) \ argument
[all …]
|
| H A D | hw_host1x06_uclass.h | 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f()
70 #define HOST1X_UCLASS_WAIT_SYNCPT_INDX_F(v) \ argument
72 static inline u32 host1x_uclass_wait_syncpt_thresh_f(u32 v) in host1x_uclass_wait_syncpt_thresh_f()
76 #define HOST1X_UCLASS_WAIT_SYNCPT_THRESH_F(v) \ argument
84 static inline u32 host1x_uclass_wait_syncpt_base_indx_f(u32 v) in host1x_uclass_wait_syncpt_base_indx_f()
88 #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_INDX_F(v) \ argument
[all …]
|
| H A D | hw_host1x04_uclass.h | 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f()
70 #define HOST1X_UCLASS_WAIT_SYNCPT_INDX_F(v) \ argument
72 static inline u32 host1x_uclass_wait_syncpt_thresh_f(u32 v) in host1x_uclass_wait_syncpt_thresh_f()
76 #define HOST1X_UCLASS_WAIT_SYNCPT_THRESH_F(v) \ argument
84 static inline u32 host1x_uclass_wait_syncpt_base_indx_f(u32 v) in host1x_uclass_wait_syncpt_base_indx_f()
88 #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_INDX_F(v) \ argument
[all …]
|
| H A D | hw_host1x07_uclass.h | 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f()
70 #define HOST1X_UCLASS_WAIT_SYNCPT_INDX_F(v) \ argument
72 static inline u32 host1x_uclass_wait_syncpt_thresh_f(u32 v) in host1x_uclass_wait_syncpt_thresh_f()
76 #define HOST1X_UCLASS_WAIT_SYNCPT_THRESH_F(v) \ argument
84 static inline u32 host1x_uclass_wait_syncpt_base_indx_f(u32 v) in host1x_uclass_wait_syncpt_base_indx_f()
88 #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_INDX_F(v) \ argument
[all …]
|
| H A D | hw_host1x08_uclass.h | 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f()
70 #define HOST1X_UCLASS_WAIT_SYNCPT_INDX_F(v) \ argument
72 static inline u32 host1x_uclass_wait_syncpt_thresh_f(u32 v) in host1x_uclass_wait_syncpt_thresh_f()
76 #define HOST1X_UCLASS_WAIT_SYNCPT_THRESH_F(v) \ argument
84 static inline u32 host1x_uclass_wait_syncpt_base_indx_f(u32 v) in host1x_uclass_wait_syncpt_base_indx_f()
88 #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_INDX_F(v) \ argument
[all …]
|
| H A D | hw_host1x05_uclass.h | 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f()
70 #define HOST1X_UCLASS_WAIT_SYNCPT_INDX_F(v) \ argument
72 static inline u32 host1x_uclass_wait_syncpt_thresh_f(u32 v) in host1x_uclass_wait_syncpt_thresh_f()
76 #define HOST1X_UCLASS_WAIT_SYNCPT_THRESH_F(v) \ argument
84 static inline u32 host1x_uclass_wait_syncpt_base_indx_f(u32 v) in host1x_uclass_wait_syncpt_base_indx_f()
88 #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_INDX_F(v) \ argument
[all …]
|
| H A D | hw_host1x02_uclass.h | 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f()
70 #define HOST1X_UCLASS_WAIT_SYNCPT_INDX_F(v) \ argument
72 static inline u32 host1x_uclass_wait_syncpt_thresh_f(u32 v) in host1x_uclass_wait_syncpt_thresh_f()
76 #define HOST1X_UCLASS_WAIT_SYNCPT_THRESH_F(v) \ argument
84 static inline u32 host1x_uclass_wait_syncpt_base_indx_f(u32 v) in host1x_uclass_wait_syncpt_base_indx_f()
88 #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_INDX_F(v) \ argument
[all …]
|
| /openbmc/linux/drivers/media/platform/nxp/ |
| H A D | imx-pxp.h | 19 #define BF_PXP_CTRL_SFTRST(v) \ argument
22 #define BF_PXP_CTRL_CLKGATE(v) \ argument
25 #define BF_PXP_CTRL_RSVD4(v) \ argument
28 #define BF_PXP_CTRL_EN_REPEAT(v) \ argument
31 #define BF_PXP_CTRL_ENABLE_ROTATE1(v) \ argument
34 #define BF_PXP_CTRL_ENABLE_ROTATE0(v) \ argument
37 #define BF_PXP_CTRL_ENABLE_LUT(v) \ argument
40 #define BF_PXP_CTRL_ENABLE_CSC2(v) \ argument
43 #define BF_PXP_CTRL_BLOCK_SIZE(v) \ argument
48 #define BF_PXP_CTRL_RSVD1(v) \ argument
[all …]
|
| /openbmc/u-boot/arch/arm/include/asm/arch-mx5/ |
| H A D | crm_regs.h | 80 #define MXC_CCM_CCR_OSCNT(v) ((v) & 0xFF) argument
92 #define MXC_CCM_CCSR_STEP_SEL(v) (((v) & 0x3) << 7) argument
96 #define MXC_CCM_CCSR_PLL2_DIV_PODF(v) (((v) & 0x3) << 5) argument
100 #define MXC_CCM_CCSR_PLL3_DIV_PODF(v) (((v) & 0x3) << 3) argument
109 #define MXC_CCM_CACRR_ARM_PODF(v) ((v) & 0x7) argument
116 #define MXC_CCM_CBCDR_DDR_PODF(v) (((v) & 0x7) << 27) argument
122 #define MXC_CCM_CBCDR_EMI_PODF(v) (((v) & 0x7) << 22) argument
126 #define MXC_CCM_CBCDR_AXI_B_PODF(v) (((v) & 0x7) << 19) argument
130 #define MXC_CCM_CBCDR_AXI_A_PODF(v) (((v) & 0x7) << 16) argument
134 #define MXC_CCM_CBCDR_NFC_PODF(v) (((v) & 0x7) << 13) argument
[all …]
|
| /openbmc/linux/arch/x86/lib/ |
| H A D | atomic64_386_32.S | 35 #define v %ecx macro
43 #define v %esi macro
51 #define v %esi macro
61 #define v %ecx macro
69 #define v %ecx macro
79 #define v %ecx macro
87 #define v %ecx macro
100 #define v %esi macro
108 #define v %esi macro
120 #define v %esi macro
[all …]
|
| /openbmc/linux/drivers/staging/media/sunxi/sun6i-isp/ |
| H A D | sun6i_isp_reg.h | 21 #define SUN6I_ISP_FE_CFG_SRC0_MODE(v) (((v) << 8) & GENMASK(9, 8)) argument
22 #define SUN6I_ISP_FE_CFG_SRC1_MODE(v) (((v) << 16) & GENMASK(17, 16)) argument
33 #define SUN6I_ISP_FE_CTRL_OUTPUT_SPEED_CTRL(v) (((v) << 16) & GENMASK(17, 16)) argument
104 #define SUN6I_ISP_MODE_INPUT_FMT(v) ((v) & GENMASK(2, 0)) argument
105 #define SUN6I_ISP_MODE_INPUT_YUV_SEQ(v) (((v) << 3) & GENMASK(4, 3)) argument
106 #define SUN6I_ISP_MODE_OTF_DPC(v) (((v) << 16) & BIT(16)) argument
107 #define SUN6I_ISP_MODE_SHARP(v) (((v) << 17) & BIT(17)) argument
108 #define SUN6I_ISP_MODE_HIST(v) (((v) << 20) & GENMASK(21, 20)) argument
123 #define SUN6I_ISP_IN_CFG_STRIDE_DIV16(v) ((v) & GENMASK(10, 0)) argument
133 #define SUN6I_ISP_AE_CFG_LOW_BRI_TH(v) ((v) & GENMASK(11, 0)) argument
[all …]
|
| /openbmc/linux/drivers/iio/adc/ |
| H A D | stm32-dfsdm.h | 52 #define DFSDM_CHCFGR1_SITP(v) FIELD_PREP(DFSDM_CHCFGR1_SITP_MASK, v) argument
54 #define DFSDM_CHCFGR1_SPICKSEL(v) FIELD_PREP(DFSDM_CHCFGR1_SPICKSEL_MASK, v) argument
56 #define DFSDM_CHCFGR1_SCDEN(v) FIELD_PREP(DFSDM_CHCFGR1_SCDEN_MASK, v) argument
58 #define DFSDM_CHCFGR1_CKABEN(v) FIELD_PREP(DFSDM_CHCFGR1_CKABEN_MASK, v) argument
60 #define DFSDM_CHCFGR1_CHEN(v) FIELD_PREP(DFSDM_CHCFGR1_CHEN_MASK, v) argument
62 #define DFSDM_CHCFGR1_CHINSEL(v) FIELD_PREP(DFSDM_CHCFGR1_CHINSEL_MASK, v) argument
64 #define DFSDM_CHCFGR1_DATMPX(v) FIELD_PREP(DFSDM_CHCFGR1_DATMPX_MASK, v) argument
66 #define DFSDM_CHCFGR1_DATPACK(v) FIELD_PREP(DFSDM_CHCFGR1_DATPACK_MASK, v) argument
68 #define DFSDM_CHCFGR1_CKOUTDIV(v) FIELD_PREP(DFSDM_CHCFGR1_CKOUTDIV_MASK, v) argument
70 #define DFSDM_CHCFGR1_CKOUTSRC(v) FIELD_PREP(DFSDM_CHCFGR1_CKOUTSRC_MASK, v) argument
[all …]
|
| /openbmc/linux/arch/ia64/include/asm/ |
| H A D | atomic.h | 24 #define arch_atomic_read(v) READ_ONCE((v)->counter) argument
25 #define arch_atomic64_read(v) READ_ONCE((v)->counter) argument
27 #define arch_atomic_set(v,i) WRITE_ONCE(((v)->counter), (i)) argument
28 #define arch_atomic64_set(v,i) WRITE_ONCE(((v)->counter), (i)) argument
77 #define arch_atomic_add_return(i,v) \ argument
85 #define arch_atomic_sub_return(i,v) \ argument
93 #define arch_atomic_fetch_add(i,v) \ argument
101 #define arch_atomic_fetch_sub(i,v) \ argument
113 #define arch_atomic_and(i,v) (void)ia64_atomic_fetch_and(i,v) argument
114 #define arch_atomic_or(i,v) (void)ia64_atomic_fetch_or(i,v) argument
[all …]
|
| /openbmc/linux/sound/soc/qcom/ |
| H A D | lpass-lpaif-reg.h | 11 #define LPAIF_I2SCTL_REG_ADDR(v, addr, port) \ argument
14 #define LPAIF_I2SCTL_REG(v, port) LPAIF_I2SCTL_REG_ADDR(v, 0x0, (port)) argument
68 #define LPAIF_IRQ_REG_ADDR(v, addr, port) \ argument
73 #define LPAIF_IRQEN_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x0, (port)) argument
74 #define LPAIF_IRQSTAT_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x4, (port)) argument
75 #define LPAIF_IRQCLEAR_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0xC, (port)) argument
78 #define LPAIF_RXTX_IRQ_REG_ADDR(v, addr, port) \ argument
81 #define LPAIF_RXTX_IRQEN_REG(v, port) LPAIF_RXTX_IRQ_REG_ADDR(v, 0x0, port) argument
82 #define LPAIF_RXTX_IRQSTAT_REG(v, port) LPAIF_RXTX_IRQ_REG_ADDR(v, 0x4, port) argument
83 #define LPAIF_RXTX_IRQCLEAR_REG(v, port) LPAIF_RXTX_IRQ_REG_ADDR(v, 0xC, port) argument
[all …]
|
| /openbmc/u-boot/include/asm-generic/ |
| H A D | atomic-long.h | 29 atomic64_t *v = (atomic64_t *)l; in atomic_long_read() local
36 atomic64_t *v = (atomic64_t *)l; in atomic_long_set() local
43 atomic64_t *v = (atomic64_t *)l; in atomic_long_inc() local
50 atomic64_t *v = (atomic64_t *)l; in atomic_long_dec() local
57 atomic64_t *v = (atomic64_t *)l; in atomic_long_add() local
64 atomic64_t *v = (atomic64_t *)l; in atomic_long_sub() local
72 atomic64_t *v = (atomic64_t *)l; in atomic_long_sub_and_test() local
79 atomic64_t *v = (atomic64_t *)l; in atomic_long_dec_and_test() local
86 atomic64_t *v = (atomic64_t *)l; in atomic_long_inc_and_test() local
93 atomic64_t *v = (atomic64_t *)l; in atomic_long_add_negative() local
[all …]
|
| /openbmc/linux/arch/x86/include/asm/ |
| H A D | atomic.h | 17 static __always_inline int arch_atomic_read(const atomic_t *v) in arch_atomic_read()
26 static __always_inline void arch_atomic_set(atomic_t *v, int i) in arch_atomic_set()
31 static __always_inline void arch_atomic_add(int i, atomic_t *v) in arch_atomic_add()
38 static __always_inline void arch_atomic_sub(int i, atomic_t *v) in arch_atomic_sub()
45 static __always_inline bool arch_atomic_sub_and_test(int i, atomic_t *v) in arch_atomic_sub_and_test()
51 static __always_inline void arch_atomic_inc(atomic_t *v) in arch_atomic_inc()
58 static __always_inline void arch_atomic_dec(atomic_t *v) in arch_atomic_dec()
65 static __always_inline bool arch_atomic_dec_and_test(atomic_t *v) in arch_atomic_dec_and_test()
71 static __always_inline bool arch_atomic_inc_and_test(atomic_t *v) in arch_atomic_inc_and_test()
77 static __always_inline bool arch_atomic_add_negative(int i, atomic_t *v) in arch_atomic_add_negative()
[all …]
|
| H A D | atomic64_64.h | 13 static __always_inline s64 arch_atomic64_read(const atomic64_t *v) in arch_atomic64_read()
18 static __always_inline void arch_atomic64_set(atomic64_t *v, s64 i) in arch_atomic64_set()
23 static __always_inline void arch_atomic64_add(s64 i, atomic64_t *v) in arch_atomic64_add()
30 static __always_inline void arch_atomic64_sub(s64 i, atomic64_t *v) in arch_atomic64_sub()
37 static __always_inline bool arch_atomic64_sub_and_test(s64 i, atomic64_t *v) in arch_atomic64_sub_and_test()
43 static __always_inline void arch_atomic64_inc(atomic64_t *v) in arch_atomic64_inc()
51 static __always_inline void arch_atomic64_dec(atomic64_t *v) in arch_atomic64_dec()
59 static __always_inline bool arch_atomic64_dec_and_test(atomic64_t *v) in arch_atomic64_dec_and_test()
65 static __always_inline bool arch_atomic64_inc_and_test(atomic64_t *v) in arch_atomic64_inc_and_test()
71 static __always_inline bool arch_atomic64_add_negative(s64 i, atomic64_t *v) in arch_atomic64_add_negative()
[all …]
|
| /openbmc/u-boot/arch/arm/include/asm/arch-vf610/ |
| H A D | imx-regs.h | 131 #define DDRMC_CR02_DRAM_TINIT(v) ((v) & 0xffffff) argument
132 #define DDRMC_CR10_TRST_PWRON(v) (v) argument
133 #define DDRMC_CR11_CKE_INACTIVE(v) (v) argument
134 #define DDRMC_CR12_WRLAT(v) (((v) & 0x1f) << 8) argument
135 #define DDRMC_CR12_CASLAT_LIN(v) ((v) & 0x3f) argument
136 #define DDRMC_CR13_TRC(v) (((v) & 0xff) << 24) argument
137 #define DDRMC_CR13_TRRD(v) (((v) & 0xff) << 16) argument
138 #define DDRMC_CR13_TCCD(v) (((v) & 0x1f) << 8) argument
139 #define DDRMC_CR13_TBST_INT_INTERVAL(v) ((v) & 0x7) argument
140 #define DDRMC_CR14_TFAW(v) (((v) & 0x3f) << 24) argument
[all …]
|
| /openbmc/u-boot/arch/mips/mach-ath79/qca953x/ |
| H A D | lowlevel_init.S | 25 #define SET_FIELD(name, v) (((v) & QCA953X_##name##_MASK) << \ argument
28 #define DPLL2_KI(v) SET_FIELD(SRIF_DPLL2_KI, v) argument
29 #define DPLL2_KD(v) SET_FIELD(SRIF_DPLL2_KD, v) argument
33 #define PLL_CPU_NFRAC(v) SET_FIELD(PLL_CPU_CONFIG_NFRAC, v) argument
34 #define PLL_CPU_NINT(v) SET_FIELD(PLL_CPU_CONFIG_NINT, v) argument
35 #define PLL_CPU_REFDIV(v) SET_FIELD(PLL_CPU_CONFIG_REFDIV, v) argument
36 #define PLL_CPU_OUTDIV(v) SET_FIELD(PLL_CPU_CONFIG_OUTDIV, v) argument
43 #define PLL_DDR_NFRAC(v) SET_FIELD(PLL_DDR_CONFIG_NFRAC, v) argument
44 #define PLL_DDR_NINT(v) SET_FIELD(PLL_DDR_CONFIG_NINT, v) argument
45 #define PLL_DDR_REFDIV(v) SET_FIELD(PLL_DDR_CONFIG_REFDIV, v) argument
[all …]
|