/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2016 Google Inc. */ /* Core Clocks */ #define PLL_DPLL 2 #define PLL_D2PLL 3 #define PLL_MPLL 4 /* Bus Clocks, derived from core clocks */ #define BCLK_PCLK 101 #define BCLK_LHCLK 102 #define BCLK_MACCLK 103 #define BCLK_SDCLK 104 #define BCLK_ARMCLK 105 #define MCLK_DDR 201 /* Special clocks */ #define PCLK_UART1 501 #define PCLK_UART2 502 #define PCLK_UART3 503 #define PCLK_UART4 504 #define PCLK_UART5 505 #define PCLK_MAC1 506 #define PCLK_MAC2 507 /* come from linux kernel */ #define ASPEED_CLK_GATE_ECLK 0 #define ASPEED_CLK_GATE_GCLK 1 #define ASPEED_CLK_GATE_MCLK 2 #define ASPEED_CLK_GATE_VCLK 3 #define ASPEED_CLK_GATE_BCLK 4 #define ASPEED_CLK_GATE_DCLK 5 #define ASPEED_CLK_GATE_REFCLK 6 #define ASPEED_CLK_GATE_USBPORT2CLK 7 #define ASPEED_CLK_GATE_LCLK 8 #define ASPEED_CLK_GATE_USBUHCICLK 9 #define ASPEED_CLK_GATE_D1CLK 10 #define ASPEED_CLK_GATE_YCLK 11 #define ASPEED_CLK_GATE_USBPORT1CLK 12 #define ASPEED_CLK_GATE_UART1CLK 13 #define ASPEED_CLK_GATE_UART2CLK 14 #define ASPEED_CLK_GATE_UART5CLK 15 #define ASPEED_CLK_GATE_ESPICLK 16 #define ASPEED_CLK_GATE_MAC1CLK 17 #define ASPEED_CLK_GATE_MAC2CLK 18 #define ASPEED_CLK_GATE_RSACLK 19 #define ASPEED_CLK_GATE_UART3CLK 20 #define ASPEED_CLK_GATE_UART4CLK 21 #define ASPEED_CLK_GATE_SDCLK 22 #define ASPEED_CLK_GATE_LHCCLK 23 #define ASPEED_CLK_GATE_SDEXTCLK 24 #define ASPEED_CLK_HPLL 25 #define ASPEED_CLK_AHB 26 #define ASPEED_CLK_APB 27 #define ASPEED_CLK_UART 28 #define ASPEED_CLK_SDIO 29 #define ASPEED_CLK_ECLK 30 #define ASPEED_CLK_ECLK_MUX 31 #define ASPEED_CLK_LHCLK 32 #define ASPEED_CLK_MAC 33 #define ASPEED_CLK_BCLK 34 #define ASPEED_CLK_MPLL 35 #define ASPEED_CLK_24M 36