// SPDX-License-Identifier: GPL-2.0+
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"

/ {
	model = "Aspeed BMC";
	compatible = "aspeed,ast2600";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		i2c3 = &i2c3;
		i2c4 = &i2c4;
		i2c5 = &i2c5;
		i2c6 = &i2c6;
		i2c7 = &i2c7;
		i2c8 = &i2c8;
		i2c9 = &i2c9;
		i2c10 = &i2c10;
		i2c11 = &i2c11;
		i2c12 = &i2c12;
		i2c13 = &i2c13;
		i2c14 = &i2c14;
		i2c15 = &i2c15;
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		serial3 = &uart4;
		serial4 = &uart5;
		serial5 = &uart6;
		serial6 = &uart7;
		serial7 = &uart8;
		serial8 = &uart9;
		serial9 = &uart10;
		serial10 = &uart11;
		serial11 = &uart12;
		serial12 = &uart13;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		enable-method = "aspeed,ast2600-smp";

		cpu@0 {
			compatible = "arm,cortex-a7";
			device_type = "cpu";
			reg = <0>;
			clock-frequency = <48000000>;
		};

		cpu@1 {
			compatible = "arm,cortex-a7";
			device_type = "cpu";
			reg = <1>;
			clock-frequency = <48000000>;
		};

	};

	timer {
		compatible = "arm,armv7-timer";
		interrupt-parent = <&gic>;
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
				<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
				<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
				<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
		clock-frequency = <25000000>;
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		gfx_memory: framebuffer {
			size = <0x01000000>;
			alignment = <0x01000000>;
			compatible = "shared-dma-pool";
			reusable;
		};

		video_memory: video {
			size = <0x04000000>;
			alignment = <0x01000000>;
			compatible = "shared-dma-pool";
			no-map;
		};
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		ranges;

		gic: interrupt-controller@40461000 {
				compatible = "arm,cortex-a7-gic";
				interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
				#interrupt-cells = <3>;
				interrupt-controller;
				interrupt-parent = <&gic>;
				reg = <0x40461000 0x1000>,
					<0x40462000 0x1000>,
					<0x40464000 0x2000>,
					<0x40466000 0x2000>;
		};

		fmc: flash-controller@1e620000 {
			reg = < 0x1e620000 0xc4
				0x20000000 0x10000000 >;
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "aspeed,ast2500-fmc";
			status = "disabled";
			interrupts = <19>;
			flash@0 {
				reg = < 0 >;
				compatible = "jedec,spi-nor";
				status = "disabled";
			};
			flash@1 {
				reg = < 1 >;
				compatible = "jedec,spi-nor";
				status = "disabled";
			};
			flash@2 {
				reg = < 2 >;
				compatible = "jedec,spi-nor";
				status = "disabled";
			};
		};

		spi1: flash-controller@1e630000 {
			reg = < 0x1e630000 0xc4
				0x30000000 0x08000000 >;
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "aspeed,ast2500-spi";
			status = "disabled";
			flash@0 {
				reg = < 0 >;
				compatible = "jedec,spi-nor";
				status = "disabled";
			};
			flash@1 {
				reg = < 1 >;
				compatible = "jedec,spi-nor";
				status = "disabled";
			};
		};

		spi2: flash-controller@1e631000 {
			reg = < 0x1e631000 0xc4
				0x38000000 0x08000000 >;
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "aspeed,ast2500-spi";
			status = "disabled";
			flash@0 {
				reg = < 0 >;
				compatible = "jedec,spi-nor";
				status = "disabled";
			};
			flash@1 {
				reg = < 1 >;
				compatible = "jedec,spi-nor";
				status = "disabled";
			};
		};

		edac: sdram@1e6e0000 {
			compatible = "aspeed,ast2600-sdram-edac";
			reg = <0x1e6e0000 0x174>;
			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
		};

		mac0: ethernet@1e660000 {
			compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
			reg = <0x1e660000 0x180>;
			interrupts = <2>;
			status = "disabled";
		};

		mac2: ftgmac@1e670000 {
			compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
			reg = <0x1e670000 0x180>, <0x1e650010 0x4>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
#if 0
			phy-handle = <&phy0>;
#endif
			status = "disabled";
		};

		mac1: ftgmac@1e680000 {
			compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
			reg = <0x1e680000 0x180>, <0x1e650008 0x4>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
#if 0
			phy-handle = <&phy0>;
#endif
			status = "disabled";
		};

		mac3: ftgmac@1e690000 {
			compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
			reg = <0x1e690000 0x180>, <0x1e650018 0x4>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
#if 0
			phy-handle = <&phy0>;
#endif
			status = "disabled";
		};


		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			syscon: syscon@1e6e2000 {
				compatible = "aspeed,aspeed-scu", "aspeed,ast2600-scu", "syscon", "simple-mfd";
				reg = <0x1e6e2000 0x1000>;
				#address-cells = <1>;
				#size-cells = <1>;
				#clock-cells = <1>;
				#reset-cells = <1>;
				ranges = <0 0x1e6e2000 0x1000>;

				vga_scratch: scratch {
					compatible = "aspeed,bmc-misc";
				};

				scu_ic0: interrupt-controller@0 {
					#interrupt-cells = <1>;
					compatible = "aspeed,ast2600-scu-ic";
					reg = <0x560 0x10>;
					interrupt-parent = <&gic>;
					interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
					interrupt-controller;
				};

				scu_ic1: interrupt-controller@1 {
					#interrupt-cells = <1>;
					compatible = "aspeed,ast2600-scu-ic";
					reg = <0x570 0x10>;
					interrupt-parent = <&gic>;
					interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
					interrupt-controller;
				};

			};

			smp-memram@0 {
				compatible = "aspeed,ast2600-smpmem", "syscon";
				reg = <0x1e6e2180 0x40>;
			};


			uart1: serial@1e783000 {
				compatible = "ns16550a";
				reg = <0x1e783000 0x20>;
				reg-shift = <2>;
				no-loopback-test;
				status = "disabled";	
			};

			uart5: serial@1e784000 {
				compatible = "ns16550a";
				reg = <0x1e784000 0x1000>;
				reg-shift = <2>;
				clock-frequency = <1846154>;
				no-loopback-test;
			};

			wdt1: watchdog@1e785000 {
				compatible = "aspeed,ast2600-wdt";
				reg = <0x1e785000 0x40>;
			};

			wdt2: watchdog@1e785040 {
				compatible = "aspeed,ast2600-wdt";
				reg = <0x1e785040 0x40>;
			};

			wdt3: watchdog@1e785080 {
				compatible = "aspeed,ast2600-wdt";
				reg = <0x1e785080 0x40>;
			};

			wdt4: watchdog@1e7850C0 {
				compatible = "aspeed,ast2600-wdt";
				reg = <0x1e7850C0 0x40>;
			};

			lpc: lpc@1e789000 {
				compatible = "aspeed,ast-lpc", "simple-mfd", "syscon";
				reg = <0x1e789000 0x200>;

				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0x0 0x1e789000 0x1000>;

				lpc_bmc: lpc-bmc@0 {
					compatible = "aspeed,ast2600-lpc-bmc", "simple-mfd", "syscon";
					reg = <0x0 0x80>;
					reg-io-width = <4>;
					#address-cells = <1>;
					#size-cells = <1>;
					ranges = <0x0 0x0 0x80>;

					kcs1: kcs1@0 {
						compatible = "aspeed,ast2600-kcs-bmc";
						reg = <0x0 0x80>;
						interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
						kcs_chan = <1>;
						kcs_addr = <0xCA0>;
						status = "disabled";
					};

					kcs2: kcs2@0 {
						compatible = "aspeed,ast2600-kcs-bmc";
						reg = <0x0 0x80>;
						interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
						kcs_chan = <2>;
						kcs_addr = <0xCA8>;
						status = "disabled";
					};

					kcs3: kcs3@0 {
						compatible = "aspeed,ast2600-kcs-bmc";
						reg = <0x0 0x80>;
						interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
						kcs_chan = <3>;
						kcs_addr = <0xCA2>;
					};

					kcs4: kcs4@0 {
						compatible = "aspeed,ast2600-kcs-bmc";
						reg = <0x0 0x120>;
						interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
						kcs_chan = <4>;
						kcs_addr = <0xCA4>;
						status = "disabled";
					};

				};

				lpc_host: lpc-host@80 {
					compatible = "aspeed,ast2600-lpc-host", "simple-mfd", "syscon";
					reg = <0x80 0x1e0>;
					reg-io-width = <4>;

					#address-cells = <1>;
					#size-cells = <1>;
					ranges = <0x0 0x80 0x1e0>;

					lpc_ctrl: lpc-ctrl@0 {
						compatible = "aspeed,ast2600-lpc-ctrl";
						reg = <0x0 0x80>;
						status = "disabled";
					};

					lpc_snoop: lpc-snoop@0 {
						compatible = "aspeed,ast2600-lpc-snoop";
						reg = <0x0 0x80>;
						interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
						snoop-ports = <0x80>;
						status = "disabled";
					};

					lhc: lhc@20 {
						compatible = "aspeed,ast2600-lhc";
						reg = <0x20 0x24 0x48 0x8>;
					};

					lpc_reset: reset-controller@18 {
						compatible = "aspeed,ast2600-lpc-reset";
						reg = <0x18 0x4>;
						#reset-cells = <1>;
						status = "disabled";
					};

					ibt: ibt@c0 {
						compatible = "aspeed,ast2600-ibt-bmc";
						reg = <0xc0 0x18>;
						interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
						status = "disabled";
					};

					sio_regs: regs {
						compatible = "aspeed,bmc-misc";
					};

					mbox: mbox@180 {
						compatible = "aspeed,ast2600-mbox";
						reg = <0x180 0x5c>;
						interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
						#mbox-cells = <1>;
						status = "disabled";
					};
				};
			};

			uart2: serial@1e78d000 {
				compatible = "ns16550a";
				reg = <0x1e78d000 0x20>;
				reg-shift = <2>;
				interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
				no-loopback-test;
				status = "disabled";
			};

			uart3: serial@1e78e000 {
				compatible = "ns16550a";
				reg = <0x1e78e000 0x20>;
				reg-shift = <2>;
				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
				no-loopback-test;
				status = "disabled";
			};

			uart4: serial@1e78f000 {
				compatible = "ns16550a";
				reg = <0x1e78f000 0x20>;
				reg-shift = <2>;
				interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
				no-loopback-test;
				status = "disabled";
			};

			i2c: bus@1e78a000 {
				compatible = "simple-bus";
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x1e78a000 0x1000>;
			};

			uart6: serial@1e790000 {
				compatible = "ns16550a";
				reg = <0x1e790000 0x20>;
				reg-shift = <2>;
				interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
				no-loopback-test;
				status = "disabled";
			};

			uart7: serial@1e790100 {
				compatible = "ns16550a";
				reg = <0x1e790100 0x20>;
				reg-shift = <2>;
				interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
				no-loopback-test;
				status = "disabled";
			};

			uart8: serial@1e790200 {
				compatible = "ns16550a";
				reg = <0x1e790200 0x20>;
				reg-shift = <2>;
				interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
				no-loopback-test;
				status = "disabled";
			};

			uart9: serial@1e790300 {
				compatible = "ns16550a";
				reg = <0x1e790300 0x20>;
				reg-shift = <2>;
				interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
				no-loopback-test;
				status = "disabled";
			};

			uart10: serial@1e790400 {
				compatible = "ns16550a";
				reg = <0x1e790400 0x20>;
				reg-shift = <2>;
				interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
				no-loopback-test;
				status = "disabled";
			};

			uart11: serial@1e790500 {
				compatible = "ns16550a";
				reg = <0x1e790400 0x20>;
				reg-shift = <2>;
				interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
				no-loopback-test;
				status = "disabled";
			};

			uart12: serial@1e790600 {
				compatible = "ns16550a";
				reg = <0x1e790600 0x20>;
				reg-shift = <2>;
				interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
				no-loopback-test;
				status = "disabled";
			};

			uart13: serial@1e790700 {
				compatible = "ns16550a";
				reg = <0x1e790700 0x20>;
				reg-shift = <2>;
				interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
				no-loopback-test;
				status = "disabled";
			};



		};

	};

};

&i2c {
	i2cglobal: i2cg@00 {
		compatible = "aspeed,ast2600-i2c-global", "syscon", "simple-mfd";
		reg = <0x0 0x40>;

#if 0
		new-mode;
#endif
	};

	i2c0: i2c@80 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x80 0x80 0xC00 0x20>;
		compatible = "aspeed,ast2600-i2c-bus";
#if 0
		compatible = "aspeed,ast-g6-i2c", "aspeed,ast-dma-i2c";
		#compatible = "aspeed,ast2500-i2c-bus";
		#compatible = "aspeed,aspeed-i2c", "aspeed,ast-dma-i2c";
#endif
		bus-frequency = <100000>;
		interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
	};

	i2c1: i2c@100 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x100 0x80 0xC20 0x20>;
		compatible = "aspeed,ast-g6-i2c", "aspeed,ast-dma-i2c";
#if 0
		#compatible = "aspeed,ast2500-i2c-bus";
		#compatible = "aspeed,aspeed-i2c", "aspeed,ast-dma-i2c";
#endif
		bus-frequency = <100000>;
		interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
	};

	i2c2: i2c@180 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x180 0x80 0xC40 0x20>;
		compatible = "aspeed,aspeed-i2c", "aspeed,ast-dma-i2c";
		#compatible = "aspeed,ast-g6-i2c", "aspeed,ast-dma-i2c";
		bus-frequency = <100000>;
		interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
	};

	i2c3: i2c@200 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x200 0x40 0xC60 0x20>;
		compatible = "aspeed,aspeed-i2c", "aspeed,ast-dma-i2c";
		#compatible = "aspeed,ast-g6-i2c", "aspeed,ast-dma-i2c";
		bus-frequency = <100000>;
		interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
	};

	i2c4: i2c@280 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x280 0x80 0xC80 0x20>;
		compatible = "aspeed,aspeed-i2c", "aspeed,ast-dma-i2c";
		#compatible = "aspeed,ast-g6-i2c", "aspeed,ast-dma-i2c";
		bus-frequency = <100000>;
		interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
	};

	i2c5: i2c@300 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x300 0x40 0xCA0 0x20>;
		compatible = "aspeed,aspeed-i2c", "aspeed,ast-dma-i2c";
		#compatible = "aspeed,ast-g6-i2c", "aspeed,ast-dma-i2c";
		bus-frequency = <100000>;
		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
	};

	i2c6: i2c@380 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x380 0x80 0xCC0 0x20>;
		compatible = "aspeed,aspeed-i2c", "aspeed,ast-dma-i2c";
		#compatible = "aspeed,ast-g6-i2c", "aspeed,ast-dma-i2c";
		bus-frequency = <100000>;
		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
	};

	i2c7: i2c@400 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x400 0x80 0xCE0 0x20>;
		compatible = "aspeed,aspeed-i2c", "aspeed,ast-dma-i2c";
		#compatible = "aspeed,ast-g6-i2c", "aspeed,ast-dma-i2c";
		bus-frequency = <100000>;
		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
	};

	i2c8: i2c@480 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x480 0x80 0xD00 0x20>;
		compatible = "aspeed,aspeed-i2c", "aspeed,ast-dma-i2c";
		#compatible = "aspeed,ast-g6-i2c", "aspeed,ast-dma-i2c";
		bus-frequency = <100000>;
		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
	};

	i2c9: i2c@500 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x500 0x80 0xD20 0x20>;
		compatible = "aspeed,aspeed-i2c", "aspeed,ast-dma-i2c";
		#compatible = "aspeed,ast-g6-i2c", "aspeed,ast-dma-i2c";
		bus-frequency = <100000>;
		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c10: i2c@580 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x580 0x80 0xD40 0x20>;
		compatible = "aspeed,aspeed-i2c", "aspeed,ast-dma-i2c";
		#compatible = "aspeed,ast-g6-i2c", "aspeed,ast-dma-i2c";
		bus-frequency = <100000>;
		interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c11: i2c@600 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x600 0x80 0xD60 0x20>;
		compatible = "aspeed,aspeed-i2c", "aspeed,ast-dma-i2c";
		#compatible = "aspeed,ast-g6-i2c", "aspeed,ast-dma-i2c";
		bus-frequency = <100000>;
		interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c12: i2c@680 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x680 0x80 0xD80 0x20>;
		compatible = "aspeed,aspeed-i2c", "aspeed,ast-dma-i2c";
		#compatible = "aspeed,ast-g6-i2c", "aspeed,ast-dma-i2c";
		bus-frequency = <100000>;
		interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c13: i2c@700 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x700 0x80 0xDA0 0x20>;
		compatible = "aspeed,aspeed-i2c", "aspeed,ast-dma-i2c";
		#compatible = "aspeed,ast-g6-i2c", "aspeed,ast-dma-i2c";
		bus-frequency = <100000>;
		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c14: i2c@780 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x780 0x80 0xDC0 0x20>;
		compatible = "aspeed,aspeed-i2c", "aspeed,ast-dma-i2c";
		#compatible = "aspeed,ast-g6-i2c", "aspeed,ast-dma-i2c";
		bus-frequency = <100000>;
		interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c15: i2c@800 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x800 0x80 0xDE0 0x20>;
		compatible = "aspeed,aspeed-i2c", "aspeed,ast-dma-i2c";
		#compatible = "aspeed,ast-g6-i2c", "aspeed,ast-dma-i2c";
		bus-frequency = <100000>;
		interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

};