#include #include #include "ast2600.dtsi" / { scu: clock-controller@1e6e2000 { compatible = "aspeed,ast2600-scu"; reg = <0x1e6e2000 0x1000>; u-boot,dm-pre-reloc; #clock-cells = <1>; #reset-cells = <1>; }; rst: reset-controller { u-boot,dm-pre-reloc; compatible = "aspeed,ast2600-reset"; aspeed,wdt = <&wdt1>; #reset-cells = <1>; }; sdrammc: sdrammc@1e6e0000 { u-boot,dm-pre-reloc; compatible = "aspeed,ast2600-sdrammc"; reg = <0x1e6e0000 0x100 0x1e6e0100 0x300 0x1e6e0400 0x200 >; #reset-cells = <1>; clocks = <&scu ASPEED_CLK_MPLL>; resets = <&rst ASPEED_RESET_SDRAM>; }; ahb { u-boot,dm-pre-reloc; apb { u-boot,dm-pre-reloc; }; }; }; &uart1 { clock-frequency = <1846154>; }; &uart2 { clock-frequency = <1846154>; }; &uart3 { clock-frequency = <1846154>; }; &uart4 { clock-frequency = <1846154>; }; &uart5 { #if 0 clock-frequency = <1846154>; #endif clocks = <&scu ASPEED_CLK_GATE_UART5CLK>; }; &mdio { resets = <&rst ASPEED_RESET_MII>; }; &mac0 { clocks = <&scu ASPEED_CLK_GATE_MAC1CLK>; }; #if 0 &mac1 { clocks = <&scu ASPEED_CLK_GATE_MAC2CLK>; }; #endif &fmc { clocks = <&scu ASPEED_CLK_AHB>; }; &spi1 { clocks = <&scu ASPEED_CLK_AHB>; }; &spi2 { clocks = <&scu ASPEED_CLK_AHB>; };