/*
 * T1024 RDB Device Tree Source
 *
 * Copyright 2014 Freescale Semiconductor Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *     * Redistributions of source code must retain the above copyright
 *	 notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *	 notice, this list of conditions and the following disclaimer in the
 *	 documentation and/or other materials provided with the distribution.
 *     * Neither the name of Freescale Semiconductor nor the
 *	 names of its contributors may be used to endorse or promote products
 *	 derived from this software without specific prior written permission.
 *
 *
 * ALTERNATIVELY, this software may be distributed under the terms of the
 * GNU General Public License ("GPL") as published by the Free Software
 * Foundation, either version 2 of that License or (at your option) any
 * later version.
 *
 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/include/ "t102xsi-pre.dtsi"

/ {
	model = "fsl,T1024RDB";
	compatible = "fsl,T1024RDB";
	#address-cells = <2>;
	#size-cells = <2>;
	interrupt-parent = <&mpic>;

	ifc: localbus@ffe124000 {
		reg = <0xf 0xfe124000 0 0x2000>;
		ranges = <0 0 0xf 0xe8000000 0x08000000
			  2 0 0xf 0xff800000 0x00010000
			  3 0 0xf 0xffdf0000 0x00008000>;

		nor@0,0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "cfi-flash";
			reg = <0x0 0x0 0x8000000>;
			bank-width = <2>;
			device-width = <1>;
		};

		nand@1,0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,ifc-nand";
			reg = <0x2 0x0 0x10000>;
		};

		board-control@2,0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,t1024-cpld";
			reg = <3 0 0x300>;
			ranges = <0 3 0 0x300>;
			bank-width = <1>;
			device-width = <1>;
		};
	};

	memory {
		device_type = "memory";
	};

	dcsr: dcsr@f00000000 {
		ranges = <0x00000000 0xf 0x00000000 0x01072000>;
	};

	soc: soc@ffe000000 {
		ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
		reg = <0xf 0xfe000000 0 0x00001000>;
		spi@110000 {
			flash@0 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "micron,n25q512ax3";
				reg = <0>;
				spi-max-frequency = <10000000>; /* input clk */
			};

			slic@1 {
				compatible = "maxim,ds26522";
				reg = <1>;
				spi-max-frequency = <2000000>;
			};

			slic@2 {
				compatible = "maxim,ds26522";
				reg = <2>;
				spi-max-frequency = <2000000>;
			};
		};

		i2c@118000 {
			adt7461@4c {
				/* Thermal Monitor */
				compatible = "adi,adt7461";
				reg = <0x4c>;
			};

			current-sensor@40 {
				compatible = "ti,ina220";
				reg = <0x40>;
				shunt-resistor = <1000>;
			};

			eeprom@50 {
				compatible = "atmel,24c256";
				reg = <0x50>;
			};

			rtc@68 {
				compatible = "dallas,ds1339";
				reg = <0x68>;
				interrupts = <0x1 0x1 0 0>;
			};
		};

		i2c@118100 {
			pca9546@77 {
				compatible = "nxp,pca9546";
				reg = <0x77>;
				#address-cells = <1>;
				#size-cells = <0>;
			};
		};

		fman@400000 {
			fm1mac1: ethernet@e0000 {
				phy-handle = <&xg_aqr105_phy3>;
				phy-connection-type = "xgmii";
				sleep = <&rcpm 0x80000000>;
			};

			fm1mac2: ethernet@e2000 {
				sleep = <&rcpm 0x40000000>;
			};

			fm1mac3: ethernet@e4000 {
				phy-handle = <&rgmii_phy2>;
				phy-connection-type = "rgmii";
				sleep = <&rcpm 0x20000000>;
			};

			fm1mac4: ethernet@e6000 {
				phy-handle = <&rgmii_phy1>;
				phy-connection-type = "rgmii";
				sleep = <&rcpm 0x10000000>;
			};


			mdio0: mdio@fc000 {
				rgmii_phy1: ethernet-phy@2 {
					reg = <0x2>;
				};
				rgmii_phy2: ethernet-phy@6 {
					reg = <0x6>;
				};
			};

			xmdio0: mdio@fd000 {
				xg_aqr105_phy3: ethernet-phy@1 {
					compatible = "ethernet-phy-ieee802.3-c45";
					reg = <0x1>;
				};
				sg_2500_aqr105_phy4: ethernet-phy@2 {
					compatible = "ethernet-phy-ieee802.3-c45";
					reg = <0x2>;
				};
			};
		};
	};

	pci0: pcie@ffe240000 {
		reg = <0xf 0xfe240000 0 0x10000>;
		ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0 0x10000000
			  0x01000000 0 0x00000000 0xf 0xf8000000 0 0x00010000>;
		pcie@0 {
			ranges = <0x02000000 0 0xe0000000
				  0x02000000 0 0xe0000000
				  0 0x10000000

				  0x01000000 0 0x00000000
				  0x01000000 0 0x00000000
				  0 0x00010000>;
		};
	};

	pci1: pcie@ffe250000 {
		reg = <0xf 0xfe250000 0 0x10000>;
		ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000
			  0x01000000 0 0x00000000 0xf 0xf8010000 0 0x00010000>;
		pcie@0 {
			ranges = <0x02000000 0 0xe0000000
				  0x02000000 0 0xe0000000
				  0 0x10000000

				  0x01000000 0 0x00000000
				  0x01000000 0 0x00000000
				  0 0x00010000>;
		};
	};

	pci2: pcie@ffe260000 {
		reg = <0xf 0xfe260000 0 0x10000>;
		ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
			  0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
		pcie@0 {
			ranges = <0x02000000 0 0xe0000000
				  0x02000000 0 0xe0000000
				  0 0x10000000

				  0x01000000 0 0x00000000
				  0x01000000 0 0x00000000
				  0 0x00010000>;
		};
	};
};

#include "t1024si-post.dtsi"