// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; #include #include #include #include #include #include "k3-am642.dtsi" / { compatible = "ti,am642-sk", "ti,am642"; model = "Texas Instruments AM642 SK"; chosen { stdout-path = &main_uart0; }; aliases { serial0 = &mcu_uart0; serial1 = &main_uart1; serial2 = &main_uart0; i2c0 = &main_i2c0; i2c1 = &main_i2c1; mmc0 = &sdhci0; mmc1 = &sdhci1; ethernet0 = &cpsw_port1; ethernet1 = &cpsw_port2; }; memory@80000000 { device_type = "memory"; /* 2G RAM */ reg = <0x00000000 0x80000000 0x00000000 0x80000000>; }; reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; secure_ddr: optee@9e800000 { reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ alignment = <0x1000>; no-map; }; main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0000000 0x00 0x100000>; no-map; }; main_r5fss0_core0_memory_region: r5f-memory@a0100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0100000 0x00 0xf00000>; no-map; }; main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1000000 0x00 0x100000>; no-map; }; main_r5fss0_core1_memory_region: r5f-memory@a1100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1100000 0x00 0xf00000>; no-map; }; main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2000000 0x00 0x100000>; no-map; }; main_r5fss1_core0_memory_region: r5f-memory@a2100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2100000 0x00 0xf00000>; no-map; }; main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3000000 0x00 0x100000>; no-map; }; main_r5fss1_core1_memory_region: r5f-memory@a3100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3100000 0x00 0xf00000>; no-map; }; rtos_ipc_memory_region: ipc-memories@a5000000 { reg = <0x00 0xa5000000 0x00 0x00800000>; alignment = <0x1000>; no-map; }; }; vusb_main: regulator-0 { /* USB MAIN INPUT 5V DC */ compatible = "regulator-fixed"; regulator-name = "vusb_main5v0"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; regulator-boot-on; }; vcc_3v3_sys: regulator-1 { /* output of LP8733xx */ compatible = "regulator-fixed"; regulator-name = "vcc_3v3_sys"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&vusb_main>; regulator-always-on; regulator-boot-on; }; vdd_mmc1: regulator-2 { /* TPS2051BD */ compatible = "regulator-fixed"; regulator-name = "vdd_mmc1"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; enable-active-high; vin-supply = <&vcc_3v3_sys>; gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; }; com8_ls_en: regulator-3 { compatible = "regulator-fixed"; regulator-name = "com8_ls_en"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; regulator-boot-on; pinctrl-0 = <&main_com8_ls_en_pins_default>; pinctrl-names = "default"; gpio = <&main_gpio0 62 GPIO_ACTIVE_LOW>; }; wlan_en: regulator-4 { /* output of SN74AVC4T245RSVR */ compatible = "regulator-fixed"; regulator-name = "wlan_en"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; enable-active-high; pinctrl-0 = <&main_wlan_en_pins_default>; pinctrl-names = "default"; vin-supply = <&com8_ls_en>; gpio = <&main_gpio0 48 GPIO_ACTIVE_HIGH>; }; led-controller { compatible = "gpio-leds"; led-0 { color = ; function = LED_FUNCTION_INDICATOR; function-enumerator = <1>; gpios = <&exp2 0 GPIO_ACTIVE_HIGH>; default-state = "off"; }; led-1 { color = ; function = LED_FUNCTION_INDICATOR; function-enumerator = <2>; gpios = <&exp2 1 GPIO_ACTIVE_HIGH>; default-state = "off"; }; led-2 { color = ; function = LED_FUNCTION_INDICATOR; function-enumerator = <3>; gpios = <&exp2 2 GPIO_ACTIVE_HIGH>; default-state = "off"; }; led-3 { color = ; function = LED_FUNCTION_INDICATOR; function-enumerator = <4>; gpios = <&exp2 3 GPIO_ACTIVE_HIGH>; default-state = "off"; }; led-4 { color = ; function = LED_FUNCTION_INDICATOR; function-enumerator = <5>; gpios = <&exp2 4 GPIO_ACTIVE_HIGH>; default-state = "off"; }; led-5 { color = ; function = LED_FUNCTION_INDICATOR; function-enumerator = <6>; gpios = <&exp2 5 GPIO_ACTIVE_HIGH>; default-state = "off"; }; led-6 { color = ; function = LED_FUNCTION_INDICATOR; function-enumerator = <7>; gpios = <&exp2 6 GPIO_ACTIVE_HIGH>; default-state = "off"; }; led-7 { color = ; function = LED_FUNCTION_HEARTBEAT; function-enumerator = <8>; linux,default-trigger = "heartbeat"; gpios = <&exp2 7 GPIO_ACTIVE_HIGH>; }; }; }; &main_pmx0 { main_mmc1_pins_default: main-mmc1-default-pins { pinctrl-single,pins = < AM64X_IOPAD(0x029c, PIN_INPUT_PULLUP, 0) /* (C20) MMC1_SDWP */ AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */ AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */ AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* (#N/A) MMC1_CLKLB */ AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */ AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /* (K21) MMC1_DAT0 */ AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC1_DAT1 */ AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */ AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */ >; }; main_uart0_pins_default: main-uart0-default-pins { pinctrl-single,pins = < AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */ AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */ AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */ AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */ >; }; main_uart1_pins_default: main-uart1-default-pins { pinctrl-single,pins = < AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */ AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */ AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */ AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (E14) UART1_TXD */ >; }; main_usb0_pins_default: main-usb0-default-pins { pinctrl-single,pins = < AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */ >; }; main_i2c0_pins_default: main-i2c0-default-pins { pinctrl-single,pins = < AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */ AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */ >; }; main_i2c1_pins_default: main-i2c1-default-pins { pinctrl-single,pins = < AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */ AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */ >; }; mdio1_pins_default: mdio1-default-pins { pinctrl-single,pins = < AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */ AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */ >; }; rgmii1_pins_default: rgmii1-default-pins { pinctrl-single,pins = < AM64X_IOPAD(0x011c, PIN_INPUT, 4) /* (AA13) PRG1_PRU1_GPO5.RGMII1_RD0 */ AM64X_IOPAD(0x0128, PIN_INPUT, 4) /* (U12) PRG1_PRU1_GPO8.RGMII1_RD1 */ AM64X_IOPAD(0x0150, PIN_INPUT, 4) /* (Y13) PRG1_PRU1_GPO18.RGMII1_RD2 */ AM64X_IOPAD(0x0154, PIN_INPUT, 4) /* (V12) PRG1_PRU1_GPO19.RGMII1_RD3 */ AM64X_IOPAD(0x00d8, PIN_INPUT, 4) /* (W13) PRG1_PRU0_GPO8.RGMII1_RXC */ AM64X_IOPAD(0x00cc, PIN_INPUT, 4) /* (V13) PRG1_PRU0_GPO5.RGMII1_RX_CTL */ AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */ AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */ AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */ AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */ AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */ AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */ >; }; rgmii2_pins_default: rgmii2-default-pins { pinctrl-single,pins = < AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */ AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */ AM64X_IOPAD(0x0110, PIN_INPUT, 4) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */ AM64X_IOPAD(0x0114, PIN_INPUT, 4) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */ AM64X_IOPAD(0x0120, PIN_INPUT, 4) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */ AM64X_IOPAD(0x0118, PIN_INPUT, 4) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */ AM64X_IOPAD(0x0134, PIN_OUTPUT, 4) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */ AM64X_IOPAD(0x0138, PIN_OUTPUT, 4) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */ AM64X_IOPAD(0x013c, PIN_OUTPUT, 4) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */ AM64X_IOPAD(0x0140, PIN_OUTPUT, 4) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */ AM64X_IOPAD(0x0148, PIN_OUTPUT, 4) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */ AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */ >; }; ospi0_pins_default: ospi0-default-pins { pinctrl-single,pins = < AM64X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (N20) OSPI0_CLK */ AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (L19) OSPI0_CSn0 */ AM64X_IOPAD(0x000c, PIN_INPUT, 0) /* (M19) OSPI0_D0 */ AM64X_IOPAD(0x0010, PIN_INPUT, 0) /* (M18) OSPI0_D1 */ AM64X_IOPAD(0x0014, PIN_INPUT, 0) /* (M20) OSPI0_D2 */ AM64X_IOPAD(0x0018, PIN_INPUT, 0) /* (M21) OSPI0_D3 */ AM64X_IOPAD(0x001c, PIN_INPUT, 0) /* (P21) OSPI0_D4 */ AM64X_IOPAD(0x0020, PIN_INPUT, 0) /* (P20) OSPI0_D5 */ AM64X_IOPAD(0x0024, PIN_INPUT, 0) /* (N18) OSPI0_D6 */ AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* (M17) OSPI0_D7 */ AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */ >; }; main_ecap0_pins_default: main-ecap0-default-pins { pinctrl-single,pins = < AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */ >; }; main_wlan_en_pins_default: main-wlan-en-default-pins { pinctrl-single,pins = < AM64X_IOPAD(0x00c4, PIN_OUTPUT_PULLUP, 7) /* (V8) GPIO0_48 */ >; }; main_com8_ls_en_pins_default: main-com8-ls-en-default-pins { pinctrl-single,pins = < AM64X_IOPAD(0x00fc, PIN_OUTPUT, 7) /* (U7) PRG1_PRU0_GPO17.GPIO0_62 */ >; }; main_wlan_pins_default: main-wlan-default-pins { pinctrl-single,pins = < AM64X_IOPAD(0x00bc, PIN_INPUT, 7) /* (U8) GPIO0_46 */ >; }; }; &main_uart0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_uart0_pins_default>; current-speed = <115200>; }; &main_uart1 { /* main_uart1 is reserved for firmware usage */ status = "reserved"; pinctrl-names = "default"; pinctrl-0 = <&main_uart1_pins_default>; }; &main_i2c0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c0_pins_default>; clock-frequency = <400000>; eeprom@51 { compatible = "atmel,24c512"; reg = <0x51>; }; }; &main_i2c1 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c1_pins_default>; clock-frequency = <400000>; exp1: gpio@70 { compatible = "nxp,pca9538"; reg = <0x70>; gpio-controller; #gpio-cells = <2>; gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST", "PRU_DETECT", "MMC1_SD_EN", "VPP_LDO_EN", "RPI_PS_3V3_En", "RPI_PS_5V0_En", "RPI_HAT_DETECT"; }; exp2: gpio@60 { compatible = "ti,tpic2810"; reg = <0x60>; gpio-controller; #gpio-cells = <2>; gpio-line-names = "LED1","LED2","LED3","LED4","LED5","LED6","LED7","LED8"; }; }; /* mcu_gpio0 is reserved for mcu firmware usage */ &mcu_gpio0 { status = "reserved"; }; &sdhci0 { vmmc-supply = <&wlan_en>; bus-width = <4>; non-removable; cap-power-off-card; keep-power-in-suspend; ti,driver-strength-ohm = <50>; #address-cells = <1>; #size-cells = <0>; wlcore: wlcore@2 { compatible = "ti,wl1837"; reg = <2>; pinctrl-0 = <&main_wlan_pins_default>; pinctrl-names = "default"; interrupt-parent = <&main_gpio0>; interrupts = <46 IRQ_TYPE_EDGE_FALLING>; }; }; &sdhci1 { /* SD/MMC */ vmmc-supply = <&vdd_mmc1>; pinctrl-names = "default"; bus-width = <4>; pinctrl-0 = <&main_mmc1_pins_default>; ti,driver-strength-ohm = <50>; disable-wp; }; &serdes_ln_ctrl { idle-states = ; }; &serdes0 { serdes0_usb_link: phy@0 { reg = <0>; cdns,num-lanes = <1>; #phy-cells = <0>; cdns,phy-type = ; resets = <&serdes_wiz0 1>; }; }; &usbss0 { ti,vbus-divider; }; &usb0 { dr_mode = "host"; maximum-speed = "super-speed"; pinctrl-names = "default"; pinctrl-0 = <&main_usb0_pins_default>; phys = <&serdes0_usb_link>; phy-names = "cdns3,usb3-phy"; }; &cpsw3g { pinctrl-names = "default"; pinctrl-0 = <&rgmii1_pins_default>, <&rgmii2_pins_default>; }; &cpsw_port1 { phy-mode = "rgmii-rxid"; phy-handle = <&cpsw3g_phy0>; }; &cpsw_port2 { phy-mode = "rgmii-rxid"; phy-handle = <&cpsw3g_phy1>; }; &cpsw3g_mdio { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mdio1_pins_default>; cpsw3g_phy0: ethernet-phy@0 { reg = <0>; ti,rx-internal-delay = ; ti,fifo-depth = ; }; cpsw3g_phy1: ethernet-phy@1 { reg = <1>; ti,rx-internal-delay = ; ti,fifo-depth = ; }; }; &tscadc0 { status = "disabled"; }; &ospi0 { pinctrl-names = "default"; pinctrl-0 = <&ospi0_pins_default>; flash@0 { compatible = "jedec,spi-nor"; reg = <0x0>; spi-tx-bus-width = <8>; spi-rx-bus-width = <8>; spi-max-frequency = <25000000>; cdns,tshsl-ns = <60>; cdns,tsd2d-ns = <60>; cdns,tchsh-ns = <60>; cdns,tslch-ns = <60>; cdns,read-delay = <4>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "ospi.tiboot3"; reg = <0x0 0x100000>; }; partition@100000 { label = "ospi.tispl"; reg = <0x100000 0x200000>; }; partition@300000 { label = "ospi.u-boot"; reg = <0x300000 0x400000>; }; partition@700000 { label = "ospi.env"; reg = <0x700000 0x40000>; }; partition@740000 { label = "ospi.env.backup"; reg = <0x740000 0x40000>; }; partition@800000 { label = "ospi.rootfs"; reg = <0x800000 0x37c0000>; }; partition@3fc0000 { label = "ospi.phypattern"; reg = <0x3fc0000 0x40000>; }; }; }; }; &mailbox0_cluster2 { status = "okay"; mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { ti,mbox-rx = <0 0 2>; ti,mbox-tx = <1 0 2>; }; mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { ti,mbox-rx = <2 0 2>; ti,mbox-tx = <3 0 2>; }; }; &mailbox0_cluster4 { status = "okay"; mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 { ti,mbox-rx = <0 0 2>; ti,mbox-tx = <1 0 2>; }; mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 { ti,mbox-rx = <2 0 2>; ti,mbox-tx = <3 0 2>; }; }; &mailbox0_cluster6 { status = "okay"; mbox_m4_0: mbox-m4-0 { ti,mbox-rx = <0 0 2>; ti,mbox-tx = <1 0 2>; }; }; &main_r5fss0_core0 { mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core0>; memory-region = <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; }; &main_r5fss0_core1 { mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core1>; memory-region = <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; }; &main_r5fss1_core0 { mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core0>; memory-region = <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; }; &main_r5fss1_core1 { mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core1>; memory-region = <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; }; &ecap0 { status = "okay"; /* PWM is available on Pin 1 of header J3 */ pinctrl-names = "default"; pinctrl-0 = <&main_ecap0_pins_default>; };