// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
 * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK common parts
 *
 * Copyright (C) 2021 Renesas Electronics Corp.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>

/* comment the #define statement to disable SCIF2 (SER0) on PMOD1 (CN7) */
#define PMOD1_SER0	1

/ {
	aliases {
		serial1 = &scif2;
	};
};

/*
 * To enable SCIF2 (SER0) on PMOD1 (CN7)
 * SW1 should be at position 2->3 so that SER0_CTS# line is activated
 * SW2 should be at position 2->3 so that SER0_TX line is activated
 * SW3 should be at position 2->3 so that SER0_RX line is activated
 * SW4 should be at position 2->3 so that SER0_RTS# line is activated
 */
#if PMOD1_SER0
&scif2 {
	pinctrl-0 = <&scif2_pins>;
	pinctrl-names = "default";

	uart-has-rtscts;
	status = "okay";
};
#endif