// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) /* * Device Tree Source for the R-Car V4H (R8A779G0) SoC * * Copyright (C) 2022 Renesas Electronics Corp. */ #include #include #include / { compatible = "renesas,r8a779g0"; #address-cells = <2>; #size-cells = <2>; cpus { #address-cells = <1>; #size-cells = <0>; a76_0: cpu@0 { compatible = "arm,cortex-a76"; reg = <0>; device_type = "cpu"; power-domains = <&sysc R8A779G0_PD_A1E0D0C0>; }; }; extal_clk: extal { compatible = "fixed-clock"; #clock-cells = <0>; /* This value must be overridden by the board */ clock-frequency = <0>; }; extalr_clk: extalr { compatible = "fixed-clock"; #clock-cells = <0>; /* This value must be overridden by the board */ clock-frequency = <0>; }; pmu_a76 { compatible = "arm,cortex-a76-pmu"; interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; }; /* External SCIF clock - to be overridden by boards that provide it */ scif_clk: scif { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; }; soc: soc { compatible = "simple-bus"; interrupt-parent = <&gic>; #address-cells = <2>; #size-cells = <2>; ranges; rwdt: watchdog@e6020000 { compatible = "renesas,r8a779g0-wdt", "renesas,rcar-gen4-wdt"; reg = <0 0xe6020000 0 0x0c>; interrupts = ; clocks = <&cpg CPG_MOD 907>; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 907>; status = "disabled"; }; pfc: pinctrl@e6050000 { compatible = "renesas,pfc-r8a779g0"; reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>, <0 0xe6068000 0 0x16c>; }; gpio0: gpio@e6050180 { compatible = "renesas,gpio-r8a779g0", "renesas,rcar-gen4-gpio"; reg = <0 0xe6050180 0 0x54>; interrupts = ; clocks = <&cpg CPG_MOD 915>; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 915>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 0 19>; interrupt-controller; #interrupt-cells = <2>; }; gpio1: gpio@e6050980 { compatible = "renesas,gpio-r8a779g0", "renesas,rcar-gen4-gpio"; reg = <0 0xe6050980 0 0x54>; interrupts = ; clocks = <&cpg CPG_MOD 915>; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 915>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 32 29>; interrupt-controller; #interrupt-cells = <2>; }; gpio2: gpio@e6058180 { compatible = "renesas,gpio-r8a779g0", "renesas,rcar-gen4-gpio"; reg = <0 0xe6058180 0 0x54>; interrupts = ; clocks = <&cpg CPG_MOD 916>; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 916>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 64 20>; interrupt-controller; #interrupt-cells = <2>; }; gpio3: gpio@e6058980 { compatible = "renesas,gpio-r8a779g0", "renesas,rcar-gen4-gpio"; reg = <0 0xe6058980 0 0x54>; interrupts = ; clocks = <&cpg CPG_MOD 916>; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 916>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 96 30>; interrupt-controller; #interrupt-cells = <2>; }; gpio4: gpio@e6060180 { compatible = "renesas,gpio-r8a779g0", "renesas,rcar-gen4-gpio"; reg = <0 0xe6060180 0 0x54>; interrupts = ; clocks = <&cpg CPG_MOD 917>; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 917>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 128 25>; interrupt-controller; #interrupt-cells = <2>; }; gpio5: gpio@e6060980 { compatible = "renesas,gpio-r8a779g0", "renesas,rcar-gen4-gpio"; reg = <0 0xe6060980 0 0x54>; interrupts = ; clocks = <&cpg CPG_MOD 917>; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 917>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 160 21>; interrupt-controller; #interrupt-cells = <2>; }; gpio6: gpio@e6061180 { compatible = "renesas,gpio-r8a779g0", "renesas,rcar-gen4-gpio"; reg = <0 0xe6061180 0 0x54>; interrupts = ; clocks = <&cpg CPG_MOD 917>; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 917>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 192 21>; interrupt-controller; #interrupt-cells = <2>; }; gpio7: gpio@e6061980 { compatible = "renesas,gpio-r8a779g0", "renesas,rcar-gen4-gpio"; reg = <0 0xe6061980 0 0x54>; interrupts = ; clocks = <&cpg CPG_MOD 917>; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 917>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 224 21>; interrupt-controller; #interrupt-cells = <2>; }; gpio8: gpio@e6068180 { compatible = "renesas,gpio-r8a779g0", "renesas,rcar-gen4-gpio"; reg = <0 0xe6068180 0 0x54>; interrupts = ; clocks = <&cpg CPG_MOD 918>; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 918>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 256 14>; interrupt-controller; #interrupt-cells = <2>; }; cpg: clock-controller@e6150000 { compatible = "renesas,r8a779g0-cpg-mssr"; reg = <0 0xe6150000 0 0x4000>; clocks = <&extal_clk>, <&extalr_clk>; clock-names = "extal", "extalr"; #clock-cells = <2>; #power-domain-cells = <0>; #reset-cells = <1>; }; rst: reset-controller@e6160000 { compatible = "renesas,r8a779g0-rst"; reg = <0 0xe6160000 0 0x4000>; }; sysc: system-controller@e6180000 { compatible = "renesas,r8a779g0-sysc"; reg = <0 0xe6180000 0 0x4000>; #power-domain-cells = <1>; }; i2c0: i2c@e6500000 { compatible = "renesas,i2c-r8a779g0", "renesas,rcar-gen4-i2c"; reg = <0 0xe6500000 0 0x40>; interrupts = ; clocks = <&cpg CPG_MOD 518>; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 518>; i2c-scl-internal-delay-ns = <110>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; i2c1: i2c@e6508000 { compatible = "renesas,i2c-r8a779g0", "renesas,rcar-gen4-i2c"; reg = <0 0xe6508000 0 0x40>; interrupts = ; clocks = <&cpg CPG_MOD 519>; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 519>; i2c-scl-internal-delay-ns = <110>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; i2c2: i2c@e6510000 { compatible = "renesas,i2c-r8a779g0", "renesas,rcar-gen4-i2c"; reg = <0 0xe6510000 0 0x40>; interrupts = ; clocks = <&cpg CPG_MOD 520>; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 520>; i2c-scl-internal-delay-ns = <110>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; i2c3: i2c@e66d0000 { compatible = "renesas,i2c-r8a779g0", "renesas,rcar-gen4-i2c"; reg = <0 0xe66d0000 0 0x40>; interrupts = ; clocks = <&cpg CPG_MOD 521>; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 521>; i2c-scl-internal-delay-ns = <110>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; i2c4: i2c@e66d8000 { compatible = "renesas,i2c-r8a779g0", "renesas,rcar-gen4-i2c"; reg = <0 0xe66d8000 0 0x40>; interrupts = ; clocks = <&cpg CPG_MOD 522>; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 522>; i2c-scl-internal-delay-ns = <110>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; i2c5: i2c@e66e0000 { compatible = "renesas,i2c-r8a779g0", "renesas,rcar-gen4-i2c"; reg = <0 0xe66e0000 0 0x40>; interrupts = ; clocks = <&cpg CPG_MOD 523>; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 523>; i2c-scl-internal-delay-ns = <110>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; hscif0: serial@e6540000 { compatible = "renesas,hscif-r8a779g0", "renesas,rcar-gen4-hscif", "renesas,hscif"; reg = <0 0xe6540000 0 96>; interrupts = ; clocks = <&cpg CPG_MOD 514>, <&cpg CPG_CORE R8A779G0_CLK_S0D3_PER>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 514>; status = "disabled"; }; avb0: ethernet@e6800000 { compatible = "renesas,etheravb-r8a779g0", "renesas,etheravb-rcar-gen4"; reg = <0 0xe6800000 0 0x800>; interrupts = , , , , , , , , , , , , , , , , , , , , , , , , ; interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", "ch19", "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 211>; clock-names = "fck"; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 211>; phy-mode = "rgmii"; rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; avb1: ethernet@e6810000 { compatible = "renesas,etheravb-r8a779g0", "renesas,etheravb-rcar-gen4"; reg = <0 0xe6810000 0 0x800>; interrupts = , , , , , , , , , , , , , , , , , , , , , , , , ; interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", "ch19", "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 212>; clock-names = "fck"; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 212>; phy-mode = "rgmii"; rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; avb2: ethernet@e6820000 { compatible = "renesas,etheravb-r8a779g0", "renesas,etheravb-rcar-gen4"; reg = <0 0xe6820000 0 0x1000>; interrupts = , , , , , , , , , , , , , , , , , , , , , , , , ; interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", "ch19", "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 213>; clock-names = "fck"; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 213>; phy-mode = "rgmii"; rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; gic: interrupt-controller@f1000000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; reg = <0x0 0xf1000000 0 0x20000>, <0x0 0xf1060000 0 0x110000>; interrupts = ; }; prr: chipid@fff00044 { compatible = "renesas,prr"; reg = <0 0xfff00044 0 4>; }; }; timer { compatible = "arm,armv8-timer"; interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; }; };