// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for the R-Car V3U (R8A779A0) SoC * * Copyright (C) 2020 Renesas Electronics Corp. */ #include <dt-bindings/clock/r8a779a0-cpg-mssr.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/power/r8a779a0-sysc.h> / { compatible = "renesas,r8a779a0"; #address-cells = <2>; #size-cells = <2>; aliases { i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; i2c3 = &i2c3; i2c4 = &i2c4; i2c5 = &i2c5; i2c6 = &i2c6; }; cpus { #address-cells = <1>; #size-cells = <0>; a76_0: cpu@0 { compatible = "arm,cortex-a76"; reg = <0>; device_type = "cpu"; power-domains = <&sysc R8A779A0_PD_A1E0D0C0>; next-level-cache = <&L3_CA76_0>; }; L3_CA76_0: cache-controller-0 { compatible = "cache"; power-domains = <&sysc R8A779A0_PD_A2E0D0>; cache-unified; cache-level = <3>; }; }; extal_clk: extal { compatible = "fixed-clock"; #clock-cells = <0>; /* This value must be overridden by the board */ clock-frequency = <0>; }; extalr_clk: extalr { compatible = "fixed-clock"; #clock-cells = <0>; /* This value must be overridden by the board */ clock-frequency = <0>; }; pmu_a76 { compatible = "arm,cortex-a76-pmu"; interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; }; /* External SCIF clock - to be overridden by boards that provide it */ scif_clk: scif { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; }; soc: soc { compatible = "simple-bus"; interrupt-parent = <&gic>; #address-cells = <2>; #size-cells = <2>; ranges; rwdt: watchdog@e6020000 { compatible = "renesas,r8a779a0-wdt", "renesas,rcar-gen3-wdt"; reg = <0 0xe6020000 0 0x0c>; clocks = <&cpg CPG_MOD 907>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 907>; status = "disabled"; }; pfc: pin-controller@e6050000 { compatible = "renesas,pfc-r8a779a0"; reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, <0 0xe6068000 0 0x16c>, <0 0xe6068800 0 0x16c>, <0 0xe6069000 0 0x16c>, <0 0xe6069800 0 0x16c>; }; gpio0: gpio@e6058180 { compatible = "renesas,gpio-r8a779a0"; reg = <0 0xe6058180 0 0x54>; interrupts = <GIC_SPI 832 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 916>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 916>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 0 28>; interrupt-controller; #interrupt-cells = <2>; }; gpio1: gpio@e6050180 { compatible = "renesas,gpio-r8a779a0"; reg = <0 0xe6050180 0 0x54>; interrupts = <GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 915>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 915>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 32 31>; interrupt-controller; #interrupt-cells = <2>; }; gpio2: gpio@e6050980 { compatible = "renesas,gpio-r8a779a0"; reg = <0 0xe6050980 0 0x54>; interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 915>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 915>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 64 25>; interrupt-controller; #interrupt-cells = <2>; }; gpio3: gpio@e6058980 { compatible = "renesas,gpio-r8a779a0"; reg = <0 0xe6058980 0 0x54>; interrupts = <GIC_SPI 844 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 916>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 916>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 96 17>; interrupt-controller; #interrupt-cells = <2>; }; gpio4: gpio@e6060180 { compatible = "renesas,gpio-r8a779a0"; reg = <0 0xe6060180 0 0x54>; interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 917>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 917>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 128 27>; interrupt-controller; #interrupt-cells = <2>; }; gpio5: gpio@e6060980 { compatible = "renesas,gpio-r8a779a0"; reg = <0 0xe6060980 0 0x54>; interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 917>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 917>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 160 21>; interrupt-controller; #interrupt-cells = <2>; }; gpio6: gpio@e6068180 { compatible = "renesas,gpio-r8a779a0"; reg = <0 0xe6068180 0 0x54>; interrupts = <GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 918>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 918>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 192 21>; interrupt-controller; #interrupt-cells = <2>; }; gpio7: gpio@e6068980 { compatible = "renesas,gpio-r8a779a0"; reg = <0 0xe6068980 0 0x54>; interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 918>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 918>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 224 21>; interrupt-controller; #interrupt-cells = <2>; }; gpio8: gpio@e6069180 { compatible = "renesas,gpio-r8a779a0"; reg = <0 0xe6069180 0 0x54>; interrupts = <GIC_SPI 864 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 918>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 918>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 256 21>; interrupt-controller; #interrupt-cells = <2>; }; gpio9: gpio@e6069980 { compatible = "renesas,gpio-r8a779a0"; reg = <0 0xe6069980 0 0x54>; interrupts = <GIC_SPI 868 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 918>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 918>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pfc 0 288 21>; interrupt-controller; #interrupt-cells = <2>; }; cmt0: timer@e60f0000 { compatible = "renesas,r8a779a0-cmt0", "renesas,rcar-gen3-cmt0"; reg = <0 0xe60f0000 0 0x1004>; interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 910>; clock-names = "fck"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 910>; status = "disabled"; }; cmt1: timer@e6130000 { compatible = "renesas,r8a779a0-cmt1", "renesas,rcar-gen3-cmt1"; reg = <0 0xe6130000 0 0x1004>; interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 911>; clock-names = "fck"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 911>; status = "disabled"; }; cmt2: timer@e6140000 { compatible = "renesas,r8a779a0-cmt1", "renesas,rcar-gen3-cmt1"; reg = <0 0xe6140000 0 0x1004>; interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 912>; clock-names = "fck"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 912>; status = "disabled"; }; cmt3: timer@e6148000 { compatible = "renesas,r8a779a0-cmt1", "renesas,rcar-gen3-cmt1"; reg = <0 0xe6148000 0 0x1004>; interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 913>; clock-names = "fck"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 913>; status = "disabled"; }; cpg: clock-controller@e6150000 { compatible = "renesas,r8a779a0-cpg-mssr"; reg = <0 0xe6150000 0 0x4000>; clocks = <&extal_clk>, <&extalr_clk>; clock-names = "extal", "extalr"; #clock-cells = <2>; #power-domain-cells = <0>; #reset-cells = <1>; }; rst: reset-controller@e6160000 { compatible = "renesas,r8a779a0-rst"; reg = <0 0xe6160000 0 0x4000>; }; sysc: system-controller@e6180000 { compatible = "renesas,r8a779a0-sysc"; reg = <0 0xe6180000 0 0x4000>; #power-domain-cells = <1>; }; tmu0: timer@e61e0000 { compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; reg = <0 0xe61e0000 0 0x30>; interrupts = <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 713>; clock-names = "fck"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 713>; status = "disabled"; }; tmu1: timer@e6fc0000 { compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; reg = <0 0xe6fc0000 0 0x30>; interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 714>; clock-names = "fck"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 714>; status = "disabled"; }; tmu2: timer@e6fd0000 { compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; reg = <0 0xe6fd0000 0 0x30>; interrupts = <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 715>; clock-names = "fck"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 715>; status = "disabled"; }; tmu3: timer@e6fe0000 { compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; reg = <0 0xe6fe0000 0 0x30>; interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 716>; clock-names = "fck"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 716>; status = "disabled"; }; tmu4: timer@ffc00000 { compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; reg = <0 0xffc00000 0 0x30>; interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 717>; clock-names = "fck"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 717>; status = "disabled"; }; tsc: thermal@e6190000 { compatible = "renesas,r8a779a0-thermal"; reg = <0 0xe6190000 0 0x200>, <0 0xe6198000 0 0x200>, <0 0xe61a0000 0 0x200>, <0 0xe61a8000 0 0x200>, <0 0xe61b0000 0 0x200>; clocks = <&cpg CPG_MOD 919>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 919>; #thermal-sensor-cells = <1>; }; i2c0: i2c@e6500000 { compatible = "renesas,i2c-r8a779a0", "renesas,rcar-gen3-i2c"; reg = <0 0xe6500000 0 0x40>; interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 518>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 518>; dmas = <&dmac1 0x91>, <&dmac1 0x90>; dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <110>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; i2c1: i2c@e6508000 { compatible = "renesas,i2c-r8a779a0", "renesas,rcar-gen3-i2c"; reg = <0 0xe6508000 0 0x40>; interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 519>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 519>; dmas = <&dmac1 0x93>, <&dmac1 0x92>; dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <110>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; i2c2: i2c@e6510000 { compatible = "renesas,i2c-r8a779a0", "renesas,rcar-gen3-i2c"; reg = <0 0xe6510000 0 0x40>; interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 520>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 520>; dmas = <&dmac1 0x95>, <&dmac1 0x94>; dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <110>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; i2c3: i2c@e66d0000 { compatible = "renesas,i2c-r8a779a0", "renesas,rcar-gen3-i2c"; reg = <0 0xe66d0000 0 0x40>; interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 521>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 521>; dmas = <&dmac1 0x97>, <&dmac1 0x96>; dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <110>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; i2c4: i2c@e66d8000 { compatible = "renesas,i2c-r8a779a0", "renesas,rcar-gen3-i2c"; reg = <0 0xe66d8000 0 0x40>; interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 522>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 522>; dmas = <&dmac1 0x99>, <&dmac1 0x98>; dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <110>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; i2c5: i2c@e66e0000 { compatible = "renesas,i2c-r8a779a0", "renesas,rcar-gen3-i2c"; reg = <0 0xe66e0000 0 0x40>; interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 523>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 523>; dmas = <&dmac1 0x9b>, <&dmac1 0x9a>; dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <110>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; i2c6: i2c@e66e8000 { compatible = "renesas,i2c-r8a779a0", "renesas,rcar-gen3-i2c"; reg = <0 0xe66e8000 0 0x40>; interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 524>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 524>; dmas = <&dmac1 0x9d>, <&dmac1 0x9c>; dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <110>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; hscif0: serial@e6540000 { compatible = "renesas,hscif-r8a779a0", "renesas,rcar-gen3-hscif", "renesas,hscif"; reg = <0 0xe6540000 0 0x60>; interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 514>, <&cpg CPG_CORE R8A779A0_CLK_S1D2>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x31>, <&dmac1 0x30>; dma-names = "tx", "rx"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 514>; status = "disabled"; }; hscif1: serial@e6550000 { compatible = "renesas,hscif-r8a779a0", "renesas,rcar-gen3-hscif", "renesas,hscif"; reg = <0 0xe6550000 0 0x60>; interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 515>, <&cpg CPG_CORE R8A779A0_CLK_S1D2>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x33>, <&dmac1 0x32>; dma-names = "tx", "rx"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 515>; status = "disabled"; }; hscif2: serial@e6560000 { compatible = "renesas,hscif-r8a779a0", "renesas,rcar-gen3-hscif", "renesas,hscif"; reg = <0 0xe6560000 0 0x60>; interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 516>, <&cpg CPG_CORE R8A779A0_CLK_S1D2>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x35>, <&dmac1 0x34>; dma-names = "tx", "rx"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 516>; status = "disabled"; }; hscif3: serial@e66a0000 { compatible = "renesas,hscif-r8a779a0", "renesas,rcar-gen3-hscif", "renesas,hscif"; reg = <0 0xe66a0000 0 0x60>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 517>, <&cpg CPG_CORE R8A779A0_CLK_S1D2>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x37>, <&dmac1 0x36>; dma-names = "tx", "rx"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 517>; status = "disabled"; }; avb0: ethernet@e6800000 { compatible = "renesas,etheravb-r8a779a0", "renesas,etheravb-rcar-gen3"; reg = <0 0xe6800000 0 0x800>; interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", "ch19", "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 211>; clock-names = "fck"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 211>; phy-mode = "rgmii"; rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; avb1: ethernet@e6810000 { compatible = "renesas,etheravb-r8a779a0", "renesas,etheravb-rcar-gen3"; reg = <0 0xe6810000 0 0x800>; interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", "ch19", "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 212>; clock-names = "fck"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 212>; phy-mode = "rgmii"; rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; avb2: ethernet@e6820000 { compatible = "renesas,etheravb-r8a779a0", "renesas,etheravb-rcar-gen3"; reg = <0 0xe6820000 0 0x1000>; interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", "ch19", "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 213>; clock-names = "fck"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 213>; phy-mode = "rgmii"; rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; avb3: ethernet@e6830000 { compatible = "renesas,etheravb-r8a779a0", "renesas,etheravb-rcar-gen3"; reg = <0 0xe6830000 0 0x1000>; interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", "ch19", "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 214>; clock-names = "fck"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 214>; phy-mode = "rgmii"; rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; avb4: ethernet@e6840000 { compatible = "renesas,etheravb-r8a779a0", "renesas,etheravb-rcar-gen3"; reg = <0 0xe6840000 0 0x1000>; interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", "ch19", "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 215>; clock-names = "fck"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 215>; phy-mode = "rgmii"; rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; avb5: ethernet@e6850000 { compatible = "renesas,etheravb-r8a779a0", "renesas,etheravb-rcar-gen3"; reg = <0 0xe6850000 0 0x1000>; interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", "ch19", "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 216>; clock-names = "fck"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 216>; phy-mode = "rgmii"; rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; scif0: serial@e6e60000 { compatible = "renesas,scif-r8a779a0", "renesas,rcar-gen3-scif", "renesas,scif"; reg = <0 0xe6e60000 0 64>; interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 702>, <&cpg CPG_CORE R8A779A0_CLK_S1D2>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x51>, <&dmac1 0x50>; dma-names = "tx", "rx"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 702>; status = "disabled"; }; scif1: serial@e6e68000 { compatible = "renesas,scif-r8a779a0", "renesas,rcar-gen3-scif", "renesas,scif"; reg = <0 0xe6e68000 0 64>; interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 703>, <&cpg CPG_CORE R8A779A0_CLK_S1D2>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x53>, <&dmac1 0x52>; dma-names = "tx", "rx"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 703>; status = "disabled"; }; scif3: serial@e6c50000 { compatible = "renesas,scif-r8a779a0", "renesas,rcar-gen3-scif", "renesas,scif"; reg = <0 0xe6c50000 0 64>; interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 704>, <&cpg CPG_CORE R8A779A0_CLK_S1D2>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x57>, <&dmac1 0x56>; dma-names = "tx", "rx"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 704>; status = "disabled"; }; scif4: serial@e6c40000 { compatible = "renesas,scif-r8a779a0", "renesas,rcar-gen3-scif", "renesas,scif"; reg = <0 0xe6c40000 0 64>; interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 705>, <&cpg CPG_CORE R8A779A0_CLK_S1D2>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x59>, <&dmac1 0x58>; dma-names = "tx", "rx"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 705>; status = "disabled"; }; msiof0: spi@e6e90000 { compatible = "renesas,msiof-r8a779a0", "renesas,rcar-gen3-msiof"; reg = <0 0xe6e90000 0 0x0064>; interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 618>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 618>; dmas = <&dmac1 0x41>, <&dmac1 0x40>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; msiof1: spi@e6ea0000 { compatible = "renesas,msiof-r8a779a0", "renesas,rcar-gen3-msiof"; reg = <0 0xe6ea0000 0 0x0064>; interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 619>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 619>; dmas = <&dmac1 0x43>, <&dmac1 0x42>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; msiof2: spi@e6c00000 { compatible = "renesas,msiof-r8a779a0", "renesas,rcar-gen3-msiof"; reg = <0 0xe6c00000 0 0x0064>; interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 620>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 620>; dmas = <&dmac1 0x45>, <&dmac1 0x44>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; msiof3: spi@e6c10000 { compatible = "renesas,msiof-r8a779a0", "renesas,rcar-gen3-msiof"; reg = <0 0xe6c10000 0 0x0064>; interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 621>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 621>; dmas = <&dmac1 0x47>, <&dmac1 0x46>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; msiof4: spi@e6c20000 { compatible = "renesas,msiof-r8a779a0", "renesas,rcar-gen3-msiof"; reg = <0 0xe6c20000 0 0x0064>; interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 622>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 622>; dmas = <&dmac1 0x49>, <&dmac1 0x48>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; msiof5: spi@e6c28000 { compatible = "renesas,msiof-r8a779a0", "renesas,rcar-gen3-msiof"; reg = <0 0xe6c28000 0 0x0064>; interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 623>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 623>; dmas = <&dmac1 0x4b>, <&dmac1 0x4a>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; dmac1: dma-controller@e7350000 { compatible = "renesas,dmac-r8a779a0"; reg = <0 0xe7350000 0 0x1000>, <0 0xe7300000 0 0x10000>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15"; clocks = <&cpg CPG_MOD 709>; clock-names = "fck"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 709>; #dma-cells = <1>; dma-channels = <16>; }; dmac2: dma-controller@e7351000 { compatible = "renesas,dmac-r8a779a0"; reg = <0 0xe7351000 0 0x1000>, <0 0xe7310000 0 0x10000>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7"; clocks = <&cpg CPG_MOD 710>; clock-names = "fck"; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 710>; #dma-cells = <1>; dma-channels = <8>; }; mmc0: mmc@ee140000 { compatible = "renesas,sdhi-r8a779a0", "renesas,rcar-gen3-sdhi"; reg = <0 0xee140000 0 0x2000>; interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 706>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 706>; max-frequency = <200000000>; status = "disabled"; }; gic: interrupt-controller@f1000000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; reg = <0x0 0xf1000000 0 0x20000>, <0x0 0xf1060000 0 0x110000>; interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; }; fcpvd0: fcp@fea10000 { compatible = "renesas,fcpv"; reg = <0 0xfea10000 0 0x200>; clocks = <&cpg CPG_MOD 508>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 508>; }; fcpvd1: fcp@fea11000 { compatible = "renesas,fcpv"; reg = <0 0xfea11000 0 0x200>; clocks = <&cpg CPG_MOD 509>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 509>; }; vspd0: vsp@fea20000 { compatible = "renesas,vsp2"; reg = <0 0xfea20000 0 0x5000>; interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 830>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 830>; renesas,fcp = <&fcpvd0>; }; vspd1: vsp@fea28000 { compatible = "renesas,vsp2"; reg = <0 0xfea28000 0 0x5000>; interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 831>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; resets = <&cpg 831>; renesas,fcp = <&fcpvd1>; }; prr: chipid@fff00044 { compatible = "renesas,prr"; reg = <0 0xfff00044 0 4>; }; }; thermal-zones { sensor_thermal1: sensor-thermal1 { polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 0>; trips { sensor1_crit: sensor1-crit { temperature = <120000>; hysteresis = <1000>; type = "critical"; }; }; }; sensor_thermal2: sensor-thermal2 { polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 1>; trips { sensor2_crit: sensor2-crit { temperature = <120000>; hysteresis = <1000>; type = "critical"; }; }; }; sensor_thermal3: sensor-thermal3 { polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 2>; trips { sensor3_crit: sensor3-crit { temperature = <120000>; hysteresis = <1000>; type = "critical"; }; }; }; sensor_thermal4: sensor-thermal4 { polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 3>; trips { sensor4_crit: sensor4-crit { temperature = <120000>; hysteresis = <1000>; type = "critical"; }; }; }; sensor_thermal5: sensor-thermal5 { polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 4>; trips { sensor5_crit: sensor5-crit { temperature = <120000>; hysteresis = <1000>; type = "critical"; }; }; }; }; timer { compatible = "arm,armv8-timer"; interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; }; };