# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/qcom,dispcc-sm6125.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Display Clock Controller on SM6125 maintainers: - Martin Botka description: | Qualcomm display clock control module provides the clocks and power domains on SM6125. See also:: include/dt-bindings/clock/qcom,dispcc-sm6125.h properties: compatible: enum: - qcom,sm6125-dispcc clocks: items: - description: Board XO source - description: Byte clock from DSI PHY0 - description: Pixel clock from DSI PHY0 - description: Pixel clock from DSI PHY1 - description: Link clock from DP PHY - description: VCO DIV clock from DP PHY - description: AHB config clock from GCC - description: GPLL0 div source from GCC clock-names: items: - const: bi_tcxo - const: dsi0_phy_pll_out_byteclk - const: dsi0_phy_pll_out_dsiclk - const: dsi1_phy_pll_out_dsiclk - const: dp_phy_pll_link_clk - const: dp_phy_pll_vco_div_clk - const: cfg_ahb_clk - const: gcc_disp_gpll0_div_clk_src '#clock-cells': const: 1 '#power-domain-cells': const: 1 reg: maxItems: 1 required: - compatible - reg - clocks - clock-names - '#clock-cells' - '#power-domain-cells' additionalProperties: false examples: - | #include #include clock-controller@5f00000 { compatible = "qcom,sm6125-dispcc"; reg = <0x5f00000 0x20000>; clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&dsi0_phy 0>, <&dsi0_phy 1>, <&dsi1_phy 1>, <&dp_phy 0>, <&dp_phy 1>, <&gcc GCC_DISP_AHB_CLK>, <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>; clock-names = "bi_tcxo", "dsi0_phy_pll_out_byteclk", "dsi0_phy_pll_out_dsiclk", "dsi1_phy_pll_out_dsiclk", "dp_phy_pll_link_clk", "dp_phy_pll_vco_div_clk", "cfg_ahb_clk", "gcc_disp_gpll0_div_clk_src"; #clock-cells = <1>; #power-domain-cells = <1>; }; ...